Commit 1ac71ec0 authored by Tudor Ambarus's avatar Tudor Ambarus

mtd: spi-nor: Fix SPI NOR acronym

The correct terminology is serial NOR flash or SPI NOR.
s/SPI-NOR/SPI NOR and s/spi-nor/SPI NOR across the subsystem.
Signed-off-by: default avatarTudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: default avatarSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
parent 075fd6df
# SPDX-License-Identifier: GPL-2.0-only # SPDX-License-Identifier: GPL-2.0-only
menuconfig MTD_SPI_NOR menuconfig MTD_SPI_NOR
tristate "SPI-NOR device support" tristate "SPI NOR device support"
depends on MTD depends on MTD
depends on MTD && SPI_MASTER depends on MTD && SPI_MASTER
select SPI_MEM select SPI_MEM
help help
This is the framework for the SPI NOR which can be used by the SPI This is the framework for the SPI NOR which can be used by the SPI
device drivers and the SPI-NOR device driver. device drivers and the SPI NOR device driver.
if MTD_SPI_NOR if MTD_SPI_NOR
......
...@@ -21,11 +21,11 @@ config SPI_CADENCE_QUADSPI ...@@ -21,11 +21,11 @@ config SPI_CADENCE_QUADSPI
Flash as an MTD device. Flash as an MTD device.
config SPI_HISI_SFC config SPI_HISI_SFC
tristate "Hisilicon FMC SPI-NOR Flash Controller(SFC)" tristate "Hisilicon FMC SPI NOR Flash Controller(SFC)"
depends on ARCH_HISI || COMPILE_TEST depends on ARCH_HISI || COMPILE_TEST
depends on HAS_IOMEM depends on HAS_IOMEM
help help
This enables support for HiSilicon FMC SPI-NOR flash controller. This enables support for HiSilicon FMC SPI NOR flash controller.
config SPI_NXP_SPIFI config SPI_NXP_SPIFI
tristate "NXP SPI Flash Interface (SPIFI)" tristate "NXP SPI Flash Interface (SPIFI)"
......
...@@ -727,7 +727,7 @@ static int aspeed_smc_chip_setup_finish(struct aspeed_smc_chip *chip) ...@@ -727,7 +727,7 @@ static int aspeed_smc_chip_setup_finish(struct aspeed_smc_chip *chip)
/* /*
* TODO: Adjust clocks if fast read is supported and interpret * TODO: Adjust clocks if fast read is supported and interpret
* SPI-NOR flags to adjust controller settings. * SPI NOR flags to adjust controller settings.
*/ */
if (chip->nor.read_proto == SNOR_PROTO_1_1_1) { if (chip->nor.read_proto == SNOR_PROTO_1_1_1) {
if (chip->nor.read_dummy == 0) if (chip->nor.read_dummy == 0)
......
// SPDX-License-Identifier: GPL-2.0-or-later // SPDX-License-Identifier: GPL-2.0-or-later
/* /*
* HiSilicon FMC SPI-NOR flash controller driver * HiSilicon FMC SPI NOR flash controller driver
* *
* Copyright (c) 2015-2016 HiSilicon Technologies Co., Ltd. * Copyright (c) 2015-2016 HiSilicon Technologies Co., Ltd.
*/ */
......
// SPDX-License-Identifier: GPL-2.0-only // SPDX-License-Identifier: GPL-2.0-only
/* /*
* SPI-NOR driver for NXP SPI Flash Interface (SPIFI) * SPI NOR driver for NXP SPI Flash Interface (SPIFI)
* *
* Copyright (C) 2015 Joachim Eastwood <manabian@gmail.com> * Copyright (C) 2015 Joachim Eastwood <manabian@gmail.com>
* *
......
...@@ -2469,7 +2469,7 @@ static int spi_nor_select_read(struct spi_nor *nor, ...@@ -2469,7 +2469,7 @@ static int spi_nor_select_read(struct spi_nor *nor,
nor->read_proto = read->proto; nor->read_proto = read->proto;
/* /*
* In the spi-nor framework, we don't need to make the difference * In the SPI NOR framework, we don't need to make the difference
* between mode clock cycles and wait state clock cycles. * between mode clock cycles and wait state clock cycles.
* Indeed, the value of the mode clock cycles is used by a QSPI * Indeed, the value of the mode clock cycles is used by a QSPI
* flash memory to know whether it should enter or leave its 0-4-4 * flash memory to know whether it should enter or leave its 0-4-4
...@@ -3126,7 +3126,7 @@ int spi_nor_scan(struct spi_nor *nor, const char *name, ...@@ -3126,7 +3126,7 @@ int spi_nor_scan(struct spi_nor *nor, const char *name,
/* /*
* Make sure the XSR_RDY flag is set before calling * Make sure the XSR_RDY flag is set before calling
* spi_nor_wait_till_ready(). Xilinx S3AN share MFR * spi_nor_wait_till_ready(). Xilinx S3AN share MFR
* with Atmel spi-nor * with Atmel SPI NOR.
*/ */
if (info->flags & SPI_NOR_XSR_RDY) if (info->flags & SPI_NOR_XSR_RDY)
nor->flags |= SNOR_F_READY_XSR_RDY; nor->flags |= SNOR_F_READY_XSR_RDY;
......
...@@ -302,7 +302,7 @@ struct spi_nor; ...@@ -302,7 +302,7 @@ struct spi_nor;
* @read: read data from the SPI NOR. * @read: read data from the SPI NOR.
* @write: write data to the SPI NOR. * @write: write data to the SPI NOR.
* @erase: erase a sector of the SPI NOR at the offset @offs; if * @erase: erase a sector of the SPI NOR at the offset @offs; if
* not provided by the driver, spi-nor will send the erase * not provided by the driver, SPI NOR will send the erase
* opcode via write_reg(). * opcode via write_reg().
*/ */
struct spi_nor_controller_ops { struct spi_nor_controller_ops {
...@@ -336,7 +336,7 @@ struct spi_nor_flash_parameter; ...@@ -336,7 +336,7 @@ struct spi_nor_flash_parameter;
* layer is not DMA-able * layer is not DMA-able
* @bouncebuf_size: size of the bounce buffer * @bouncebuf_size: size of the bounce buffer
* @info: SPI NOR part JEDEC MFR ID and other info * @info: SPI NOR part JEDEC MFR ID and other info
* @manufacturer: spi-nor manufacturer * @manufacturer: SPI NOR manufacturer
* @page_size: the page size of the SPI NOR * @page_size: the page size of the SPI NOR
* @addr_width: number of address bytes * @addr_width: number of address bytes
* @erase_opcode: the opcode for erasing a sector * @erase_opcode: the opcode for erasing a sector
...@@ -344,12 +344,12 @@ struct spi_nor_flash_parameter; ...@@ -344,12 +344,12 @@ struct spi_nor_flash_parameter;
* @read_dummy: the dummy needed by the read operation * @read_dummy: the dummy needed by the read operation
* @program_opcode: the program opcode * @program_opcode: the program opcode
* @sst_write_second: used by the SST write operation * @sst_write_second: used by the SST write operation
* @flags: flag options for the current SPI-NOR (SNOR_F_*) * @flags: flag options for the current SPI NOR (SNOR_F_*)
* @read_proto: the SPI protocol for read operations * @read_proto: the SPI protocol for read operations
* @write_proto: the SPI protocol for write operations * @write_proto: the SPI protocol for write operations
* @reg_proto: the SPI protocol for read_reg/write_reg/erase operations * @reg_proto: the SPI protocol for read_reg/write_reg/erase operations
* @controller_ops: SPI NOR controller driver specific operations. * @controller_ops: SPI NOR controller driver specific operations.
* @params: [FLASH-SPECIFIC] SPI-NOR flash parameters and settings. * @params: [FLASH-SPECIFIC] SPI NOR flash parameters and settings.
* The structure includes legacy flash parameters and * The structure includes legacy flash parameters and
* settings that can be overwritten by the spi_nor_fixups * settings that can be overwritten by the spi_nor_fixups
* hooks, or dynamically when parsing the SFDP tables. * hooks, or dynamically when parsing the SFDP tables.
......
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