Commit 1b036162 authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'soc-dt-late-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull more SoC devicetree updates from Arnd Bergmann:
 "This is a follow-up to an earlier pull request for device tree
  changes, as three platform maintainers sent their contents too late to
  be included in the main set, but had not caused any further problems
  since then:

   - The Amlogic platform now containts support for two new SoC types,
     the A4 and A5 chips for audio applications. Both come with a
     reference board, and one more dts file gets addded for the
     combination of the MNT Reform Laptop with the BPI-CM4 CPU module

   - The ASpeed platform adds support for six addititional server
     platforms that use ast2500 or ast2600 as their BMC, while another
     one gets removed

   - The RISC-V platforms from Microchip, Starfive and and T-HEAD get
     additional features for existing hardware, plus the addition of the
     Milk-V Mars based on the StarFive VisionFive v2 board"

* tag 'soc-dt-late-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (76 commits)
  riscv: dts: microchip: add pac1934 power-monitor to icicle
  riscv: dts: thead: Fix node ordering in TH1520 device tree
  ARM: dts: aspeed: Add ASRock E3C256D4I BMC
  dt-bindings: arm: aspeed: document ASRock E3C256D4I
  dt-bindings: trivial-devices: add isil,isl69269
  ARM: dts: aspeed: x4tf: Add dts for asus x4tf project
  dt-bindings: arm: aspeed: add ASUS X4TF board
  ARM: dts: aspeed: Remove Facebook Cloudripper dts
  ARM: dts: aspeed: drop unused ref_voltage ADC property
  ARM: dts: aspeed: harma: correct Mellanox multi-host property
  ARM: dts: aspeed: yosemitev2: correct Mellanox multi-host property
  ARM: dts: aspeed: yosemite4: correct Mellanox multi-host property
  ARM: dts: aspeed: greatlakes: correct Mellanox multi-host property
  ARM: dts: aspeed: Modify I2C bus configuration
  ARM: dts: aspeed: Disable unused ADC channels for Asrock X570D4U BMC
  ARM: dts: aspeed: Modify GPIO table for Asrock X570D4U BMC
  ARM: dts: aspeed: yosemite4: set bus13 frequency to 100k
  ARM: dts: Aspeed: Bonnell: Fix NVMe LED labels
  ARM: dts: aspeed: yosemite4: Enable ipmb device for OCP debug card
  ARM: dts: aspeed: ahe50dc: Update lm25066 regulator name
  ...
parents 30aec6e1 01a7f9e1
......@@ -157,6 +157,7 @@ properties:
items:
- enum:
- bananapi,bpi-cm4io
- mntre,reform2-cm4
- const: bananapi,bpi-cm4
- const: amlogic,a311d
- const: amlogic,g12b
......@@ -201,6 +202,18 @@ properties:
- amlogic,ad402
- const: amlogic,a1
- description: Boards with the Amlogic A4 A113L2 SoC
items:
- enum:
- amlogic,ba400
- const: amlogic,a4
- description: Boards with the Amlogic A5 A113X2 SoC
items:
- enum:
- amlogic,av400
- const: amlogic,a5
- description: Boards with the Amlogic C3 C302X/C308L SoC
items:
- enum:
......
......@@ -35,7 +35,10 @@ properties:
- ampere,mtjade-bmc
- aspeed,ast2500-evb
- asrock,e3c246d4i-bmc
- asrock,e3c256d4i-bmc
- asrock,romed8hm3-bmc
- asrock,spc621d8hm3-bmc
- asrock,x570d4u-bmc
- bytedance,g220a-bmc
- facebook,cmm-bmc
- facebook,minipack-bmc
......@@ -74,15 +77,18 @@ properties:
- ampere,mtmitchell-bmc
- aspeed,ast2600-evb
- aspeed,ast2600-evb-a1
- asus,x4tf-bmc
- facebook,bletchley-bmc
- facebook,cloudripper-bmc
- facebook,elbert-bmc
- facebook,fuji-bmc
- facebook,greatlakes-bmc
- facebook,harma-bmc
- facebook,minerva-cmc
- facebook,yosemite4-bmc
- ibm,everest-bmc
- ibm,rainier-bmc
- ibm,system1-bmc
- ibm,tacoma-bmc
- inventec,starscream-bmc
- inventec,transformer-bmc
......
......@@ -26,6 +26,7 @@ properties:
- items:
- enum:
- milkv,mars
- starfive,visionfive-2-v1.2a
- starfive,visionfive-2-v1.3b
- const: starfive,jh7110
......
......@@ -54,7 +54,9 @@ properties:
- const: amlogic,meson-gx-uart
- description: UART controller on S4 compatible SoCs
items:
- const: amlogic,t7-uart
- enum:
- amlogic,a4-uart
- amlogic,t7-uart
- const: amlogic,meson-s4-uart
reg:
......
......@@ -164,6 +164,8 @@ properties:
- isil,isl29030
# Intersil ISL68137 Digital Output Configurable PWM Controller
- isil,isl68137
# Intersil ISL69269 PMBus Voltage Regulator
- isil,isl69269
# Intersil ISL76682 Ambient Light Sensor
- isil,isl76682
# Linear Technology LTC2488
......
......@@ -9,17 +9,21 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
aspeed-bmc-ampere-mtmitchell.dtb \
aspeed-bmc-arm-stardragon4800-rep2.dtb \
aspeed-bmc-asrock-e3c246d4i.dtb \
aspeed-bmc-asrock-e3c256d4i.dtb \
aspeed-bmc-asrock-romed8hm3.dtb \
aspeed-bmc-asrock-spc621d8hm3.dtb \
aspeed-bmc-asrock-x570d4u.dtb \
aspeed-bmc-asus-x4tf.dtb \
aspeed-bmc-bytedance-g220a.dtb \
aspeed-bmc-delta-ahe50dc.dtb \
aspeed-bmc-facebook-bletchley.dtb \
aspeed-bmc-facebook-cloudripper.dtb \
aspeed-bmc-facebook-cmm.dtb \
aspeed-bmc-facebook-elbert.dtb \
aspeed-bmc-facebook-fuji.dtb \
aspeed-bmc-facebook-galaxy100.dtb \
aspeed-bmc-facebook-greatlakes.dtb \
aspeed-bmc-facebook-minerva-cmc.dtb \
aspeed-bmc-facebook-harma.dtb \
aspeed-bmc-facebook-minerva.dtb \
aspeed-bmc-facebook-minipack.dtb \
aspeed-bmc-facebook-tiogapass.dtb \
aspeed-bmc-facebook-wedge40.dtb \
......@@ -33,6 +37,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
aspeed-bmc-ibm-rainier.dtb \
aspeed-bmc-ibm-rainier-1s4u.dtb \
aspeed-bmc-ibm-rainier-4u.dtb \
aspeed-bmc-ibm-system1.dtb \
aspeed-bmc-intel-s2600wf.dtb \
aspeed-bmc-inspur-fp5280g2.dtb \
aspeed-bmc-inspur-nf5280m6.dtb \
......
......@@ -813,7 +813,6 @@ bmc_ast2600_cpu: temperature-sensor@35 {
};
&adc0 {
ref_voltage = <2500>;
status = "okay";
pinctrl-names = "default";
......
......@@ -83,6 +83,9 @@ &mac0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rgmii1_default &pinctrl_mdio1_default>;
nvmem-cells = <&eth0_macaddress>;
nvmem-cell-names = "mac-address";
};
&i2c1 {
......@@ -103,6 +106,12 @@ eeprom@57 {
compatible = "st,24c128", "atmel,24c128";
reg = <0x57>;
pagesize = <16>;
#address-cells = <1>;
#size-cells = <1>;
eth0_macaddress: macaddress@3f80 {
reg = <0x3f80 6>;
};
};
};
......
// SPDX-License-Identifier: GPL-2.0+
/dts-v1/;
#include "aspeed-g5.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>
#include <dt-bindings/i2c/i2c.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/watchdog/aspeed-wdt.h>
/{
model = "ASRock E3C256D4I BMC";
compatible = "asrock,e3c256d4i-bmc", "aspeed,ast2500";
aliases {
serial4 = &uart5;
i2c20 = &i2c2mux0ch0;
i2c21 = &i2c2mux0ch1;
i2c22 = &i2c2mux0ch2;
i2c23 = &i2c2mux0ch3;
};
chosen {
stdout-path = &uart5;
};
memory@80000000 {
reg = <0x80000000 0x20000000>;
};
leds {
compatible = "gpio-leds";
/* BMC heartbeat */
led-0 {
gpios = <&gpio ASPEED_GPIO(H, 6) GPIO_ACTIVE_LOW>;
function = LED_FUNCTION_HEARTBEAT;
color = <LED_COLOR_ID_GREEN>;
linux,default-trigger = "timer";
};
/* system fault */
led-1 {
gpios = <&gpio ASPEED_GPIO(Z, 2) GPIO_ACTIVE_LOW>;
function = LED_FUNCTION_FAULT;
color = <LED_COLOR_ID_RED>;
panic-indicator;
};
};
iio-hwmon {
compatible = "iio-hwmon";
io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
<&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>,
<&adc 8>, <&adc 9>, <&adc 10>, <&adc 11>,
<&adc 12>, <&adc 13>, <&adc 14>, <&adc 15>;
};
};
&fmc {
status = "okay";
flash@0 {
status = "okay";
m25p,fast-read;
label = "bmc";
spi-max-frequency = <100000000>; /* 100 MHz */
#include "openbmc-flash-layout-64.dtsi"
};
};
&uart1 {
status = "okay";
};
&uart2 {
status = "okay";
};
&uart3 {
status = "okay";
};
&uart4 {
status = "okay";
};
&uart5 {
status = "okay";
};
&uart_routing {
status = "okay";
};
&mac0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rgmii1_default &pinctrl_mdio1_default>;
nvmem-cells = <&eth0_macaddress>;
nvmem-cell-names = "mac-address";
};
&i2c0 {
status = "okay";
};
&i2c1 {
status = "okay";
};
&i2c2 {
status = "okay";
i2c-mux@70 {
compatible = "nxp,pca9545";
reg = <0x70>;
#address-cells = <1>;
#size-cells = <0>;
i2c2mux0ch0: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
};
i2c2mux0ch1: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
};
i2c2mux0ch2: i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
};
i2c2mux0ch3: i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
};
};
};
&i2c3 {
status = "okay";
};
&i2c4 {
status = "okay";
};
&i2c5 {
status = "okay";
};
&i2c6 {
status = "okay";
};
&i2c7 {
status = "okay";
};
&i2c9 {
status = "okay";
};
&i2c10 {
status = "okay";
};
&i2c11 {
status = "okay";
vrm@60 {
compatible = "isil,isl69269";
reg = <0x60>;
};
};
&i2c12 {
status = "okay";
/* FRU eeprom */
eeprom@57 {
compatible = "st,24c128", "atmel,24c128";
reg = <0x57>;
pagesize = <16>;
#address-cells = <1>;
#size-cells = <1>;
eth0_macaddress: macaddress@3f80 {
reg = <0x3f80 6>;
};
};
};
&video {
status = "okay";
};
&vhub {
status = "okay";
};
&lpc_ctrl {
status = "okay";
};
&lpc_snoop {
status = "okay";
snoop-ports = <0x80>;
};
&kcs3 {
status = "okay";
aspeed,lpc-io-reg = <0xca2>;
};
&peci0 {
status = "okay";
};
&wdt1 {
aspeed,reset-mask = <(AST2500_WDT_RESET_DEFAULT & ~AST2500_WDT_RESET_LPC)>;
};
&wdt2 {
aspeed,reset-mask = <(AST2500_WDT_RESET_DEFAULT & ~AST2500_WDT_RESET_LPC)>;
};
&pwm_tacho {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm0_default /* CPU */
&pinctrl_pwm2_default /* rear */
&pinctrl_pwm4_default>; /* front */
/* CPU */
fan@0 {
reg = <0x00>;
aspeed,fan-tach-ch = /bits/ 8 <0x00>;
};
/* rear */
fan@2 {
reg = <0x02>;
aspeed,fan-tach-ch = /bits/ 8 <0x02>;
};
/* front */
fan@4 {
reg = <0x04>;
aspeed,fan-tach-ch = /bits/ 8 <0x04>;
};
};
&gpio {
status = "okay";
gpio-line-names =
/* A */ "", "", "NMI_BTN_N", "BMC_NMI", "", "", "", "",
/* B */ "", "", "", "", "", "", "", "",
/* C */ "", "", "", "", "", "", "", "",
/* D */ "BMC_PSIN", "BMC_PSOUT", "BMC_RESETCON", "RESETCON",
"", "", "", "",
/* E */ "", "", "", "", "", "", "", "",
/* F */ "LOCATORLED_STATUS_N", "LOCATORBTN", "", "",
"", "", "BMC_PCH_SCI_LPC", "BMC_NCSI_MUX_CTL",
/* G */ "HWM_BAT_EN", "CHASSIS_ID0", "CHASSIS_ID1", "CHASSIS_ID2",
"", "", "", "",
/* H */ "FM_ME_RCVR_N", "O_PWROK", "", "D4_DIMM_EVENT_3V_N",
"MFG_MODE_N", "BMC_RTCRST", "BMC_HB_LED_N", "BMC_CASEOPEN",
/* I */ "", "", "", "", "", "", "", "",
/* J */ "BMC_READY", "BMC_PCH_BIOS_CS_N", "BMC_SMI", "", "", "", "", "",
/* K */ "", "", "", "", "", "", "", "",
/* L */ "", "", "", "", "", "", "", "",
/* M */ "", "", "", "", "", "", "", "",
/* N */ "", "", "", "", "", "", "", "",
/* O */ "", "", "", "", "", "", "", "",
/* P */ "", "", "", "", "", "", "", "",
/* Q */ "", "", "", "", "", "", "", "",
/* R */ "", "", "", "", "", "", "", "",
/* S */ "PCHHOT_BMC_N", "", "RSMRST", "", "", "", "", "",
/* T */ "", "", "", "", "", "", "", "",
/* U */ "", "", "", "", "", "", "", "",
/* V */ "", "", "", "", "", "", "", "",
/* W */ "", "", "", "", "", "", "", "",
/* X */ "", "", "", "", "", "", "", "",
/* Y */ "SLP_S3", "SLP_S5", "", "", "", "", "", "",
/* Z */ "CPU_CATERR_BMC_N", "", "SYSTEM_FAULT_LED_N", "BMC_THROTTLE_N",
"", "", "", "",
/* AA */ "CPU1_THERMTRIP_LATCH_N", "", "CPU1_PROCHOT_N", "",
"", "", "IRQ_SMI_ACTIVE_N", "FM_BIOS_POST_CMPLT_N",
/* AB */ "", "", "ME_OVERRIDE", "BMC_DMI_MODIFY", "", "", "", "",
/* AC */ "", "", "", "", "", "", "", "";
};
&adc {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_adc0_default /* 3VSB */
&pinctrl_adc1_default /* 5VSB */
&pinctrl_adc2_default /* CPU1 */
&pinctrl_adc3_default /* VCCSA */
&pinctrl_adc4_default /* VCCM */
&pinctrl_adc5_default /* V10M */
&pinctrl_adc6_default /* VCCIO */
&pinctrl_adc7_default /* VCCGT */
&pinctrl_adc8_default /* VPPM */
&pinctrl_adc9_default /* BAT */
&pinctrl_adc10_default /* 3V */
&pinctrl_adc11_default /* 5V */
&pinctrl_adc12_default /* 12V */
&pinctrl_adc13_default /* GND */
&pinctrl_adc14_default /* GND */
&pinctrl_adc15_default>; /* GND */
};
......@@ -71,6 +71,9 @@ &mac0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rgmii1_default &pinctrl_mdio1_default>;
nvmem-cells = <&eth0_macaddress>;
nvmem-cell-names = "mac-address";
};
&i2c0 {
......@@ -131,6 +134,12 @@ eeprom@50 {
compatible = "st,24c128", "atmel,24c128";
reg = <0x50>;
pagesize = <16>;
#address-cells = <1>;
#size-cells = <1>;
eth0_macaddress: macaddress@3f80 {
reg = <0x3f80 6>;
};
};
};
......
// SPDX-License-Identifier: GPL-2.0+
/dts-v1/;
#include "aspeed-g5.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>
#include <dt-bindings/i2c/i2c.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/leds/common.h>
/{
model = "ASRock SPC621D8HM3 BMC";
compatible = "asrock,spc621d8hm3-bmc", "aspeed,ast2500";
aliases {
serial4 = &uart5;
i2c20 = &i2c1mux0ch0;
i2c21 = &i2c1mux0ch1;
};
chosen {
stdout-path = &uart5;
};
memory@80000000 {
reg = <0x80000000 0x20000000>;
};
leds {
compatible = "gpio-leds";
/* BMC heartbeat */
led-0 {
gpios = <&gpio ASPEED_GPIO(H, 6) GPIO_ACTIVE_LOW>;
function = LED_FUNCTION_HEARTBEAT;
color = <LED_COLOR_ID_GREEN>;
linux,default-trigger = "timer";
};
/* system fault */
led-1 {
gpios = <&gpio ASPEED_GPIO(Z, 2) GPIO_ACTIVE_LOW>;
function = LED_FUNCTION_FAULT;
color = <LED_COLOR_ID_RED>;
panic-indicator;
};
};
iio-hwmon {
compatible = "iio-hwmon";
io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
<&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>,
<&adc 8>, <&adc 9>, <&adc 10>, <&adc 11>,
<&adc 12>, <&adc 13>, <&adc 14>, <&adc 15>;
};
};
&fmc {
status = "okay";
flash@0 {
status = "okay";
m25p,fast-read;
label = "bmc";
spi-max-frequency = <50000000>; /* 50 MHz */
#include "openbmc-flash-layout-64.dtsi"
};
};
&uart5 {
status = "okay";
};
&vuart {
status = "okay";
aspeed,lpc-io-reg = <0x2f8>;
aspeed,lpc-interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
};
&mac0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rgmii1_default &pinctrl_mdio1_default>;
nvmem-cells = <&eth0_macaddress>;
nvmem-cell-names = "mac-address";
};
&i2c0 {
status = "okay";
};
&i2c1 {
status = "okay";
/* hardware monitor/thermal sensor */
temperature-sensor@29 {
compatible = "nuvoton,nct7802";
reg = <0x29>;
};
/* motherboard temp sensor (TMP1, near BMC) */
temperature-sensor@4c {
compatible = "nuvoton,w83773g";
reg = <0x4c>;
};
/* motherboard FRU eeprom */
eeprom@50 {
compatible = "st,24c128", "atmel,24c128";
reg = <0x50>;
pagesize = <16>;
#address-cells = <1>;
#size-cells = <1>;
eth0_macaddress: macaddress@3f80 {
reg = <0x3f80 6>;
};
};
/* M.2 slot smbus mux */
i2c-mux@71 {
compatible = "nxp,pca9545";
reg = <0x71>;
#address-cells = <1>;
#size-cells = <0>;
i2c1mux0ch0: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
};
i2c1mux0ch1: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
};
};
};
&i2c2 {
status = "okay";
};
&i2c3 {
status = "okay";
};
&i2c4 {
status = "okay";
};
&i2c5 {
status = "okay";
};
&i2c6 {
status = "okay";
};
&i2c7 {
status = "okay";
};
&i2c8 {
status = "okay";
};
&i2c9 {
status = "okay";
};
&i2c10 {
status = "okay";
};
&i2c11 {
status = "okay";
};
&i2c12 {
status = "okay";
};
&i2c13 {
status = "okay";
};
&video {
status = "okay";
};
&vhub {
status = "okay";
};
&lpc_ctrl {
status = "okay";
};
&lpc_snoop {
status = "okay";
snoop-ports = <0x80>;
};
&kcs3 {
status = "okay";
aspeed,lpc-io-reg = <0xca2>;
};
&peci0 {
status = "okay";
};
&pwm_tacho {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm0_default
&pinctrl_pwm2_default
&pinctrl_pwm3_default
&pinctrl_pwm4_default>;
fan@0 {
reg = <0x00>;
aspeed,fan-tach-ch = /bits/ 8 <0x00>;
};
fan@2 {
reg = <0x02>;
aspeed,fan-tach-ch = /bits/ 8 <0x02>;
};
fan@3 {
reg = <0x03>;
aspeed,fan-tach-ch = /bits/ 8 <0x03>;
};
fan@4 {
reg = <0x04>;
aspeed,fan-tach-ch = /bits/ 8 <0x04>;
};
};
&gpio {
status = "okay";
gpio-line-names =
/* A */ "LOCATORLED_STATUS_N", "LOCATORBTN_N",
"BMC_READY_N", "FM_SPD_DDRCPU_LVLSHFT_EN",
"", "", "", "",
/* B */ "NODE_ID_1", "NODE_ID_2", "PSU_FAN_FAIL_N", "",
"", "", "", "GPIO_RST",
/* C */ "", "", "", "", "", "", "", "",
/* D */ "FP_PWR_BTN_MUX_N", "FM_BMC_PWRBTN_OUT_N",
"FP_RST_BTN_N", "RST_BMC_RSTBTN_OUT_N",
"NMI_BTN_N", "BMC_NMI",
"", "",
/* E */ "", "", "", "FM_ME_RCVR_N", "", "", "", "",
/* F */ "BMC_SMB_SEL_N", "FM_CPU2_DISABLE_COD_N",
"FM_REMOTE_DEBUG_BMC_EN", "FM_CPU_ERR0_LVT3_EN",
"FM_CPU_ERR1_LVT3_EN", "FM_CPU_ERR2_LVT3_EN",
"FM_MEM_THERM_EVENT_CPU1_LVT3_N", "FM_MEM_THERM_EVENT_CPU2_LVT3_N",
/* G */ "HWM_BAT_EN", "", "BMC_PHYRST_N", "FM_BIOS_SPI_BMC_CTRL",
"BMC_ALERT1_N", "BMC_ALERT2_N", "BMC_ALERT3_N", "IRQ_SML0_ALERT_N",
/* H */ "BMC_SMB_PRESENT_1_N", "FM_PCH_CORE_VID_0", "FM_PCH_CORE_VID_1", "",
"FM_MFG_MODE", "BMC_RTCRST", "BMC_HB_LED_N", "BMC_CASEOPEN",
/* I */ "IRQ_PVDDQ_ABCD_CPU1_VRHOT_LVC3_N", "IRQ_PVDDQ_ABCD_CPU2_VRHOT_LVC3_N",
"IRQ_PVDDQ_EFGH_CPU1_VRHOT_LVC3_N", "IRQ_PVDDQ_EFGH_CPU2_VRHOT_LVC3_N",
"", "", "", "",
/* J */ "", "", "", "", "", "", "", "",
/* K */ "", "", "", "", "", "", "", "",
/* L */ "", "", "", "", "", "", "", "",
/* M */ "FM_PVCCIN_CPU1_PWR_IN_ALERT_N", "FM_PVCCIN_CPU2_PWR_IN_ALERT_N",
"IRQ_PVCCIN_CPU1_VRHOT_LVC3_N", "IRQ_PVCCIN_CPU2_VRHOT_LVC3_N",
"FM_CPU1_PROCHOT_BMC_LVC3_N", "",
"FM_CPU1_MEMHOT_OUT_N", "FM_CPU2_MEMHOT_OUT_N",
/* N */ "", "", "", "", "", "", "", "",
/* O */ "", "", "", "", "", "", "", "",
/* P */ "", "", "", "", "", "", "", "",
/* Q */ "", "", "", "", "", "", "RST_GLB_RST_WARN_N", "PCIE_WAKE_N",
/* R */ "", "", "FM_BMC_SUSACK_N", "FM_BMC_EUP_LOT6_N",
"", "FM_BMC_PCH_SCI_LPC_N", "", "",
/* S */ "FM_DBP_PRESENT_N", "FM_CPU2_SKTOCC_LCT3_N",
"FM_CPU1_FIVR_FAULT_LVT3", "FM_CPU2_FIVR_FAULT_LVT3",
"", "", "", "",
/* T */ "", "", "", "", "", "", "", "",
/* U */ "", "", "", "", "", "", "", "",
/* V */ "", "", "", "", "", "", "", "",
/* W */ "", "", "", "", "", "", "", "",
/* X */ "", "", "", "", "", "", "", "",
/* Y */ "FM_SLPS3_N", "FM_SLPS4_N", "", "FM_BMC_ONCTL_N_PLD",
"", "", "", "",
/* Z */ "FM_CPU_MSMI_CATERR_LVT3_N", "", "SYSTEM_FAULT_LED_N", "BMC_THROTTLE_N",
"", "", "", "",
/* AA */ "FM_CPU1_THERMTRIP_LATCH_LVT3_N", "FM_CPU2_THERMTRIP_LATCH_LVT3_N",
"FM_BIOS_POST_COMPLT_N", "DBP_BMC_SYSPWROK",
"", "IRQ_SML0_ALERT_MUX_N",
"IRQ_SMI_ACTIVE_N", "IRQ_NMI_EVENT_N",
/* AB */ "FM_PCH_BMC_THERMTRIP_N", "PWRGD_SYS_PWROK",
"ME_OVERRIDE", "IRQ_BMC_PCH_SMI_LPC_N",
"", "", "", "",
/* AC */ "", "", "", "", "", "", "", "";
};
&adc {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_adc0_default /* 3VSB */
&pinctrl_adc1_default /* 5VSB */
&pinctrl_adc2_default /* CPU1 */
&pinctrl_adc3_default /* NC */
&pinctrl_adc4_default /* VCCMABCD */
&pinctrl_adc5_default /* VCCMEFGH */
&pinctrl_adc6_default /* NC */
&pinctrl_adc7_default /* NC */
&pinctrl_adc8_default /* PVNN_PCH */
&pinctrl_adc9_default /* 1P05PCH */
&pinctrl_adc10_default /* 1P8PCH */
&pinctrl_adc11_default /* BAT */
&pinctrl_adc12_default /* 3V */
&pinctrl_adc13_default /* 5V */
&pinctrl_adc14_default /* 12V */
&pinctrl_adc15_default>; /* GND */
};
// SPDX-License-Identifier: GPL-2.0+
/dts-v1/;
#include "aspeed-g5.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>
#include <dt-bindings/leds/common.h>
/ {
model = "Asrock Rack X570D4U BMC";
compatible = "asrock,x570d4u-bmc", "aspeed,ast2500";
aliases {
i2c40 = &i2c4mux0ch0;
i2c41 = &i2c4mux0ch1;
i2c42 = &i2c4mux0ch2;
i2c43 = &i2c4mux0ch3;
};
chosen {
stdout-path = &uart5;
};
memory@80000000 {
reg = <0x80000000 0x20000000>;
};
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;
pci_memory: region@9a000000 {
no-map;
reg = <0x9a000000 0x00010000>; /* 64K */
};
video_engine_memory: jpegbuffer {
size = <0x02800000>; /* 40M */
alignment = <0x01000000>;
compatible = "shared-dma-pool";
reusable;
};
gfx_memory: framebuffer {
size = <0x01000000>;
alignment = <0x01000000>;
compatible = "shared-dma-pool";
reusable;
};
};
leds {
compatible = "gpio-leds";
led-0 {
/* led-heartbeat-n */
gpios = <&gpio ASPEED_GPIO(H, 6) GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_HEARTBEAT;
linux,default-trigger = "timer";
};
led-1 {
/* led-fault-n */
gpios = <&gpio ASPEED_GPIO(Z, 2) GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_AMBER>;
function = LED_FUNCTION_FAULT;
panic-indicator;
};
};
iio-hwmon {
compatible = "iio-hwmon";
io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, <&adc 4>,
<&adc 5>, <&adc 6>, <&adc 7>, <&adc 8>, <&adc 9>,
<&adc 10>, <&adc 11>, <&adc 12>;
};
};
&gpio {
status = "okay";
gpio-line-names =
/* A */ "input-locatorled-n", "", "", "", "", "", "", "",
/* B */ "input-bios-post-cmplt-n", "", "", "", "", "", "", "",
/* C */ "", "", "", "", "", "", "control-locatorbutton-n", "",
/* D */ "button-power-n", "control-power-n", "button-reset-n",
"control-reset-n", "", "", "", "",
/* E */ "", "", "", "", "", "", "", "",
/* F */ "", "", "", "", "", "", "", "",
/* G */ "output-hwm-vbat-enable", "input-id0-n", "input-id1-n",
"input-id2-n", "input-aux-smb-alert-n", "",
"input-psu-smb-alert-n", "",
/* H */ "", "", "", "", "input-mfg-mode-n", "",
"led-heartbeat-n", "input-case-open-n",
/* I */ "", "", "", "", "", "", "", "",
/* J */ "output-bmc-ready-n", "", "", "", "", "", "", "",
/* K */ "", "", "", "", "", "", "", "",
/* L */ "", "", "", "", "", "", "", "",
/* M */ "", "", "", "", "", "", "", "",
/* N */ "", "", "", "", "", "", "", "",
/* O */ "", "", "", "", "", "", "", "",
/* P */ "", "", "", "", "", "", "", "",
/* Q */ "", "", "", "", "input-bmc-smb-present-n", "", "",
"input-pcie-wake-n",
/* R */ "", "", "", "", "", "", "", "",
/* S */ "input-bmc-pchhot-n", "", "", "", "", "", "", "",
/* T */ "", "", "", "", "", "", "", "",
/* U */ "", "", "", "", "", "", "", "",
/* V */ "", "", "", "", "", "", "", "",
/* W */ "", "", "", "", "", "", "", "",
/* X */ "", "", "", "", "", "", "", "",
/* Y */ "input-sleep-s3-n", "input-sleep-s5-n", "", "", "", "",
"", "",
/* Z */ "", "", "led-fault-n", "output-bmc-throttle-n", "", "",
"", "",
/* AA */ "input-cpu1-thermtrip-latch-n", "",
"input-cpu1-prochot-n", "", "", "", "", "",
/* AB */ "", "input-power-good", "", "", "", "", "", "",
/* AC */ "", "", "", "", "", "", "", "";
};
&fmc {
status = "okay";
flash@0 {
status = "okay";
label = "bmc";
m25p,fast-read;
spi-max-frequency = <10000000>;
#include "openbmc-flash-layout-64.dtsi"
};
};
&uart5 {
status = "okay";
};
&vuart {
status = "okay";
};
&mac0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rgmii1_default &pinctrl_mdio1_default>;
nvmem-cells = <&eth0_macaddress>;
nvmem-cell-names = "mac-address";
};
&mac1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rmii2_default &pinctrl_mdio2_default>;
use-ncsi;
nvmem-cells = <&eth1_macaddress>;
nvmem-cell-names = "mac-address";
};
&i2c0 {
/* SMBus on auxiliary panel header (AUX_PANEL1) */
status = "okay";
};
&i2c1 {
/* Hardware monitoring SMBus */
status = "okay";
w83773g@4c {
compatible = "nuvoton,w83773g";
reg = <0x4c>;
};
};
&i2c2 {
/* PSU SMBus (PSU_SMB1) */
status = "okay";
};
&i2c3 {
status = "okay";
};
&i2c4 {
status = "okay";
i2c-mux@70 {
compatible = "nxp,pca9545";
reg = <0x70>;
#address-cells = <1>;
#size-cells = <0>;
i2c4mux0ch0: i2c@0 {
/* SMBus on PCI express 16x slot */
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
};
i2c4mux0ch1: i2c@1 {
/* SMBus on PCI express 8x slot */
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
};
i2c4mux0ch2: i2c@2 {
/* Unknown */
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
};
i2c4mux0ch3: i2c@3 {
/* SMBus on PCI express 1x slot */
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
};
};
};
&i2c5 {
/* SMBus on BMC connector (BMC_SMB_1) */
status = "okay";
};
&i2c7 {
/* FRU and SPD EEPROM SMBus */
status = "okay";
eeprom@57 {
compatible = "st,24c128", "atmel,24c128";
reg = <0x57>;
pagesize = <16>;
#address-cells = <1>;
#size-cells = <1>;
eth0_macaddress: macaddress@3f80 {
reg = <0x3f80 6>;
};
eth1_macaddress: macaddress@3f88 {
reg = <0x3f88 6>;
};
};
};
&i2c8 {
/* SMBus on intelligent platform management bus header (IPMB_1) */
status = "okay";
};
&gfx {
status = "okay";
};
&pinctrl {
aspeed,external-nodes = <&gfx &lhc>;
};
&vhub {
status = "okay";
};
&ehci1 {
status = "okay";
};
&uhci {
status = "okay";
};
&kcs3 {
aspeed,lpc-io-reg = <0xca2>;
status = "okay";
};
&lpc_ctrl {
status = "okay";
};
&lpc_snoop {
status = "okay";
snoop-ports = <0x80>;
};
&p2a {
status = "okay";
memory-region = <&pci_memory>;
};
&video {
status = "okay";
memory-region = <&video_engine_memory>;
};
&pwm_tacho {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm0_default
&pinctrl_pwm1_default
&pinctrl_pwm2_default
&pinctrl_pwm3_default
&pinctrl_pwm4_default
&pinctrl_pwm5_default>;
fan@0 {
/* FAN1 (4-pin) */
reg = <0x00>;
aspeed,fan-tach-ch = /bits/ 8 <0x00>;
};
fan@1 {
/* FAN2 (4-pin) */
reg = <0x01>;
aspeed,fan-tach-ch = /bits/ 8 <0x01>;
};
fan@2 {
/* FAN3 (4-pin) */
reg = <0x02>;
aspeed,fan-tach-ch = /bits/ 8 <0x02>;
};
fan@3 {
/* FAN4 (6-pin) */
reg = <0x03>;
aspeed,fan-tach-ch = /bits/ 8 <0x04 0x0b>;
};
fan@4 {
/* FAN6 (6-pin) */
reg = <0x04>;
aspeed,fan-tach-ch = /bits/ 8 <0x06 0x0d>;
};
fan@5 {
/* FAN5 (6-pin) */
reg = <0x05>;
aspeed,fan-tach-ch = /bits/ 8 <0x05 0x0c>;
};
};
&adc {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_adc0_default /* 3VSB */
&pinctrl_adc1_default /* 5VSB */
&pinctrl_adc2_default /* VCPU */
&pinctrl_adc3_default /* VSOC */
&pinctrl_adc4_default /* VCCM */
&pinctrl_adc5_default /* APU-VDDP */
&pinctrl_adc6_default /* PM-VDD-CLDO */
&pinctrl_adc7_default /* PM-VDDCR-S5 */
&pinctrl_adc8_default /* PM-VDDCR */
&pinctrl_adc9_default /* VBAT */
&pinctrl_adc10_default /* 3V */
&pinctrl_adc11_default /* 5V */
&pinctrl_adc12_default>; /* 12V */
};
This diff is collapsed.
......@@ -18,7 +18,7 @@ efuse@##hexaddr { \
reg = <0x##hexaddr>; \
shunt-resistor-micro-ohms = <675>; \
regulators { \
efuse##num: vout0 { \
efuse##num: vout { \
regulator-name = __stringify(efuse##num##-reg); \
}; \
}; \
......
// SPDX-License-Identifier: GPL-2.0+
// Copyright (c) 2020 Facebook Inc.
/dts-v1/;
#include <dt-bindings/leds/common.h>
#include "ast2600-facebook-netbmc-common.dtsi"
/ {
model = "Facebook Cloudripper BMC";
compatible = "facebook,cloudripper-bmc", "aspeed,ast2600";
aliases {
/*
* PCA9548 (1-0070) provides 8 channels connecting to
* SMB (Switch Main Board).
*/
i2c16 = &imux16;
i2c17 = &imux17;
i2c18 = &imux18;
i2c19 = &imux19;
i2c20 = &imux20;
i2c21 = &imux21;
i2c22 = &imux22;
i2c23 = &imux23;
/*
* PCA9548 (2-0070) provides 8 channels connecting to
* SCM (System Controller Module).
*/
i2c24 = &imux24;
i2c25 = &imux25;
i2c26 = &imux26;
i2c27 = &imux27;
i2c28 = &imux28;
i2c29 = &imux29;
i2c30 = &imux30;
i2c31 = &imux31;
/*
* PCA9548 (3-0070) provides 8 channels connecting to
* SMB (Switch Main Board).
*/
i2c32 = &imux32;
i2c33 = &imux33;
i2c34 = &imux34;
i2c35 = &imux35;
i2c36 = &imux36;
i2c37 = &imux37;
i2c38 = &imux38;
i2c39 = &imux39;
/*
* PCA9548 (8-0070) provides 8 channels connecting to
* PDB (Power Delivery Board).
*/
i2c40 = &imux40;
i2c41 = &imux41;
i2c42 = &imux42;
i2c43 = &imux43;
i2c44 = &imux44;
i2c45 = &imux45;
i2c46 = &imux46;
i2c47 = &imux47;
/*
* PCA9548 (15-0076) provides 8 channels connecting to
* FCM (Fan Controller Module).
*/
i2c48 = &imux48;
i2c49 = &imux49;
i2c50 = &imux50;
i2c51 = &imux51;
i2c52 = &imux52;
i2c53 = &imux53;
i2c54 = &imux54;
i2c55 = &imux55;
};
spi_gpio: spi {
num-chipselects = <2>;
cs-gpios = <&gpio0 ASPEED_GPIO(X, 0) GPIO_ACTIVE_LOW>,
<&gpio0 ASPEED_GPIO(X, 1) GPIO_ACTIVE_HIGH>;
eeprom@1 {
compatible = "atmel,at93c46d";
spi-max-frequency = <250000>;
data-size = <16>;
spi-cs-high;
reg = <1>;
};
};
};
&ehci1 {
status = "okay";
};
/*
* "mdio1" is connected to the MDC/MDIO interface of the on-board
* management switch (whose ports are connected to BMC, Host and front
* panel ethernet port).
*/
&mdio1 {
status = "okay";
};
&mdio3 {
status = "okay";
ethphy1: ethernet-phy@13 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x0d>;
};
};
&mac3 {
status = "okay";
phy-mode = "rgmii";
phy-handle = <&ethphy1>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rgmii4_default>;
};
&i2c0 {
multi-master;
bus-frequency = <1000000>;
};
&i2c1 {
/*
* PCA9548 (1-0070) provides 8 channels connecting to SMB (Switch
* Main Board).
*/
i2c-mux@70 {
compatible = "nxp,pca9548";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x70>;
i2c-mux-idle-disconnect;
imux16: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
};
imux17: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
};
imux18: i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
};
imux19: i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
};
imux20: i2c@4 {
#address-cells = <1>;
#size-cells = <0>;
reg = <4>;
};
imux21: i2c@5 {
#address-cells = <1>;
#size-cells = <0>;
reg = <5>;
};
imux22: i2c@6 {
#address-cells = <1>;
#size-cells = <0>;
reg = <6>;
};
imux23: i2c@7 {
#address-cells = <1>;
#size-cells = <0>;
reg = <7>;
};
};
};
&i2c2 {
/*
* PCA9548 (2-0070) provides 8 channels connecting to SCM (System
* Controller Module).
*/
i2c-mux@70 {
compatible = "nxp,pca9548";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x70>;
i2c-mux-idle-disconnect;
imux24: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
};
imux25: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
};
imux26: i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
};
imux27: i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
};
imux28: i2c@4 {
#address-cells = <1>;
#size-cells = <0>;
reg = <4>;
};
imux29: i2c@5 {
#address-cells = <1>;
#size-cells = <0>;
reg = <5>;
};
imux30: i2c@6 {
#address-cells = <1>;
#size-cells = <0>;
reg = <6>;
};
imux31: i2c@7 {
#address-cells = <1>;
#size-cells = <0>;
reg = <7>;
};
};
};
&i2c3 {
/*
* PCA9548 (3-0070) provides 8 channels connecting to SMB (Switch
* Main Board).
*/
i2c-mux@70 {
compatible = "nxp,pca9548";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x70>;
i2c-mux-idle-disconnect;
imux32: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
};
imux33: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
};
imux34: i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
};
imux35: i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
};
imux36: i2c@4 {
#address-cells = <1>;
#size-cells = <0>;
reg = <4>;
};
imux37: i2c@5 {
#address-cells = <1>;
#size-cells = <0>;
reg = <5>;
};
imux38: i2c@6 {
#address-cells = <1>;
#size-cells = <0>;
reg = <6>;
};
imux39: i2c@7 {
#address-cells = <1>;
#size-cells = <0>;
reg = <7>;
};
};
};
&i2c6 {
lp5012@14 {
compatible = "ti,lp5012";
reg = <0x14>;
#address-cells = <1>;
#size-cells = <0>;
multi-led@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
color = <LED_COLOR_ID_MULTI>;
function = LED_FUNCTION_ACTIVITY;
label = "sys";
led@0 {
reg = <0>;
color = <LED_COLOR_ID_RED>;
};
led@1 {
reg = <1>;
color = <LED_COLOR_ID_BLUE>;
};
led@2 {
reg = <2>;
color = <LED_COLOR_ID_GREEN>;
};
};
multi-led@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
color = <LED_COLOR_ID_MULTI>;
function = LED_FUNCTION_ACTIVITY;
label = "fan";
led@0 {
reg = <0>;
color = <LED_COLOR_ID_RED>;
};
led@1 {
reg = <1>;
color = <LED_COLOR_ID_BLUE>;
};
led@2 {
reg = <2>;
color = <LED_COLOR_ID_GREEN>;
};
};
multi-led@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
color = <LED_COLOR_ID_MULTI>;
function = LED_FUNCTION_ACTIVITY;
label = "psu";
led@0 {
reg = <0>;
color = <LED_COLOR_ID_RED>;
};
led@1 {
reg = <1>;
color = <LED_COLOR_ID_BLUE>;
};
led@2 {
reg = <2>;
color = <LED_COLOR_ID_GREEN>;
};
};
multi-led@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
color = <LED_COLOR_ID_MULTI>;
function = LED_FUNCTION_ACTIVITY;
label = "scm";
led@0 {
reg = <0>;
color = <LED_COLOR_ID_RED>;
};
led@1 {
reg = <1>;
color = <LED_COLOR_ID_BLUE>;
};
led@2 {
reg = <2>;
color = <LED_COLOR_ID_GREEN>;
};
};
};
};
&i2c8 {
/*
* PCA9548 (8-0070) provides 8 channels connecting to PDB (Power
* Delivery Board).
*/
i2c-mux@70 {
compatible = "nxp,pca9548";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x70>;
i2c-mux-idle-disconnect;
imux40: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
};
imux41: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
};
imux42: i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
};
imux43: i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
};
imux44: i2c@4 {
#address-cells = <1>;
#size-cells = <0>;
reg = <4>;
};
imux45: i2c@5 {
#address-cells = <1>;
#size-cells = <0>;
reg = <5>;
};
imux46: i2c@6 {
#address-cells = <1>;
#size-cells = <0>;
reg = <6>;
};
imux47: i2c@7 {
#address-cells = <1>;
#size-cells = <0>;
reg = <7>;
};
};
};
&i2c15 {
/*
* PCA9548 (15-0076) provides 8 channels connecting to FCM (Fan
* Controller Module).
*/
i2c-mux@76 {
compatible = "nxp,pca9548";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x76>;
i2c-mux-idle-disconnect;
imux48: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
};
imux49: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
};
imux50: i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
};
imux51: i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
};
imux52: i2c@4 {
#address-cells = <1>;
#size-cells = <0>;
reg = <4>;
};
imux53: i2c@5 {
#address-cells = <1>;
#size-cells = <0>;
reg = <5>;
};
imux54: i2c@6 {
#address-cells = <1>;
#size-cells = <0>;
reg = <6>;
};
imux55: i2c@7 {
#address-cells = <1>;
#size-cells = <0>;
reg = <7>;
};
};
};
......@@ -66,7 +66,7 @@ &mac3 {
pinctrl-0 = <&pinctrl_rmii4_default>;
no-hw-checksum;
use-ncsi;
mlx,multi-host;
mellanox,multi-host;
ncsi-ctrl,start-redo-probe;
ncsi-ctrl,no-channel-monitor;
ncsi-package = <1>;
......@@ -211,7 +211,6 @@ &i2c13 {
};
&adc0 {
ref_voltage = <2500>;
status = "okay";
pinctrl-0 = <&pinctrl_adc0_default &pinctrl_adc1_default
&pinctrl_adc2_default &pinctrl_adc3_default
......@@ -220,7 +219,6 @@ &pinctrl_adc4_default &pinctrl_adc5_default
};
&adc1 {
ref_voltage = <2500>;
status = "okay";
pinctrl-0 = <&pinctrl_adc8_default &pinctrl_adc10_default
&pinctrl_adc11_default &pinctrl_adc12_default
......
This diff is collapsed.
// SPDX-License-Identifier: GPL-2.0+
// Copyright (c) 2023 Facebook Inc.
/dts-v1/;
#include "aspeed-g6.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>
#include <dt-bindings/i2c/i2c.h>
/ {
model = "Facebook Minerva CMC";
compatible = "facebook,minerva-cmc", "aspeed,ast2600";
aliases {
serial5 = &uart5;
};
chosen {
stdout-path = "serial5:57600n8";
};
memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x80000000>;
};
iio-hwmon {
compatible = "iio-hwmon";
io-channels = <&adc0 0>, <&adc0 1>, <&adc0 2>, <&adc0 3>,
<&adc0 4>, <&adc0 5>, <&adc0 6>, <&adc0 7>,
<&adc1 2>;
};
};
&uart6 {
status = "okay";
};
&wdt1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_wdtrst1_default>;
aspeed,reset-type = "soc";
aspeed,external-signal;
aspeed,ext-push-pull;
aspeed,ext-active-high;
aspeed,ext-pulse-duration = <256>;
};
&mac3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rmii4_default>;
use-ncsi;
mlx,multi-host;
};
&fmc {
status = "okay";
flash@0 {
status = "okay";
m25p,fast-read;
label = "bmc";
spi-max-frequency = <50000000>;
#include "openbmc-flash-layout-128.dtsi"
};
flash@1 {
status = "okay";
m25p,fast-read;
label = "alt-bmc";
spi-max-frequency = <50000000>;
};
};
&rtc {
status = "okay";
};
&sgpiom1 {
status = "okay";
ngpios = <128>;
bus-frequency = <2000000>;
};
&i2c0 {
status = "okay";
};
&i2c1 {
status = "okay";
temperature-sensor@4b {
compatible = "ti,tmp75";
reg = <0x4B>;
};
eeprom@51 {
compatible = "atmel,24c128";
reg = <0x51>;
};
};
&i2c2 {
status = "okay";
i2c-mux@77 {
compatible = "nxp,pca9548";
reg = <0x77>;
#address-cells = <1>;
#size-cells = <0>;
i2c-mux-idle-disconnect;
i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
eeprom@50 {
compatible = "atmel,24c128";
reg = <0x50>;
};
};
i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
eeprom@50 {
compatible = "atmel,24c128";
reg = <0x50>;
};
};
i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
eeprom@50 {
compatible = "atmel,24c128";
reg = <0x50>;
};
};
i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
eeprom@50 {
compatible = "atmel,24c128";
reg = <0x50>;
};
};
i2c@4 {
#address-cells = <1>;
#size-cells = <0>;
reg = <4>;
eeprom@50 {
compatible = "atmel,24c128";
reg = <0x50>;
};
};
i2c@5 {
#address-cells = <1>;
#size-cells = <0>;
reg = <5>;
eeprom@50 {
compatible = "atmel,24c128";
reg = <0x50>;
};
};
};
};
&i2c3 {
status = "okay";
};
&i2c4 {
status = "okay";
};
&i2c5 {
status = "okay";
};
&i2c6 {
status = "okay";
};
&i2c7 {
status = "okay";
};
&i2c8 {
status = "okay";
};
&i2c9 {
status = "okay";
};
&i2c10 {
status = "okay";
};
&i2c11 {
status = "okay";
};
&i2c12 {
status = "okay";
};
&i2c13 {
status = "okay";
};
&i2c14 {
status = "okay";
multi-master;
ipmb@10 {
compatible = "ipmb-dev";
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
i2c-protocol;
};
};
&i2c15 {
status = "okay";
eeprom@50 {
compatible = "atmel,24c128";
reg = <0x50>;
};
};
&adc0 {
aspeed,int-vref-microvolt = <2500000>;
status = "okay";
pinctrl-0 = <&pinctrl_adc0_default &pinctrl_adc1_default
&pinctrl_adc2_default &pinctrl_adc3_default
&pinctrl_adc4_default &pinctrl_adc5_default
&pinctrl_adc6_default &pinctrl_adc7_default>;
};
&adc1 {
aspeed,int-vref-microvolt = <2500000>;
status = "okay";
pinctrl-0 = <&pinctrl_adc10_default>;
};
&ehci1 {
status = "okay";
};
&uhci {
status = "okay";
};
This diff is collapsed.
......@@ -88,7 +88,7 @@ &mac2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rmii3_default>;
use-ncsi;
mlx,multi-host;
mellanox,multi-host;
};
&mac3 {
......@@ -96,7 +96,7 @@ &mac3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rmii4_default>;
use-ncsi;
mlx,multi-host;
mellanox,multi-host;
};
&fmc {
......@@ -369,7 +369,14 @@ rtc@6f {
&i2c13 {
status = "okay";
bus-frequency = <400000>;
bus-frequency = <100000>;
multi-master;
ipmb@10 {
compatible = "ipmb-dev";
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
i2c-protocol;
};
};
&i2c14 {
......@@ -596,7 +603,6 @@ i2c-mux@72 {
};
&adc0 {
ref_voltage = <2500>;
status = "okay";
pinctrl-0 = <&pinctrl_adc0_default &pinctrl_adc1_default
&pinctrl_adc2_default &pinctrl_adc3_default
......@@ -605,7 +611,6 @@ &pinctrl_adc4_default &pinctrl_adc5_default
};
&adc1 {
ref_voltage = <2500>;
status = "okay";
pinctrl-0 = <&pinctrl_adc8_default &pinctrl_adc9_default>;
};
......
......@@ -95,7 +95,7 @@ &mac0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rmii1_default>;
use-ncsi;
mlx,multi-host;
mellanox,multi-host;
};
&adc {
......
......@@ -488,7 +488,7 @@ pca9551@60 {
#gpio-cells = <2>;
led@0 {
label = "nvme0";
label = "nvme3";
reg = <0>;
retain-state-shutdown;
default-state = "keep";
......@@ -496,7 +496,7 @@ led@0 {
};
led@1 {
label = "nvme1";
label = "nvme2";
reg = <1>;
retain-state-shutdown;
default-state = "keep";
......@@ -504,7 +504,7 @@ led@1 {
};
led@2 {
label = "nvme2";
label = "nvme1";
reg = <2>;
retain-state-shutdown;
default-state = "keep";
......@@ -512,7 +512,7 @@ led@2 {
};
led@3 {
label = "nvme3";
label = "nvme0";
reg = <3>;
retain-state-shutdown;
default-state = "keep";
......
This diff is collapsed.
......@@ -867,22 +867,26 @@ i2c: bus@1e78a000 {
};
fsim0: fsi@1e79b000 {
#interrupt-cells = <1>;
compatible = "aspeed,ast2600-fsi-master", "fsi-master";
reg = <0x1e79b000 0x94>;
interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fsi1_default>;
clocks = <&syscon ASPEED_CLK_GATE_FSICLK>;
interrupt-controller;
status = "disabled";
};
fsim1: fsi@1e79b100 {
#interrupt-cells = <1>;
compatible = "aspeed,ast2600-fsi-master", "fsi-master";
reg = <0x1e79b100 0x94>;
interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fsi2_default>;
clocks = <&syscon ASPEED_CLK_GATE_FSICLK>;
interrupt-controller;
status = "disabled";
};
......
......@@ -165,10 +165,12 @@ occ-hwmon {
};
fsi_hub0: hub@3400 {
#interrupt-cells = <1>;
compatible = "fsi-master-hub";
reg = <0x3400 0x400>;
#address-cells = <2>;
#size-cells = <0>;
interrupt-controller;
};
};
};
......
# SPDX-License-Identifier: GPL-2.0
dtb-$(CONFIG_ARCH_MESON) += amlogic-a4-a113l2-ba400.dtb
dtb-$(CONFIG_ARCH_MESON) += amlogic-a5-a113x2-av400.dtb
dtb-$(CONFIG_ARCH_MESON) += amlogic-c3-c302x-aw409.dtb
dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-an400.dtb
dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-khadas-vim4.dtb
......@@ -16,7 +18,9 @@ dtb-$(CONFIG_ARCH_MESON) += meson-g12a-u200.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-g12a-x96-max.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-g12b-a311d-bananapi-m2s.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-g12b-a311d-khadas-vim3.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-g12b-a311d-khadas-vim3-ts050.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-g12b-bananapi-cm4-cm4io.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-g12b-bananapi-cm4-mnt-reform2.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-g12b-gsking-x.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-g12b-gtking-pro.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-g12b-gtking.dtb
......@@ -76,6 +80,7 @@ dtb-$(CONFIG_ARCH_MESON) += meson-sm1-bananapi-m2-pro.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-sm1-bananapi-m5.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-sm1-h96-max.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-sm1-khadas-vim3l.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-sm1-khadas-vim3l-ts050.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-sm1-s905d3-libretech-cc.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-sm1-odroid-c4.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-sm1-odroid-hc4.dtb
......@@ -86,3 +91,5 @@ dtb-$(CONFIG_ARCH_MESON) += meson-sm1-x96-air.dtb
# Overlays
meson-g12a-fbx8am-brcm-dtbs := meson-g12a-fbx8am.dtb meson-g12a-fbx8am-brcm.dtbo
meson-g12a-fbx8am-realtek-dtbs := meson-g12a-fbx8am.dtb meson-g12a-fbx8am-realtek.dtbo
meson-g12b-a311d-khadas-vim3-ts050-dtbs := meson-g12b-a311d-khadas-vim3.dtb meson-khadas-vim3-ts050.dtbo
meson-sm1-khadas-vim3l-ts050-dtbs := meson-sm1-khadas-vim3l.dtb meson-khadas-vim3-ts050.dtbo
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2024 Amlogic, Inc. All rights reserved.
*/
/dts-v1/;
#include "amlogic-a4.dtsi"
/ {
model = "Amlogic A113L2 ba400 Development Board";
compatible = "amlogic,ba400", "amlogic,a4";
interrupt-parent = <&gic>;
#address-cells = <2>;
#size-cells = <2>;
aliases {
serial0 = &uart_b;
};
memory@0 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x40000000>;
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
/* 10 MiB reserved for ARM Trusted Firmware */
secmon_reserved: secmon@5000000 {
compatible = "shared-dma-pool";
reg = <0x0 0x05000000 0x0 0xa00000>;
no-map;
};
};
};
&uart_b {
status = "okay";
};
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2024 Amlogic, Inc. All rights reserved.
*/
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/gpio/gpio.h>
/ {
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
};
psci {
compatible = "arm,psci-1.0";
method = "smc";
};
xtal: xtal-clk {
compatible = "fixed-clock";
clock-frequency = <24000000>;
clock-output-names = "xtal";
#clock-cells = <0>;
};
soc {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
ranges;
gic: interrupt-controller@fff01000 {
compatible = "arm,gic-400";
reg = <0x0 0xfff01000 0 0x1000>,
<0x0 0xfff02000 0 0x2000>,
<0x0 0xfff04000 0 0x2000>,
<0x0 0xfff06000 0 0x2000>;
#interrupt-cells = <3>;
#address-cells = <0>;
interrupt-controller;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
};
apb: bus@fe000000 {
compatible = "simple-bus";
reg = <0x0 0xfe000000 0x0 0x480000>;
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>;
uart_b: serial@7a000 {
compatible = "amlogic,a4-uart",
"amlogic,meson-s4-uart";
reg = <0x0 0x7a000 0x0 0x18>;
interrupts = <GIC_SPI 169 IRQ_TYPE_EDGE_RISING>;
clocks = <&xtal>, <&xtal>, <&xtal>;
clock-names = "xtal", "pclk", "baud";
status = "disabled";
};
};
};
};
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2024 Amlogic, Inc. All rights reserved.
*/
#include "amlogic-a4-common.dtsi"
/ {
cpus {
#address-cells = <2>;
#size-cells = <0>;
cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x0 0x0>;
enable-method = "psci";
};
cpu1: cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x0 0x1>;
enable-method = "psci";
};
cpu2: cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x0 0x2>;
enable-method = "psci";
};
cpu3: cpu@3 {
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x0 0x3>;
enable-method = "psci";
};
};
};
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2024 Amlogic, Inc. All rights reserved.
*/
/dts-v1/;
#include "amlogic-a5.dtsi"
/ {
model = "Amlogic A113X2 av400 Development Board";
compatible = "amlogic,av400", "amlogic,a5";
interrupt-parent = <&gic>;
#address-cells = <2>;
#size-cells = <2>;
aliases {
serial0 = &uart_b;
};
memory@0 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x40000000>;
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
/* 10 MiB reserved for ARM Trusted Firmware */
secmon_reserved: secmon@5000000 {
compatible = "shared-dma-pool";
reg = <0x0 0x05000000 0x0 0xa00000>;
no-map;
};
};
};
&uart_b {
status = "okay";
};
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2024 Amlogic, Inc. All rights reserved.
*/
#include "amlogic-a4-common.dtsi"
/ {
cpus {
#address-cells = <2>;
#size-cells = <0>;
cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a55";
reg = <0x0 0x0>;
enable-method = "psci";
};
cpu1: cpu@100 {
device_type = "cpu";
compatible = "arm,cortex-a55";
reg = <0x0 0x100>;
enable-method = "psci";
};
cpu2: cpu@200 {
device_type = "cpu";
compatible = "arm,cortex-a55";
reg = <0x0 0x200>;
enable-method = "psci";
};
cpu3: cpu@300 {
device_type = "cpu";
compatible = "arm,cortex-a55";
reg = <0x0 0x300>;
enable-method = "psci";
};
};
};
/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
/*
* Copyright (c) 2024 Amlogic, Inc. All rights reserved.
*/
#ifndef __DTS_AMLOGIC_T7_RESET_H
#define __DTS_AMLOGIC_T7_RESET_H
/* RESET0 */
/* 0-3 */
#define RESET_USB 4
#define RESET_U2DRD 5
#define RESET_U3DRD 6
#define RESET_U3DRD_PIPE0 7
#define RESET_U2PHY20 8
#define RESET_U2PHY21 9
#define RESET_GDC 10
#define RESET_HDMI20_AES 11
#define RESET_HDMIRX 12
#define RESET_HDMIRX_APB 13
#define RESET_DEWARP 14
/* 15 */
#define RESET_HDMITX_CAPB3 16
#define RESET_BRG_VCBUG_DEC 17
#define RESET_VCBUS 18
#define RESET_VID_PLL_DIV 19
#define RESET_VDI6 20
#define RESET_GE2D 21
#define RESET_HDMITXPHY 22
#define RESET_VID_LOCK 23
#define RESET_VENC0 24
#define RESET_VDAC 25
#define RESET_VENC2 26
#define RESET_VENC1 27
#define RESET_RDMA 28
#define RESET_HDMITX 29
#define RESET_VIU 30
#define RESET_VENC 31
/* RESET1 */
#define RESET_AUDIO 32
#define RESET_MALI_CAPB3 33
#define RESET_MALI 34
#define RESET_DDR_APB 35
#define RESET_DDR 36
#define RESET_DOS_CAPB3 37
#define RESET_DOS 38
#define RESET_COMBO_DPHY_CHAN2 39
#define RESET_DEBUG_B 40
#define RESET_DEBUG_A 41
#define RESET_DSP_B 42
#define RESET_DSP_A 43
#define RESET_PCIE_A 44
#define RESET_PCIE_PHY 45
#define RESET_PCIE_APB 46
#define RESET_ANAKIN 47
#define RESET_ETH 48
#define RESET_EDP0_CTRL 49
#define RESET_EDP1_CTRL 50
#define RESET_COMBO_DPHY_CHAN0 51
#define RESET_COMBO_DPHY_CHAN1 52
#define RESET_DSI_LVDS_EDP_TOP 53
#define RESET_PCIE1_PHY 54
#define RESET_PCIE1_APB 55
#define RESET_DDR_1 56
/* 57 */
#define RESET_EDP1_PIPELINE 58
#define RESET_EDP0_PIPELINE 59
#define RESET_MIPI_DSI1_PHY 60
#define RESET_MIPI_DSI0_PHY 61
#define RESET_MIPI_DSI_A_HOST 62
#define RESET_MIPI_DSI_B_HOST 63
/* RESET2 */
#define RESET_DEVICE_MMC_ARB 64
#define RESET_IR_CTRL 65
#define RESET_TS_A73 66
#define RESET_TS_A53 67
#define RESET_SPICC_2 68
#define RESET_SPICC_3 69
#define RESET_SPICC_4 70
#define RESET_SPICC_5 71
#define RESET_SMART_CARD 72
#define RESET_SPICC_0 73
#define RESET_SPICC_1 74
#define RESET_RSA 75
/* 76-79 */
#define RESET_MSR_CLK 80
#define RESET_SPIFC 81
#define RESET_SAR_ADC 82
#define RESET_BT 83
/* 84-87 */
#define RESET_ACODEC 88
#define RESET_CEC 89
#define RESET_AFIFO 90
#define RESET_WATCHDOG 91
/* 92-95 */
/* RESET3 */
#define RESET_BRG_NIC1_GPV 96
#define RESET_BRG_NIC2_GPV 97
#define RESET_BRG_NIC3_GPV 98
#define RESET_BRG_NIC4_GPV 99
#define RESET_BRG_NIC5_GPV 100
/* 101-121 */
#define RESET_MIPI_ISP 122
#define RESET_BRG_ADB_MALI_1 123
#define RESET_BRG_ADB_MALI_0 124
#define RESET_BRG_ADB_A73 125
#define RESET_BRG_ADB_A53 126
#define RESET_BRG_CCI 127
/* RESET4 */
#define RESET_PWM_AO_AB 128
#define RESET_PWM_AO_CD 129
#define RESET_PWM_AO_EF 130
#define RESET_PWM_AO_GH 131
#define RESET_PWM_AB 132
#define RESET_PWM_CD 133
#define RESET_PWM_EF 134
/* 135-137 */
#define RESET_UART_A 138
#define RESET_UART_B 139
#define RESET_UART_C 140
#define RESET_UART_D 141
#define RESET_UART_E 142
#define RESET_UART_F 143
#define RESET_I2C_S_A 144
#define RESET_I2C_M_A 145
#define RESET_I2C_M_B 146
#define RESET_I2C_M_C 147
#define RESET_I2C_M_D 148
#define RESET_I2C_M_E 149
#define RESET_I2C_M_F 150
#define RESET_I2C_M_AO_A 151
#define RESET_SD_EMMC_A 152
#define RESET_SD_EMMC_B 153
#define RESET_SD_EMMC_C 154
#define RESET_I2C_M_AO_B 155
#define RESET_TS_GPU 156
#define RESET_TS_NNA 157
#define RESET_TS_VPN 158
#define RESET_TS_HEVC 159
/* RESET5 */
#define RESET_BRG_NOC_DDR_1 160
#define RESET_BRG_NOC_DDR_0 161
#define RESET_BRG_NOC_MAIN 162
#define RESET_BRG_NOC_ALL 163
/* 164-167 */
#define RESET_BRG_NIC2_SYS 168
#define RESET_BRG_NIC2_MAIN 169
#define RESET_BRG_NIC2_HDMI 170
#define RESET_BRG_NIC2_ALL 171
#define RESET_BRG_NIC3_WAVE 172
#define RESET_BRG_NIC3_VDEC 173
#define RESET_BRG_NIC3_HEVCF 174
#define RESET_BRG_NIC3_HEVCB 175
#define RESET_BRG_NIC3_HCODEC 176
#define RESET_BRG_NIC3_GE2D 177
#define RESET_BRG_NIC3_GDC 178
#define RESET_BRG_NIC3_AMLOGIC 179
#define RESET_BRG_NIC3_MAIN 180
#define RESET_BRG_NIC3_ALL 181
#define RESET_BRG_NIC5_VPU 182
/* 183-185 */
#define RESET_BRG_NIC4_DSPB 186
#define RESET_BRG_NIC4_DSPA 187
#define RESET_BRG_NIC4_VAPB 188
#define RESET_BRG_NIC4_CLK81 189
#define RESET_BRG_NIC4_MAIN 190
#define RESET_BRG_NIC4_ALL 191
/* RESET6 */
#define RESET_BRG_VDEC_PIPEL 192
#define RESET_BRG_HEVCF_DMC_PIPEL 193
#define RESET_BRG_NIC2TONIC4_PIPEL 194
#define RESET_BRG_HDMIRXTONIC2_PIPEL 195
#define RESET_BRG_SECTONIC4_PIPEL 196
#define RESET_BRG_VPUTONOC_PIPEL 197
#define RESET_BRG_NIC4TONOC_PIPEL 198
#define RESET_BRG_NIC3TONOC_PIPEL 199
#define RESET_BRG_NIC2TONOC_PIPEL 200
#define RESET_BRG_NNATONOC_PIPEL 201
#define RESET_BRG_FRISP3_PIPEL 202
#define RESET_BRG_FRISP2_PIPEL 203
#define RESET_BRG_FRISP1_PIPEL 204
#define RESET_BRG_FRISP0_PIPEL 205
/* 206-217 */
#define RESET_BRG_AMPIPE_NAND 218
#define RESET_BRG_AMPIPE_ETH 219
/* 220 */
#define RESET_BRG_AM2AXI0 221
#define RESET_BRG_AM2AXI1 222
#define RESET_BRG_AM2AXI2 223
#endif /* ___DTS_AMLOGIC_T7_RESET_H */
......@@ -5,6 +5,7 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/power/amlogic,t7-pwrc.h>
#include "amlogic-t7-reset.h"
/ {
interrupt-parent = <&gic>;
......@@ -149,6 +150,12 @@ apb4: bus@fe000000 {
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>;
reset: reset-controller@2000 {
compatible = "amlogic,t7-reset";
reg = <0x0 0x2000 0x0 0x98>;
#reset-cells = <1>;
};
watchdog@2100 {
compatible = "amlogic,t7-wdt";
reg = <0x0 0x2100 0x0 0x10>;
......
......@@ -1663,9 +1663,28 @@ pwrc: power-controller {
<250000000>,
<0>; /* Do Nothing */
};
mipi_analog_dphy: phy {
compatible = "amlogic,g12a-mipi-dphy-analog";
#phy-cells = <0>;
status = "disabled";
};
};
};
mipi_dphy: phy@44000 {
compatible = "amlogic,axg-mipi-dphy";
reg = <0x0 0x44000 0x0 0x2000>;
clocks = <&clkc CLKID_MIPI_DSI_PHY>;
clock-names = "pclk";
resets = <&reset RESET_MIPI_DSI_PHY>;
reset-names = "phy";
phys = <&mipi_analog_dphy>;
phy-names = "analog";
#phy-cells = <0>;
status = "disabled";
};
usb3_pcie_phy: phy@46000 {
compatible = "amlogic,g12a-usb3-pcie-phy";
reg = <0x0 0x46000 0x0 0x2000>;
......@@ -2152,6 +2171,15 @@ hdmi_tx_out: endpoint {
remote-endpoint = <&hdmi_tx_in>;
};
};
/* DPI output port */
dpi_port: port@2 {
reg = <2>;
dpi_out: endpoint {
remote-endpoint = <&mipi_dsi_in>;
};
};
};
gic: interrupt-controller@ffc01000 {
......@@ -2189,6 +2217,48 @@ gpio_intc: interrupt-controller@f080 {
amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;
};
mipi_dsi: dsi@7000 {
compatible = "amlogic,meson-g12a-dw-mipi-dsi";
reg = <0x0 0x7000 0x0 0x1000>;
resets = <&reset RESET_MIPI_DSI_HOST>;
reset-names = "top";
clocks = <&clkc CLKID_MIPI_DSI_HOST>,
<&clkc CLKID_MIPI_DSI_PXCLK>,
<&clkc CLKID_CTS_ENCL>;
clock-names = "pclk", "bit", "px";
phys = <&mipi_dphy>;
phy-names = "dphy";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
assigned-clocks = <&clkc CLKID_MIPI_DSI_PXCLK_SEL>,
<&clkc CLKID_CTS_ENCL_SEL>,
<&clkc CLKID_VCLK2_SEL>;
assigned-clock-parents = <&clkc CLKID_GP0_PLL>,
<&clkc CLKID_VCLK2_DIV1>,
<&clkc CLKID_GP0_PLL>;
ports {
#address-cells = <1>;
#size-cells = <0>;
/* VPU VENC Input */
mipi_dsi_venc_port: port@0 {
reg = <0>;
mipi_dsi_in: endpoint {
remote-endpoint = <&dpi_out>;
};
};
/* DSI Output */
mipi_dsi_panel_port: port@1 {
reg = <1>;
};
};
};
watchdog: watchdog@f0d0 {
compatible = "amlogic,meson-gxbb-wdt";
reg = <0x0 0xf0d0 0x0 0x10>;
......
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2023 Neil Armstrong <neil.armstrong@linaro.org>
* Copyright 2023 MNT Research GmbH
*/
/dts-v1/;
#include "meson-g12b-bananapi-cm4.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
/ {
model = "MNT Reform 2 with BPI-CM4 Module";
compatible = "mntre,reform2-cm4", "bananapi,bpi-cm4", "amlogic,a311d", "amlogic,g12b";
chassis-type = "laptop";
aliases {
ethernet0 = &ethmac;
i2c0 = &i2c1;
i2c1 = &i2c3;
};
hdmi_connector: hdmi-connector {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_connector_in: endpoint {
remote-endpoint = <&hdmi_tx_tmds_out>;
};
};
};
leds {
compatible = "gpio-leds";
led-blue {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_STATUS;
gpios = <&gpio_ao GPIOAO_7 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
led-green {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_STATUS;
gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>;
};
};
sound {
compatible = "amlogic,axg-sound-card";
model = "MNT-REFORM2-BPI-CM4";
audio-widgets = "Headphone", "Headphone Jack",
"Speaker", "External Speaker",
"Microphone", "Mic Jack";
audio-aux-devs = <&tdmout_a>, <&tdmout_b>, <&tdmin_b>;
audio-routing = "TDMOUT_A IN 0", "FRDDR_A OUT 0",
"TDMOUT_A IN 1", "FRDDR_B OUT 0",
"TDMOUT_A IN 2", "FRDDR_C OUT 0",
"TDM_A Playback", "TDMOUT_A OUT",
"TDMOUT_B IN 0", "FRDDR_A OUT 1",
"TDMOUT_B IN 1", "FRDDR_B OUT 1",
"TDMOUT_B IN 2", "FRDDR_C OUT 1",
"TDM_B Playback", "TDMOUT_B OUT",
"TDMIN_B IN 1", "TDM_B Capture",
"TDMIN_B IN 4", "TDM_B Loopback",
"TODDR_A IN 1", "TDMIN_B OUT",
"TODDR_B IN 1", "TDMIN_B OUT",
"TODDR_C IN 1", "TDMIN_B OUT",
"Headphone Jack", "HP_L",
"Headphone Jack", "HP_R",
"External Speaker", "SPK_LP",
"External Speaker", "SPK_LN",
"External Speaker", "SPK_RP",
"External Speaker", "SPK_RN",
"LINPUT1", "Mic Jack",
"Mic Jack", "MICB";
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
assigned-clock-parents = <0>, <0>, <0>;
assigned-clock-rates = <294912000>,
<270950400>,
<393216000>;
dai-link-0 {
sound-dai = <&frddr_a>;
};
dai-link-1 {
sound-dai = <&frddr_b>;
};
dai-link-2 {
sound-dai = <&frddr_c>;
};
dai-link-3 {
sound-dai = <&toddr_a>;
};
dai-link-4 {
sound-dai = <&toddr_b>;
};
dai-link-5 {
sound-dai = <&toddr_c>;
};
/* 8ch hdmi interface */
dai-link-6 {
sound-dai = <&tdmif_a>;
dai-format = "i2s";
dai-tdm-slot-tx-mask-0 = <1 1>;
dai-tdm-slot-tx-mask-1 = <1 1>;
dai-tdm-slot-tx-mask-2 = <1 1>;
dai-tdm-slot-tx-mask-3 = <1 1>;
mclk-fs = <256>;
codec {
sound-dai = <&tohdmitx TOHDMITX_I2S_IN_A>;
};
};
/* Analog Audio */
dai-link-7 {
sound-dai = <&tdmif_b>;
dai-format = "i2s";
dai-tdm-slot-tx-mask-0 = <1 1>;
mclk-fs = <256>;
codec {
sound-dai = <&wm8960>;
};
};
/* hdmi glue */
dai-link-8 {
sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
codec {
sound-dai = <&hdmi_tx>;
};
};
};
reg_main_1v8: regulator-main-1v8 {
compatible = "regulator-fixed";
regulator-name = "1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&reg_main_3v3>;
};
reg_main_1v2: regulator-main-1v2 {
compatible = "regulator-fixed";
regulator-name = "1V2";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
vin-supply = <&reg_main_5v>;
};
reg_main_3v3: regulator-main-3v3 {
compatible = "regulator-fixed";
regulator-name = "3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
reg_main_5v: regulator-main-5v {
compatible = "regulator-fixed";
regulator-name = "5V";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
reg_main_usb: regulator-main-usb {
compatible = "regulator-fixed";
regulator-name = "USB_PWR";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&reg_main_5v>;
};
backlight: backlight {
compatible = "pwm-backlight";
pwms = <&pwm_AO_ab 0 10000 0>;
power-supply = <&reg_main_usb>;
enable-gpios = <&gpio 58 GPIO_ACTIVE_HIGH>;
brightness-levels = <0 32 64 128 160 200 255>;
default-brightness-level = <6>;
};
panel {
compatible = "innolux,n125hce-gn1";
power-supply = <&reg_main_3v3>;
backlight = <&backlight>;
no-hpd;
port {
panel_in: endpoint {
remote-endpoint = <&edp_bridge_out>;
};
};
};
clock_12288: clock_12288 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <12288000>;
};
};
&mipi_analog_dphy {
status = "okay";
};
&mipi_dphy {
status = "okay";
};
&mipi_dsi {
status = "okay";
assigned-clocks = <&clkc CLKID_GP0_PLL>,
<&clkc CLKID_MIPI_DSI_PXCLK_SEL>,
<&clkc CLKID_MIPI_DSI_PXCLK>,
<&clkc CLKID_CTS_ENCL_SEL>,
<&clkc CLKID_VCLK2_SEL>;
assigned-clock-parents = <0>,
<&clkc CLKID_GP0_PLL>,
<0>,
<&clkc CLKID_VCLK2_DIV1>,
<&clkc CLKID_GP0_PLL>;
assigned-clock-rates = <936000000>,
<0>,
<936000000>,
<0>,
<0>;
};
&mipi_dsi_panel_port {
mipi_dsi_out: endpoint {
remote-endpoint = <&edp_bridge_in>;
};
};
&cecb_AO {
status = "okay";
};
&ethmac {
status = "okay";
};
&hdmi_tx {
status = "okay";
};
&hdmi_tx_tmds_port {
hdmi_tx_tmds_out: endpoint {
remote-endpoint = <&hdmi_connector_in>;
};
};
&pwm_AO_ab {
pinctrl-names = "default";
pinctrl-0 = <&pwm_ao_a_pins>;
status = "okay";
};
&i2c0 {
status = "okay";
};
&i2c3 {
status = "okay";
edp_bridge: bridge@2c {
compatible = "ti,sn65dsi86";
reg = <0x2c>;
enable-gpios = <&gpio GPIOX_10 GPIO_ACTIVE_HIGH>; // PIN_24 / GPIO8
vccio-supply = <&reg_main_1v8>;
vpll-supply = <&reg_main_1v8>;
vcca-supply = <&reg_main_1v2>;
vcc-supply = <&reg_main_1v2>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
edp_bridge_in: endpoint {
remote-endpoint = <&mipi_dsi_out>;
};
};
port@1 {
reg = <1>;
edp_bridge_out: endpoint {
remote-endpoint = <&panel_in>;
};
};
};
};
};
&i2c2 {
status = "okay";
wm8960: codec@1a {
compatible = "wlf,wm8960";
reg = <0x1a>;
clocks = <&clock_12288>;
clock-names = "mclk";
#sound-dai-cells = <0>;
wlf,shared-lrclk;
};
rtc@68 {
compatible = "nxp,pcf8523";
reg = <0x68>;
};
};
&pcie {
status = "okay";
};
&sd_emmc_b {
status = "okay";
};
&tdmif_a {
status = "okay";
};
&tdmout_a {
status = "okay";
};
&tdmif_b {
pinctrl-0 = <&tdm_b_dout0_pins>, <&tdm_b_fs_pins>, <&tdm_b_sclk_pins>, <&tdm_b_din1_pins>;
pinctrl-names = "default";
assigned-clocks = <&clkc_audio AUD_CLKID_TDM_SCLK_PAD1>,
<&clkc_audio AUD_CLKID_TDM_LRCLK_PAD1>;
assigned-clock-parents = <&clkc_audio AUD_CLKID_MST_B_SCLK>,
<&clkc_audio AUD_CLKID_MST_B_LRCLK>;
assigned-clock-rates = <0>, <0>;
};
&tdmin_b {
status = "okay";
};
&toddr_a {
status = "okay";
};
&toddr_b {
status = "okay";
};
&toddr_c {
status = "okay";
};
&tohdmitx {
status = "okay";
};
&usb {
dr_mode = "host";
status = "okay";
};
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2019 BayLibre, SAS
* Author: Neil Armstrong <narmstrong@baylibre.com>
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/clock/g12a-clkc.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/amlogic,meson-g12a-gpio-intc.h>
/dts-v1/;
/plugin/;
/*
* Enable Khadas TS050 DSI Panel + Touch Controller
* on Khadas VIM3 (A311D) and VIM3L (S905D3)
*/
&{/} {
panel_backlight: backlight {
compatible = "pwm-backlight";
pwms = <&pwm_AO_cd 0 25000 0>;
brightness-levels = <0 255>;
num-interpolated-steps = <255>;
default-brightness-level = <200>;
};
};
&i2c3 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&i2c3_sda_a_pins>, <&i2c3_sck_a_pins>;
pinctrl-names = "default";
status = "okay";
touch-controller@38 {
compatible = "edt,edt-ft5206";
reg = <0x38>;
interrupt-parent = <&gpio_intc>;
interrupts = <IRQID_GPIOA_5 IRQ_TYPE_EDGE_FALLING>;
reset-gpios = <&gpio_expander 6 GPIO_ACTIVE_LOW>;
touchscreen-size-x = <1080>;
touchscreen-size-y = <1920>;
status = "okay";
};
};
&mipi_dsi {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
assigned-clocks = <&clkc CLKID_GP0_PLL>,
<&clkc CLKID_MIPI_DSI_PXCLK_SEL>,
<&clkc CLKID_MIPI_DSI_PXCLK>,
<&clkc CLKID_CTS_ENCL_SEL>,
<&clkc CLKID_VCLK2_SEL>;
assigned-clock-parents = <0>,
<&clkc CLKID_GP0_PLL>,
<0>,
<&clkc CLKID_VCLK2_DIV1>,
<&clkc CLKID_GP0_PLL>;
assigned-clock-rates = <960000000>,
<0>,
<960000000>,
<0>,
<0>;
panel@0 {
compatible = "khadas,ts050";
reset-gpios = <&gpio_expander 0 GPIO_ACTIVE_LOW>;
enable-gpios = <&gpio_expander 1 GPIO_ACTIVE_HIGH>;
power-supply = <&vcc_3v3>;
backlight = <&panel_backlight>;
reg = <0>;
port {
mipi_in_panel: endpoint {
remote-endpoint = <&mipi_out_panel>;
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
mipi_out_panel: endpoint {
remote-endpoint = <&mipi_in_panel>;
};
};
};
};
&mipi_analog_dphy {
status = "okay";
};
&mipi_dphy {
status = "okay";
};
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_c_6_pins>, <&pwm_ao_d_e_pins>;
};
......@@ -65,10 +65,15 @@ xtal: xtal-clk {
#clock-cells = <0>;
};
pwrc: power-controller {
compatible = "amlogic,meson-s4-pwrc";
#power-domain-cells = <1>;
status = "okay";
firmware {
sm: secure-monitor {
compatible = "amlogic,meson-gxbb-sm";
pwrc: power-controller {
compatible = "amlogic,meson-s4-pwrc";
#power-domain-cells = <1>;
};
};
};
soc {
......
......@@ -8,5 +8,6 @@ DTC_FLAGS_jh7110-starfive-visionfive-2-v1.3b := -@
dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-beaglev-starlight.dtb
dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-starfive-visionfive-v1.dtb
dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-milkv-mars.dtb
dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-starfive-visionfive-2-v1.2a.dtb
dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-starfive-visionfive-2-v1.3b.dtb
......@@ -13,7 +13,7 @@ / {
#address-cells = <2>;
#size-cells = <2>;
cpus {
cpus: cpus {
#address-cells = <1>;
#size-cells = <0>;
......
This diff is collapsed.
This diff is collapsed.
......@@ -15,7 +15,7 @@ / {
#address-cells = <2>;
#size-cells = <2>;
cpus {
cpus: cpus {
#address-cells = <1>;
#size-cells = <0>;
......
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