Commit 1b5d2793 authored by Joe Perches's avatar Joe Perches Committed by Martin K. Petersen

scsi: pm8001: Neaten debug logging macros and uses

Every PM8001_<FOO>_DBG macro uses an internal call to pm8001_printk.

Convert all uses of:

	PM8001_<FOO>_DBG(hba, pm8001_printk(fmt, ...))
to
	pm8001_dbg(hba, <FOO>, fmt, ...)

so the visual complexity of each macro is reduced.

The repetitive macro definitions are converted to a single pm8001_dbg and
the level is concatenated using PM8001_##level##_LOGGING for the specific
level test.

Done with coccinelle, checkpatch and a little typing of the new macro
definition.

Miscellanea:

 - Coalesce formats

 - Realign arguments

 - Add missing terminating newlines to formats

 - Remove trailing spaces from formats

 - Change defective loop with printk(KERN_INFO... to emit a 16 byte hex
   block to %p16h

Link: https://lore.kernel.org/r/49f36a93af7752b613d03c89a87078243567fd9a.1605914030.git.joe@perches.comReported-by: default avatarkernel test robot <lkp@intel.com>
Acked-by: default avatarJack Wang <jinpu.wang@cloud.ionos.com>
Signed-off-by: default avatarJoe Perches <joe@perches.com>
Signed-off-by: default avatarMartin K. Petersen <martin.petersen@oracle.com>
parent 27a34943
...@@ -841,10 +841,9 @@ static ssize_t pm8001_store_update_fw(struct device *cdev, ...@@ -841,10 +841,9 @@ static ssize_t pm8001_store_update_fw(struct device *cdev,
pm8001_ha->dev); pm8001_ha->dev);
if (ret) { if (ret) {
PM8001_FAIL_DBG(pm8001_ha, pm8001_dbg(pm8001_ha, FAIL,
pm8001_printk( "Failed to load firmware image file %s, error %d\n",
"Failed to load firmware image file %s, error %d\n", filename_ptr, ret);
filename_ptr, ret));
pm8001_ha->fw_status = FAIL_OPEN_BIOS_FILE; pm8001_ha->fw_status = FAIL_OPEN_BIOS_FILE;
goto out; goto out;
} }
......
This source diff could not be displayed because it is too large. You can view the blob instead.
...@@ -271,15 +271,14 @@ static int pm8001_alloc(struct pm8001_hba_info *pm8001_ha, ...@@ -271,15 +271,14 @@ static int pm8001_alloc(struct pm8001_hba_info *pm8001_ha,
spin_lock_init(&pm8001_ha->lock); spin_lock_init(&pm8001_ha->lock);
spin_lock_init(&pm8001_ha->bitmap_lock); spin_lock_init(&pm8001_ha->bitmap_lock);
PM8001_INIT_DBG(pm8001_ha, pm8001_dbg(pm8001_ha, INIT, "pm8001_alloc: PHY:%x\n",
pm8001_printk("pm8001_alloc: PHY:%x\n", pm8001_ha->chip->n_phy);
pm8001_ha->chip->n_phy));
/* Setup Interrupt */ /* Setup Interrupt */
rc = pm8001_setup_irq(pm8001_ha); rc = pm8001_setup_irq(pm8001_ha);
if (rc) { if (rc) {
PM8001_FAIL_DBG(pm8001_ha, pm8001_printk( pm8001_dbg(pm8001_ha, FAIL,
"pm8001_setup_irq failed [ret: %d]\n", rc)); "pm8001_setup_irq failed [ret: %d]\n", rc);
goto err_out_shost; goto err_out_shost;
} }
/* Request Interrupt */ /* Request Interrupt */
...@@ -394,9 +393,9 @@ static int pm8001_alloc(struct pm8001_hba_info *pm8001_ha, ...@@ -394,9 +393,9 @@ static int pm8001_alloc(struct pm8001_hba_info *pm8001_ha,
&pm8001_ha->memoryMap.region[i].phys_addr_lo, &pm8001_ha->memoryMap.region[i].phys_addr_lo,
pm8001_ha->memoryMap.region[i].total_len, pm8001_ha->memoryMap.region[i].total_len,
pm8001_ha->memoryMap.region[i].alignment) != 0) { pm8001_ha->memoryMap.region[i].alignment) != 0) {
PM8001_FAIL_DBG(pm8001_ha, pm8001_dbg(pm8001_ha, FAIL,
pm8001_printk("Mem%d alloc failed\n", "Mem%d alloc failed\n",
i)); i);
goto err_out; goto err_out;
} }
} }
...@@ -467,15 +466,15 @@ static int pm8001_ioremap(struct pm8001_hba_info *pm8001_ha) ...@@ -467,15 +466,15 @@ static int pm8001_ioremap(struct pm8001_hba_info *pm8001_ha)
pm8001_ha->io_mem[logicalBar].memvirtaddr = pm8001_ha->io_mem[logicalBar].memvirtaddr =
ioremap(pm8001_ha->io_mem[logicalBar].membase, ioremap(pm8001_ha->io_mem[logicalBar].membase,
pm8001_ha->io_mem[logicalBar].memsize); pm8001_ha->io_mem[logicalBar].memsize);
PM8001_INIT_DBG(pm8001_ha, pm8001_dbg(pm8001_ha, INIT,
pm8001_printk("PCI: bar %d, logicalBar %d ", "PCI: bar %d, logicalBar %d\n",
bar, logicalBar)); bar, logicalBar);
PM8001_INIT_DBG(pm8001_ha, pm8001_printk( pm8001_dbg(pm8001_ha, INIT,
"base addr %llx virt_addr=%llx len=%d\n", "base addr %llx virt_addr=%llx len=%d\n",
(u64)pm8001_ha->io_mem[logicalBar].membase, (u64)pm8001_ha->io_mem[logicalBar].membase,
(u64)(unsigned long) (u64)(unsigned long)
pm8001_ha->io_mem[logicalBar].memvirtaddr, pm8001_ha->io_mem[logicalBar].memvirtaddr,
pm8001_ha->io_mem[logicalBar].memsize)); pm8001_ha->io_mem[logicalBar].memsize);
} else { } else {
pm8001_ha->io_mem[logicalBar].membase = 0; pm8001_ha->io_mem[logicalBar].membase = 0;
pm8001_ha->io_mem[logicalBar].memsize = 0; pm8001_ha->io_mem[logicalBar].memsize = 0;
...@@ -520,8 +519,8 @@ static struct pm8001_hba_info *pm8001_pci_alloc(struct pci_dev *pdev, ...@@ -520,8 +519,8 @@ static struct pm8001_hba_info *pm8001_pci_alloc(struct pci_dev *pdev,
else { else {
pm8001_ha->link_rate = LINKRATE_15 | LINKRATE_30 | pm8001_ha->link_rate = LINKRATE_15 | LINKRATE_30 |
LINKRATE_60 | LINKRATE_120; LINKRATE_60 | LINKRATE_120;
PM8001_FAIL_DBG(pm8001_ha, pm8001_printk( pm8001_dbg(pm8001_ha, FAIL,
"Setting link rate to default value\n")); "Setting link rate to default value\n");
} }
sprintf(pm8001_ha->name, "%s%d", DRV_NAME, pm8001_ha->id); sprintf(pm8001_ha->name, "%s%d", DRV_NAME, pm8001_ha->id);
/* IOMB size is 128 for 8088/89 controllers */ /* IOMB size is 128 for 8088/89 controllers */
...@@ -684,13 +683,13 @@ static void pm8001_init_sas_add(struct pm8001_hba_info *pm8001_ha) ...@@ -684,13 +683,13 @@ static void pm8001_init_sas_add(struct pm8001_hba_info *pm8001_ha)
payload.offset = 0; payload.offset = 0;
payload.func_specific = kzalloc(payload.rd_length, GFP_KERNEL); payload.func_specific = kzalloc(payload.rd_length, GFP_KERNEL);
if (!payload.func_specific) { if (!payload.func_specific) {
PM8001_INIT_DBG(pm8001_ha, pm8001_printk("mem alloc fail\n")); pm8001_dbg(pm8001_ha, INIT, "mem alloc fail\n");
return; return;
} }
rc = PM8001_CHIP_DISP->get_nvmd_req(pm8001_ha, &payload); rc = PM8001_CHIP_DISP->get_nvmd_req(pm8001_ha, &payload);
if (rc) { if (rc) {
kfree(payload.func_specific); kfree(payload.func_specific);
PM8001_INIT_DBG(pm8001_ha, pm8001_printk("nvmd failed\n")); pm8001_dbg(pm8001_ha, INIT, "nvmd failed\n");
return; return;
} }
wait_for_completion(&completion); wait_for_completion(&completion);
...@@ -718,9 +717,8 @@ static void pm8001_init_sas_add(struct pm8001_hba_info *pm8001_ha) ...@@ -718,9 +717,8 @@ static void pm8001_init_sas_add(struct pm8001_hba_info *pm8001_ha)
sas_add[7] = sas_add[7] + 4; sas_add[7] = sas_add[7] + 4;
memcpy(&pm8001_ha->phy[i].dev_sas_addr, memcpy(&pm8001_ha->phy[i].dev_sas_addr,
sas_add, SAS_ADDR_SIZE); sas_add, SAS_ADDR_SIZE);
PM8001_INIT_DBG(pm8001_ha, pm8001_dbg(pm8001_ha, INIT, "phy %d sas_addr = %016llx\n", i,
pm8001_printk("phy %d sas_addr = %016llx\n", i, pm8001_ha->phy[i].dev_sas_addr);
pm8001_ha->phy[i].dev_sas_addr));
} }
kfree(payload.func_specific); kfree(payload.func_specific);
#else #else
...@@ -760,7 +758,7 @@ static int pm8001_get_phy_settings_info(struct pm8001_hba_info *pm8001_ha) ...@@ -760,7 +758,7 @@ static int pm8001_get_phy_settings_info(struct pm8001_hba_info *pm8001_ha)
rc = PM8001_CHIP_DISP->get_nvmd_req(pm8001_ha, &payload); rc = PM8001_CHIP_DISP->get_nvmd_req(pm8001_ha, &payload);
if (rc) { if (rc) {
kfree(payload.func_specific); kfree(payload.func_specific);
PM8001_INIT_DBG(pm8001_ha, pm8001_printk("nvmd failed\n")); pm8001_dbg(pm8001_ha, INIT, "nvmd failed\n");
return -ENOMEM; return -ENOMEM;
} }
wait_for_completion(&completion); wait_for_completion(&completion);
...@@ -854,9 +852,9 @@ void pm8001_get_phy_mask(struct pm8001_hba_info *pm8001_ha, int *phymask) ...@@ -854,9 +852,9 @@ void pm8001_get_phy_mask(struct pm8001_hba_info *pm8001_ha, int *phymask)
break; break;
default: default:
PM8001_INIT_DBG(pm8001_ha, pm8001_dbg(pm8001_ha, INIT,
pm8001_printk("Unknown subsystem device=0x%.04x", "Unknown subsystem device=0x%.04x\n",
pm8001_ha->pdev->subsystem_device)); pm8001_ha->pdev->subsystem_device);
} }
} }
...@@ -950,9 +948,9 @@ static u32 pm8001_setup_msix(struct pm8001_hba_info *pm8001_ha) ...@@ -950,9 +948,9 @@ static u32 pm8001_setup_msix(struct pm8001_hba_info *pm8001_ha)
/* Maximum queue number updating in HBA structure */ /* Maximum queue number updating in HBA structure */
pm8001_ha->max_q_num = number_of_intr; pm8001_ha->max_q_num = number_of_intr;
PM8001_INIT_DBG(pm8001_ha, pm8001_printk( pm8001_dbg(pm8001_ha, INIT,
"pci_alloc_irq_vectors request ret:%d no of intr %d\n", "pci_alloc_irq_vectors request ret:%d no of intr %d\n",
rc, pm8001_ha->number_of_intr)); rc, pm8001_ha->number_of_intr);
return 0; return 0;
} }
...@@ -964,9 +962,9 @@ static u32 pm8001_request_msix(struct pm8001_hba_info *pm8001_ha) ...@@ -964,9 +962,9 @@ static u32 pm8001_request_msix(struct pm8001_hba_info *pm8001_ha)
if (pm8001_ha->chip_id != chip_8001) if (pm8001_ha->chip_id != chip_8001)
flag &= ~IRQF_SHARED; flag &= ~IRQF_SHARED;
PM8001_INIT_DBG(pm8001_ha, pm8001_dbg(pm8001_ha, INIT,
pm8001_printk("pci_enable_msix request number of intr %d\n", "pci_enable_msix request number of intr %d\n",
pm8001_ha->number_of_intr)); pm8001_ha->number_of_intr);
for (i = 0; i < pm8001_ha->number_of_intr; i++) { for (i = 0; i < pm8001_ha->number_of_intr; i++) {
snprintf(pm8001_ha->intr_drvname[i], snprintf(pm8001_ha->intr_drvname[i],
...@@ -1002,8 +1000,7 @@ static u32 pm8001_setup_irq(struct pm8001_hba_info *pm8001_ha) ...@@ -1002,8 +1000,7 @@ static u32 pm8001_setup_irq(struct pm8001_hba_info *pm8001_ha)
#ifdef PM8001_USE_MSIX #ifdef PM8001_USE_MSIX
if (pci_find_capability(pdev, PCI_CAP_ID_MSIX)) if (pci_find_capability(pdev, PCI_CAP_ID_MSIX))
return pm8001_setup_msix(pm8001_ha); return pm8001_setup_msix(pm8001_ha);
PM8001_INIT_DBG(pm8001_ha, pm8001_dbg(pm8001_ha, INIT, "MSIX not supported!!!\n");
pm8001_printk("MSIX not supported!!!\n"));
#endif #endif
return 0; return 0;
} }
...@@ -1023,8 +1020,7 @@ static u32 pm8001_request_irq(struct pm8001_hba_info *pm8001_ha) ...@@ -1023,8 +1020,7 @@ static u32 pm8001_request_irq(struct pm8001_hba_info *pm8001_ha)
if (pdev->msix_cap && pci_msi_enabled()) if (pdev->msix_cap && pci_msi_enabled())
return pm8001_request_msix(pm8001_ha); return pm8001_request_msix(pm8001_ha);
else { else {
PM8001_INIT_DBG(pm8001_ha, pm8001_dbg(pm8001_ha, INIT, "MSIX not supported!!!\n");
pm8001_printk("MSIX not supported!!!\n"));
goto intx; goto intx;
} }
#endif #endif
...@@ -1108,8 +1104,8 @@ static int pm8001_pci_probe(struct pci_dev *pdev, ...@@ -1108,8 +1104,8 @@ static int pm8001_pci_probe(struct pci_dev *pdev,
PM8001_CHIP_DISP->chip_soft_rst(pm8001_ha); PM8001_CHIP_DISP->chip_soft_rst(pm8001_ha);
rc = PM8001_CHIP_DISP->chip_init(pm8001_ha); rc = PM8001_CHIP_DISP->chip_init(pm8001_ha);
if (rc) { if (rc) {
PM8001_FAIL_DBG(pm8001_ha, pm8001_printk( pm8001_dbg(pm8001_ha, FAIL,
"chip_init failed [ret: %d]\n", rc)); "chip_init failed [ret: %d]\n", rc);
goto err_out_ha_free; goto err_out_ha_free;
} }
...@@ -1137,8 +1133,8 @@ static int pm8001_pci_probe(struct pci_dev *pdev, ...@@ -1137,8 +1133,8 @@ static int pm8001_pci_probe(struct pci_dev *pdev,
pm8001_post_sas_ha_init(shost, chip); pm8001_post_sas_ha_init(shost, chip);
rc = sas_register_ha(SHOST_TO_SAS_HA(shost)); rc = sas_register_ha(SHOST_TO_SAS_HA(shost));
if (rc) { if (rc) {
PM8001_FAIL_DBG(pm8001_ha, pm8001_printk( pm8001_dbg(pm8001_ha, FAIL,
"sas_register_ha failed [ret: %d]\n", rc)); "sas_register_ha failed [ret: %d]\n", rc);
goto err_out_shost; goto err_out_shost;
} }
list_add_tail(&pm8001_ha->list, &hba_list); list_add_tail(&pm8001_ha->list, &hba_list);
...@@ -1190,8 +1186,8 @@ pm8001_init_ccb_tag(struct pm8001_hba_info *pm8001_ha, struct Scsi_Host *shost, ...@@ -1190,8 +1186,8 @@ pm8001_init_ccb_tag(struct pm8001_hba_info *pm8001_ha, struct Scsi_Host *shost,
pm8001_ha->ccb_info = pm8001_ha->ccb_info =
kcalloc(ccb_count, sizeof(struct pm8001_ccb_info), GFP_KERNEL); kcalloc(ccb_count, sizeof(struct pm8001_ccb_info), GFP_KERNEL);
if (!pm8001_ha->ccb_info) { if (!pm8001_ha->ccb_info) {
PM8001_FAIL_DBG(pm8001_ha, pm8001_printk pm8001_dbg(pm8001_ha, FAIL,
("Unable to allocate memory for ccb\n")); "Unable to allocate memory for ccb\n");
goto err_out_noccb; goto err_out_noccb;
} }
for (i = 0; i < ccb_count; i++) { for (i = 0; i < ccb_count; i++) {
...@@ -1199,8 +1195,8 @@ pm8001_init_ccb_tag(struct pm8001_hba_info *pm8001_ha, struct Scsi_Host *shost, ...@@ -1199,8 +1195,8 @@ pm8001_init_ccb_tag(struct pm8001_hba_info *pm8001_ha, struct Scsi_Host *shost,
sizeof(struct pm8001_prd) * PM8001_MAX_DMA_SG, sizeof(struct pm8001_prd) * PM8001_MAX_DMA_SG,
&pm8001_ha->ccb_info[i].ccb_dma_handle); &pm8001_ha->ccb_info[i].ccb_dma_handle);
if (!pm8001_ha->ccb_info[i].buf_prd) { if (!pm8001_ha->ccb_info[i].buf_prd) {
PM8001_FAIL_DBG(pm8001_ha, pm8001_printk pm8001_dbg(pm8001_ha, FAIL,
("pm80xx: ccb prd memory allocation error\n")); "pm80xx: ccb prd memory allocation error\n");
goto err_out; goto err_out;
} }
pm8001_ha->ccb_info[i].task = NULL; pm8001_ha->ccb_info[i].task = NULL;
...@@ -1344,8 +1340,7 @@ static int pm8001_pci_resume(struct pci_dev *pdev) ...@@ -1344,8 +1340,7 @@ static int pm8001_pci_resume(struct pci_dev *pdev)
/* chip soft rst only for spc */ /* chip soft rst only for spc */
if (pm8001_ha->chip_id == chip_8001) { if (pm8001_ha->chip_id == chip_8001) {
PM8001_CHIP_DISP->chip_soft_rst(pm8001_ha); PM8001_CHIP_DISP->chip_soft_rst(pm8001_ha);
PM8001_INIT_DBG(pm8001_ha, pm8001_dbg(pm8001_ha, INIT, "chip soft reset successful\n");
pm8001_printk("chip soft reset successful\n"));
} }
rc = PM8001_CHIP_DISP->chip_init(pm8001_ha); rc = PM8001_CHIP_DISP->chip_init(pm8001_ha);
if (rc) if (rc)
......
This diff is collapsed.
...@@ -69,45 +69,16 @@ ...@@ -69,45 +69,16 @@
#define PM8001_DEV_LOGGING 0x80 /* development message logging */ #define PM8001_DEV_LOGGING 0x80 /* development message logging */
#define PM8001_DEVIO_LOGGING 0x100 /* development io message logging */ #define PM8001_DEVIO_LOGGING 0x100 /* development io message logging */
#define PM8001_IOERR_LOGGING 0x200 /* development io err message logging */ #define PM8001_IOERR_LOGGING 0x200 /* development io err message logging */
#define pm8001_printk(format, arg...) pr_info("%s:: %s %d:" \
format, pm8001_ha->name, __func__, __LINE__, ## arg)
#define PM8001_CHECK_LOGGING(HBA, LEVEL, CMD) \
do { \
if (unlikely(HBA->logging_level & LEVEL)) \
do { \
CMD; \
} while (0); \
} while (0);
#define PM8001_EH_DBG(HBA, CMD) \ #define pm8001_printk(fmt, ...) \
PM8001_CHECK_LOGGING(HBA, PM8001_EH_LOGGING, CMD) pr_info("%s:: %s %d:" fmt, \
pm8001_ha->name, __func__, __LINE__, ##__VA_ARGS__)
#define PM8001_INIT_DBG(HBA, CMD) \ #define pm8001_dbg(HBA, level, fmt, ...) \
PM8001_CHECK_LOGGING(HBA, PM8001_INIT_LOGGING, CMD) do { \
if (unlikely((HBA)->logging_level & PM8001_##level##_LOGGING)) \
#define PM8001_DISC_DBG(HBA, CMD) \ pm8001_printk(fmt, ##__VA_ARGS__); \
PM8001_CHECK_LOGGING(HBA, PM8001_DISC_LOGGING, CMD) } while (0)
#define PM8001_IO_DBG(HBA, CMD) \
PM8001_CHECK_LOGGING(HBA, PM8001_IO_LOGGING, CMD)
#define PM8001_FAIL_DBG(HBA, CMD) \
PM8001_CHECK_LOGGING(HBA, PM8001_FAIL_LOGGING, CMD)
#define PM8001_IOCTL_DBG(HBA, CMD) \
PM8001_CHECK_LOGGING(HBA, PM8001_IOCTL_LOGGING, CMD)
#define PM8001_MSG_DBG(HBA, CMD) \
PM8001_CHECK_LOGGING(HBA, PM8001_MSG_LOGGING, CMD)
#define PM8001_DEV_DBG(HBA, CMD) \
PM8001_CHECK_LOGGING(HBA, PM8001_DEV_LOGGING, CMD)
#define PM8001_DEVIO_DBG(HBA, CMD) \
PM8001_CHECK_LOGGING(HBA, PM8001_DEVIO_LOGGING, CMD)
#define PM8001_IOERR_DBG(HBA, CMD) \
PM8001_CHECK_LOGGING(HBA, PM8001_IOERR_LOGGING, CMD)
#define PM8001_USE_TASKLET #define PM8001_USE_TASKLET
#define PM8001_USE_MSIX #define PM8001_USE_MSIX
......
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