Commit 1b5e5299 authored by Garmin.Chang's avatar Garmin.Chang Committed by Stephen Boyd

clk: mediatek: Add MT8188 imp i2c wrapper clock support

Add MT8188 imp i2c wrapper clock controllers which provide clock gate
control in I2C IP blocks.
Signed-off-by: default avatarGarmin.Chang <Garmin.Chang@mediatek.com>
Reviewed-by: default avatarChen-Yu Tsai <wenst@chromium.org>
Reviewed-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20230331123621.16167-19-Garmin.Chang@mediatek.comSigned-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent f42b9e9a
......@@ -706,6 +706,13 @@ config COMMON_CLK_MT8188_IMGSYS
help
This driver supports MediaTek MT8188 imgsys and imgsys2 clocks.
config COMMON_CLK_MT8188_IMP_IIC_WRAP
tristate "Clock driver for MediaTek MT8188 imp_iic_wrap"
depends on COMMON_CLK_MT8188
default COMMON_CLK_MT8188
help
This driver supports MediaTek MT8188 I2C/I3C clocks.
config COMMON_CLK_MT8188_IPESYS
tristate "Clock driver for MediaTek MT8188 ipesys"
depends on COMMON_CLK_MT8188_IMGSYS
......
......@@ -104,6 +104,7 @@ obj-$(CONFIG_COMMON_CLK_MT8188) += clk-mt8188-apmixedsys.o clk-mt8188-topckgen.o
clk-mt8188-peri_ao.o clk-mt8188-infra_ao.o
obj-$(CONFIG_COMMON_CLK_MT8188_CAMSYS) += clk-mt8188-cam.o clk-mt8188-ccu.o
obj-$(CONFIG_COMMON_CLK_MT8188_IMGSYS) += clk-mt8188-img.o
obj-$(CONFIG_COMMON_CLK_MT8188_IMP_IIC_WRAP) += clk-mt8188-imp_iic_wrap.o
obj-$(CONFIG_COMMON_CLK_MT8188_IPESYS) += clk-mt8188-ipe.o
obj-$(CONFIG_COMMON_CLK_MT8188_MFGCFG) += clk-mt8188-mfg.o
obj-$(CONFIG_COMMON_CLK_MT8188_VDECSYS) += clk-mt8188-vdec.o
......
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2022 MediaTek Inc.
* Author: Garmin Chang <garmin.chang@mediatek.com>
*/
#include <dt-bindings/clock/mediatek,mt8188-clk.h>
#include <linux/clk-provider.h>
#include <linux/platform_device.h>
#include "clk-gate.h"
#include "clk-mtk.h"
static const struct mtk_gate_regs imp_iic_wrap_cg_regs = {
.set_ofs = 0xe08,
.clr_ofs = 0xe04,
.sta_ofs = 0xe00,
};
#define GATE_IMP_IIC_WRAP(_id, _name, _parent, _shift) \
GATE_MTK_FLAGS(_id, _name, _parent, &imp_iic_wrap_cg_regs, _shift, \
&mtk_clk_gate_ops_setclr, CLK_OPS_PARENT_ENABLE)
static const struct mtk_gate imp_iic_wrap_c_clks[] = {
GATE_IMP_IIC_WRAP(CLK_IMP_IIC_WRAP_C_AP_CLOCK_I2C0,
"imp_iic_wrap_c_ap_clock_i2c0", "top_i2c", 0),
GATE_IMP_IIC_WRAP(CLK_IMP_IIC_WRAP_C_AP_CLOCK_I2C2,
"imp_iic_wrap_c_ap_clock_i2c2", "top_i2c", 1),
GATE_IMP_IIC_WRAP(CLK_IMP_IIC_WRAP_C_AP_CLOCK_I2C3,
"imp_iic_wrap_c_ap_clock_i2c3", "top_i2c", 2),
};
static const struct mtk_gate imp_iic_wrap_w_clks[] = {
GATE_IMP_IIC_WRAP(CLK_IMP_IIC_WRAP_W_AP_CLOCK_I2C1,
"imp_iic_wrap_w_ap_clock_i2c1", "top_i2c", 0),
GATE_IMP_IIC_WRAP(CLK_IMP_IIC_WRAP_W_AP_CLOCK_I2C4,
"imp_iic_wrap_w_ap_clock_i2c4", "top_i2c", 1),
};
static const struct mtk_gate imp_iic_wrap_en_clks[] = {
GATE_IMP_IIC_WRAP(CLK_IMP_IIC_WRAP_EN_AP_CLOCK_I2C5,
"imp_iic_wrap_en_ap_clock_i2c5", "top_i2c", 0),
GATE_IMP_IIC_WRAP(CLK_IMP_IIC_WRAP_EN_AP_CLOCK_I2C6,
"imp_iic_wrap_en_ap_clock_i2c6", "top_i2c", 1),
};
static const struct mtk_clk_desc imp_iic_wrap_c_desc = {
.clks = imp_iic_wrap_c_clks,
.num_clks = ARRAY_SIZE(imp_iic_wrap_c_clks),
};
static const struct mtk_clk_desc imp_iic_wrap_w_desc = {
.clks = imp_iic_wrap_w_clks,
.num_clks = ARRAY_SIZE(imp_iic_wrap_w_clks),
};
static const struct mtk_clk_desc imp_iic_wrap_en_desc = {
.clks = imp_iic_wrap_en_clks,
.num_clks = ARRAY_SIZE(imp_iic_wrap_en_clks),
};
static const struct of_device_id of_match_clk_mt8188_imp_iic_wrap[] = {
{ .compatible = "mediatek,mt8188-imp-iic-wrap-c", .data = &imp_iic_wrap_c_desc },
{ .compatible = "mediatek,mt8188-imp-iic-wrap-w", .data = &imp_iic_wrap_w_desc },
{ .compatible = "mediatek,mt8188-imp-iic-wrap-en", .data = &imp_iic_wrap_en_desc },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(platform, of_match_clk_mt8188_imp_iic_wrap);
static struct platform_driver clk_mt8188_imp_iic_wrap_drv = {
.probe = mtk_clk_simple_probe,
.remove = mtk_clk_simple_remove,
.driver = {
.name = "clk-mt8188-imp_iic_wrap",
.of_match_table = of_match_clk_mt8188_imp_iic_wrap,
},
};
module_platform_driver(clk_mt8188_imp_iic_wrap_drv);
MODULE_LICENSE("GPL");
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