Commit 1b75b05b authored by Ivan Kokshaysky's avatar Ivan Kokshaysky Committed by Linus Torvalds

alpha: fixes for specific machine types

Files:

arch/alpha/kernel/core_mcpcia.c
arch/alpha/kernel/sys_rawhide.c
include/asm-alpha/core_mcpcia.h

	Determine correct hose configuration; RAWHIDE family can have
        2 or 4 hoses, so make sure non-existent hoses are ignored.

arch/alpha/kernel/err_titan.c

	Supply a needed #include <asm/irq_regs.h>

arch/alpha/kernel/module.c

	Add some useful output to the relocation overflow messages.

arch/alpha/kernel/sys_noritake.c

	Supply necessary noritake_end_irq() to correct interrupt handling.
	This fixes a problem first noted by hangs during boot probing with
	a DE500-BA TULIP NIC present.

arch/alpha/kernel/sys_sio.c

	Correct saving of original PIRQ register (PCI IRQ routing);
	change default PIRQ setting to leave PCI IRQs 9 and 14 free to
	be used for sound (Multia) and IDE (any), respectively.

include/asm-alpha/io.h

	Supply the "isa_virt_to_bus" routine.
Signed-off-by: default avatarJay Estabrook <jay.estabrook@hp.com>
Signed-off-by: default avatarIvan Kokshaysky <ink@jurassic.park.msu.ru>
Cc: Richard Henderson <rth@twiddle.net>
Signed-off-by: default avatarAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
parent 8a93258c
...@@ -40,8 +40,6 @@ ...@@ -40,8 +40,6 @@
# define DBG_CFG(args) # define DBG_CFG(args)
#endif #endif
#define MCPCIA_MAX_HOSES 4
/* /*
* Given a bus, device, and function number, compute resulting * Given a bus, device, and function number, compute resulting
* configuration space address and setup the MCPCIA_HAXR2 register * configuration space address and setup the MCPCIA_HAXR2 register
......
...@@ -16,6 +16,7 @@ ...@@ -16,6 +16,7 @@
#include <asm/smp.h> #include <asm/smp.h>
#include <asm/err_common.h> #include <asm/err_common.h>
#include <asm/err_ev6.h> #include <asm/err_ev6.h>
#include <asm/irq_regs.h>
#include "err_impl.h" #include "err_impl.h"
#include "proto.h" #include "proto.h"
......
...@@ -285,12 +285,12 @@ apply_relocate_add(Elf64_Shdr *sechdrs, const char *strtab, ...@@ -285,12 +285,12 @@ apply_relocate_add(Elf64_Shdr *sechdrs, const char *strtab,
reloc_overflow: reloc_overflow:
if (ELF64_ST_TYPE (sym->st_info) == STT_SECTION) if (ELF64_ST_TYPE (sym->st_info) == STT_SECTION)
printk(KERN_ERR printk(KERN_ERR
"module %s: Relocation overflow vs section %d\n", "module %s: Relocation (type %lu) overflow vs section %d\n",
me->name, sym->st_shndx); me->name, r_type, sym->st_shndx);
else else
printk(KERN_ERR printk(KERN_ERR
"module %s: Relocation overflow vs %s\n", "module %s: Relocation (type %lu) overflow vs %s\n",
me->name, strtab + sym->st_name); me->name, r_type, strtab + sym->st_name);
return -ENOEXEC; return -ENOEXEC;
} }
} }
......
...@@ -66,6 +66,13 @@ noritake_startup_irq(unsigned int irq) ...@@ -66,6 +66,13 @@ noritake_startup_irq(unsigned int irq)
return 0; return 0;
} }
static void
noritake_end_irq(unsigned int irq)
{
if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
noritake_enable_irq(irq);
}
static struct hw_interrupt_type noritake_irq_type = { static struct hw_interrupt_type noritake_irq_type = {
.typename = "NORITAKE", .typename = "NORITAKE",
.startup = noritake_startup_irq, .startup = noritake_startup_irq,
...@@ -73,7 +80,7 @@ static struct hw_interrupt_type noritake_irq_type = { ...@@ -73,7 +80,7 @@ static struct hw_interrupt_type noritake_irq_type = {
.enable = noritake_enable_irq, .enable = noritake_enable_irq,
.disable = noritake_disable_irq, .disable = noritake_disable_irq,
.ack = noritake_disable_irq, .ack = noritake_disable_irq,
.end = noritake_enable_irq, .end = noritake_end_irq,
}; };
static void static void
......
...@@ -52,6 +52,9 @@ rawhide_update_irq_hw(int hose, int mask) ...@@ -52,6 +52,9 @@ rawhide_update_irq_hw(int hose, int mask)
*(vuip)MCPCIA_INT_MASK0(MCPCIA_HOSE2MID(hose)); *(vuip)MCPCIA_INT_MASK0(MCPCIA_HOSE2MID(hose));
} }
#define hose_exists(h) \
(((h) < MCPCIA_MAX_HOSES) && (cached_irq_masks[(h)] != 0))
static inline void static inline void
rawhide_enable_irq(unsigned int irq) rawhide_enable_irq(unsigned int irq)
{ {
...@@ -59,6 +62,9 @@ rawhide_enable_irq(unsigned int irq) ...@@ -59,6 +62,9 @@ rawhide_enable_irq(unsigned int irq)
irq -= 16; irq -= 16;
hose = irq / 24; hose = irq / 24;
if (!hose_exists(hose)) /* if hose non-existent, exit */
return;
irq -= hose * 24; irq -= hose * 24;
mask = 1 << irq; mask = 1 << irq;
...@@ -76,6 +82,9 @@ rawhide_disable_irq(unsigned int irq) ...@@ -76,6 +82,9 @@ rawhide_disable_irq(unsigned int irq)
irq -= 16; irq -= 16;
hose = irq / 24; hose = irq / 24;
if (!hose_exists(hose)) /* if hose non-existent, exit */
return;
irq -= hose * 24; irq -= hose * 24;
mask = ~(1 << irq) | hose_irq_masks[hose]; mask = ~(1 << irq) | hose_irq_masks[hose];
...@@ -93,6 +102,9 @@ rawhide_mask_and_ack_irq(unsigned int irq) ...@@ -93,6 +102,9 @@ rawhide_mask_and_ack_irq(unsigned int irq)
irq -= 16; irq -= 16;
hose = irq / 24; hose = irq / 24;
if (!hose_exists(hose)) /* if hose non-existent, exit */
return;
irq -= hose * 24; irq -= hose * 24;
mask1 = 1 << irq; mask1 = 1 << irq;
mask = ~mask1 | hose_irq_masks[hose]; mask = ~mask1 | hose_irq_masks[hose];
...@@ -169,6 +181,9 @@ rawhide_init_irq(void) ...@@ -169,6 +181,9 @@ rawhide_init_irq(void)
mcpcia_init_hoses(); mcpcia_init_hoses();
/* Clear them all; only hoses that exist will be non-zero. */
for (i = 0; i < MCPCIA_MAX_HOSES; i++) cached_irq_masks[i] = 0;
for (hose = hose_head; hose; hose = hose->next) { for (hose = hose_head; hose; hose = hose->next) {
unsigned int h = hose->index; unsigned int h = hose->index;
unsigned int mask = hose_irq_masks[h]; unsigned int mask = hose_irq_masks[h];
......
...@@ -84,12 +84,16 @@ alphabook1_init_arch(void) ...@@ -84,12 +84,16 @@ alphabook1_init_arch(void)
static void __init static void __init
sio_pci_route(void) sio_pci_route(void)
{ {
#if defined(ALPHA_RESTORE_SRM_SETUP) unsigned int orig_route_tab;
/* First, read and save the original setting. */
/* First, ALWAYS read and print the original setting. */
pci_bus_read_config_dword(pci_isa_hose->bus, PCI_DEVFN(7, 0), 0x60, pci_bus_read_config_dword(pci_isa_hose->bus, PCI_DEVFN(7, 0), 0x60,
&saved_config.orig_route_tab); &orig_route_tab);
printk("%s: PIRQ original 0x%x new 0x%x\n", __FUNCTION__, printk("%s: PIRQ original 0x%x new 0x%x\n", __FUNCTION__,
saved_config.orig_route_tab, alpha_mv.sys.sio.route_tab); orig_route_tab, alpha_mv.sys.sio.route_tab);
#if defined(ALPHA_RESTORE_SRM_SETUP)
saved_config.orig_route_tab = orig_route_tab;
#endif #endif
/* Now override with desired setting. */ /* Now override with desired setting. */
...@@ -334,7 +338,7 @@ struct alpha_machine_vector avanti_mv __initmv = { ...@@ -334,7 +338,7 @@ struct alpha_machine_vector avanti_mv __initmv = {
.pci_swizzle = common_swizzle, .pci_swizzle = common_swizzle,
.sys = { .sio = { .sys = { .sio = {
.route_tab = 0x0b0a0e0f, .route_tab = 0x0b0a050f, /* leave 14 for IDE, 9 for SND */
}} }}
}; };
ALIAS_MV(avanti) ALIAS_MV(avanti)
......
...@@ -72,6 +72,8 @@ ...@@ -72,6 +72,8 @@
* *
*/ */
#define MCPCIA_MAX_HOSES 4
#define MCPCIA_MID(m) ((unsigned long)(m) << 33) #define MCPCIA_MID(m) ((unsigned long)(m) << 33)
/* Dodge has PCI0 and PCI1 at MID 4 and 5 respectively. /* Dodge has PCI0 and PCI1 at MID 4 and 5 respectively.
......
...@@ -113,6 +113,7 @@ static inline unsigned long virt_to_bus(void *address) ...@@ -113,6 +113,7 @@ static inline unsigned long virt_to_bus(void *address)
unsigned long bus = phys + __direct_map_base; unsigned long bus = phys + __direct_map_base;
return phys <= __direct_map_size ? bus : 0; return phys <= __direct_map_size ? bus : 0;
} }
#define isa_virt_to_bus virt_to_bus
static inline void *bus_to_virt(unsigned long address) static inline void *bus_to_virt(unsigned long address)
{ {
......
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