Commit 1b871826 authored by Jean Delvare's avatar Jean Delvare

hwmon-vid: Add support for AMD family 10h CPUs

The AMD family 10h CPUs use the same VID decoding table as the family
0Fh CPUs.
Signed-off-by: default avatarJean Delvare <khali@linux-fr.org>
Cc: Rudolf Marek <r.marek@assembler.cz>
parent dd56b638
...@@ -180,6 +180,7 @@ static struct vrm_model vrm_models[] = { ...@@ -180,6 +180,7 @@ static struct vrm_model vrm_models[] = {
{X86_VENDOR_AMD, 0x6, ANY, ANY, 90}, /* Athlon Duron etc */ {X86_VENDOR_AMD, 0x6, ANY, ANY, 90}, /* Athlon Duron etc */
{X86_VENDOR_AMD, 0xF, 0x3F, ANY, 24}, /* Athlon 64, Opteron */ {X86_VENDOR_AMD, 0xF, 0x3F, ANY, 24}, /* Athlon 64, Opteron */
{X86_VENDOR_AMD, 0xF, ANY, ANY, 25}, /* NPT family 0Fh */ {X86_VENDOR_AMD, 0xF, ANY, ANY, 25}, /* NPT family 0Fh */
{X86_VENDOR_AMD, 0x10, ANY, ANY, 25}, /* NPT family 10h */
{X86_VENDOR_INTEL, 0x6, 0x9, ANY, 13}, /* Pentium M (130 nm) */ {X86_VENDOR_INTEL, 0x6, 0x9, ANY, 13}, /* Pentium M (130 nm) */
{X86_VENDOR_INTEL, 0x6, 0xB, ANY, 85}, /* Tualatin */ {X86_VENDOR_INTEL, 0x6, 0xB, ANY, 85}, /* Tualatin */
{X86_VENDOR_INTEL, 0x6, 0xD, ANY, 13}, /* Pentium M (90 nm) */ {X86_VENDOR_INTEL, 0x6, 0xD, ANY, 13}, /* Pentium M (90 nm) */
......
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