Commit 1ccba836 authored by lucasvr@org.rmk.(none)'s avatar lucasvr@org.rmk.(none) Committed by Russell King

[ARM PATCH] 2528/1: S3C2410 - modifies S3C2410_{VA,SZ} to S3C24XX_{VA,SZ}

Patch from Lucas Correia Villa Real

This patch modifies ocurrences of S3C2410_{VA,SZ} to S3C24XX_{VA,SZ},
as well as defining S3C2400 physical mappings on
include/asm-arm/arch-s3c2410/map.h.

This cleans up the naming of the virtual address macros, which are
fixed for all S3C24XX systems. This should clean up any confusion
about whether the virtual addresses are specific to the CPU or to
the arch.

Signed-off-by: Lucas Correia Villa Real
Signed-off-by: Ben Dooks
Signed-off-by: Russell King
parent fdb68a3a
......@@ -15,9 +15,10 @@
* 04-Jan-2005 BJD New uart initialisation
* 10-Jan-2005 BJD Moved generic init here, specific to cpu headers
* 14-Jan-2005 BJD Added s3c24xx_init_clocks() call
* 10-Mar-2005 LCVR Changed S3C2410_{VA,SZ} to S3C24XX_{VA,SZ} on IODESC_ENT
*/
#define IODESC_ENT(x) { S3C2410_VA_##x, S3C2410_PA_##x, S3C2410_SZ_##x, MT_DEVICE }
#define IODESC_ENT(x) { S3C24XX_VA_##x, S3C2410_PA_##x, S3C24XX_SZ_##x, MT_DEVICE }
#ifndef MHZ
#define MHZ (1000*1000)
......
......@@ -10,6 +10,7 @@
* published by the Free Software Foundation.
*
* Modifications:
* 10-Mar-2005 LCVR Changed S3C2410_{VA,SZ} to S3C24XX_{VA,SZ}
* 10-Feb-2005 BJD Added camera from guillaume.gourat@nexvision.tv
* 29-Aug-2004 BJD Added timers 0 through 3
* 29-Aug-2004 BJD Changed index of devices we only have one of to -1
......@@ -46,7 +47,7 @@ struct platform_device *s3c24xx_uart_devs[3];
static struct resource s3c_usb_resource[] = {
[0] = {
.start = S3C2410_PA_USBHOST,
.end = S3C2410_PA_USBHOST + S3C2410_SZ_USBHOST,
.end = S3C2410_PA_USBHOST + S3C24XX_SZ_USBHOST,
.flags = IORESOURCE_MEM,
},
[1] = {
......@@ -76,7 +77,7 @@ EXPORT_SYMBOL(s3c_device_usb);
static struct resource s3c_lcd_resource[] = {
[0] = {
.start = S3C2410_PA_LCD,
.end = S3C2410_PA_LCD + S3C2410_SZ_LCD,
.end = S3C2410_PA_LCD + S3C24XX_SZ_LCD,
.flags = IORESOURCE_MEM,
},
[1] = {
......@@ -107,7 +108,7 @@ EXPORT_SYMBOL(s3c_device_lcd);
static struct resource s3c_nand_resource[] = {
[0] = {
.start = S3C2410_PA_NAND,
.end = S3C2410_PA_NAND + S3C2410_SZ_NAND,
.end = S3C2410_PA_NAND + S3C24XX_SZ_NAND,
.flags = IORESOURCE_MEM,
}
};
......@@ -126,7 +127,7 @@ EXPORT_SYMBOL(s3c_device_nand);
static struct resource s3c_usbgadget_resource[] = {
[0] = {
.start = S3C2410_PA_USBDEV,
.end = S3C2410_PA_USBDEV + S3C2410_SZ_USBDEV,
.end = S3C2410_PA_USBDEV + S3C24XX_SZ_USBDEV,
.flags = IORESOURCE_MEM,
},
[1] = {
......@@ -151,7 +152,7 @@ EXPORT_SYMBOL(s3c_device_usbgadget);
static struct resource s3c_wdt_resource[] = {
[0] = {
.start = S3C2410_PA_WATCHDOG,
.end = S3C2410_PA_WATCHDOG + S3C2410_SZ_WATCHDOG,
.end = S3C2410_PA_WATCHDOG + S3C24XX_SZ_WATCHDOG,
.flags = IORESOURCE_MEM,
},
[1] = {
......@@ -176,7 +177,7 @@ EXPORT_SYMBOL(s3c_device_wdt);
static struct resource s3c_i2c_resource[] = {
[0] = {
.start = S3C2410_PA_IIC,
.end = S3C2410_PA_IIC + S3C2410_SZ_IIC,
.end = S3C2410_PA_IIC + S3C24XX_SZ_IIC,
.flags = IORESOURCE_MEM,
},
[1] = {
......@@ -201,7 +202,7 @@ EXPORT_SYMBOL(s3c_device_i2c);
static struct resource s3c_iis_resource[] = {
[0] = {
.start = S3C2410_PA_IIS,
.end = S3C2410_PA_IIS + S3C2410_SZ_IIS,
.end = S3C2410_PA_IIS + S3C24XX_SZ_IIS,
.flags = IORESOURCE_MEM,
}
};
......@@ -255,7 +256,7 @@ EXPORT_SYMBOL(s3c_device_rtc);
static struct resource s3c_adc_resource[] = {
[0] = {
.start = S3C2410_PA_ADC,
.end = S3C2410_PA_ADC + S3C2410_SZ_ADC,
.end = S3C2410_PA_ADC + S3C24XX_SZ_ADC,
.flags = IORESOURCE_MEM,
},
[1] = {
......@@ -278,7 +279,7 @@ struct platform_device s3c_device_adc = {
static struct resource s3c_sdi_resource[] = {
[0] = {
.start = S3C2410_PA_SDI,
.end = S3C2410_PA_SDI + S3C2410_SZ_SDI,
.end = S3C2410_PA_SDI + S3C24XX_SZ_SDI,
.flags = IORESOURCE_MEM,
},
[1] = {
......
......@@ -24,6 +24,7 @@
* 10-Jan-2005 BJD Removed include of s3c2410.h
* 14-Jan-2005 BJD Add support for muitlple NAND devices
* 03-Mar-2005 BJD Ensured that bast-cpld.h is included
* 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
*/
#include <linux/kernel.h>
......@@ -82,8 +83,8 @@
static struct map_desc bast_iodesc[] __initdata = {
/* ISA IO areas */
{ S3C2410_VA_ISA_BYTE, PA_CS2(BAST_PA_ISAIO), SZ_16M, MT_DEVICE },
{ S3C2410_VA_ISA_WORD, PA_CS3(BAST_PA_ISAIO), SZ_16M, MT_DEVICE },
{ S3C24XX_VA_ISA_BYTE, PA_CS2(BAST_PA_ISAIO), SZ_16M, MT_DEVICE },
{ S3C24XX_VA_ISA_WORD, PA_CS3(BAST_PA_ISAIO), SZ_16M, MT_DEVICE },
/* we could possibly compress the next set down into a set of smaller tables
* pagetables, but that would mean using an L2 section, and it still means
......@@ -409,7 +410,7 @@ static __init void bast_init_machine(void)
MACHINE_START(BAST, "Simtec-BAST")
MAINTAINER("Ben Dooks <ben@simtec.co.uk>")
BOOT_MEM(S3C2410_SDRAM_PA, S3C2410_PA_UART, S3C2410_VA_UART)
BOOT_MEM(S3C2410_SDRAM_PA, S3C2410_PA_UART, S3C24XX_VA_UART)
BOOT_PARAMS(S3C2410_SDRAM_PA + 0x100)
MAPIO(bast_map_io)
INITIRQ(bast_init_irq)
......
......@@ -23,6 +23,7 @@
* 04-Jan-2005 BJD Updated uart init call
* 10-Jan-2005 BJD Removed include of s3c2410.h
* 14-Jan-2005 BJD Added clock init
* 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
*/
#include <linux/kernel.h>
......@@ -117,7 +118,7 @@ void __init h1940_init_irq(void)
MACHINE_START(H1940, "IPAQ-H1940")
MAINTAINER("Ben Dooks <ben@fluff.org>")
BOOT_MEM(S3C2410_SDRAM_PA, S3C2410_PA_UART, S3C2410_VA_UART)
BOOT_MEM(S3C2410_SDRAM_PA, S3C2410_PA_UART, S3C24XX_VA_UART)
BOOT_PARAMS(S3C2410_SDRAM_PA + 0x100)
MAPIO(h1940_map_io)
INITIRQ(h1940_init_irq)
......
......@@ -11,6 +11,9 @@
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Modifications:
* 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
*/
#include <linux/kernel.h>
......@@ -138,7 +141,7 @@ void __init n30_init(void)
MACHINE_START(N30, "Acer-N30")
MAINTAINER("Christer Weinigel <christer@weinigel.se>, Ben Dooks <ben-linux@fluff.org>")
BOOT_MEM(S3C2410_SDRAM_PA, S3C2410_PA_UART, S3C2410_VA_UART)
BOOT_MEM(S3C2410_SDRAM_PA, S3C2410_PA_UART, S3C24XX_VA_UART)
BOOT_PARAMS(S3C2410_SDRAM_PA + 0x100)
.timer = &s3c24xx_timer,
......
......@@ -10,10 +10,11 @@
* published by the Free Software Foundation.
*
* Modifications:
* 16-Sep-2004 BJD Copied from mach-h1940.c
* 25-Oct-2004 BJD Updates for 2.6.10-rc1
* 10-Jan-2005 BJD Removed include of s3c2410.h s3c2440.h
* 14-Jan-2005 BJD Added new clock init
* 16-Sep-2004 BJD Copied from mach-h1940.c
* 25-Oct-2004 BJD Updates for 2.6.10-rc1
* 10-Jan-2005 BJD Removed include of s3c2410.h s3c2440.h
* 14-Jan-2005 BJD Added new clock init
* 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
*/
#include <linux/kernel.h>
......@@ -48,8 +49,8 @@
static struct map_desc rx3715_iodesc[] __initdata = {
/* dump ISA space somewhere unused */
{ S3C2410_VA_ISA_WORD, S3C2410_CS3, SZ_16M, MT_DEVICE },
{ S3C2410_VA_ISA_BYTE, S3C2410_CS3, SZ_16M, MT_DEVICE },
{ S3C24XX_VA_ISA_WORD, S3C2410_CS3, SZ_16M, MT_DEVICE },
{ S3C24XX_VA_ISA_BYTE, S3C2410_CS3, SZ_16M, MT_DEVICE },
};
static struct s3c2410_uartcfg rx3715_uartcfgs[] = {
......@@ -114,7 +115,7 @@ static void __init rx3715_init_machine(void)
MACHINE_START(RX3715, "IPAQ-RX3715")
MAINTAINER("Ben Dooks <ben@fluff.org>")
BOOT_MEM(S3C2410_SDRAM_PA, S3C2410_PA_UART, S3C2410_VA_UART)
BOOT_MEM(S3C2410_SDRAM_PA, S3C2410_PA_UART, S3C24XX_VA_UART)
BOOT_PARAMS(S3C2410_SDRAM_PA + 0x100)
MAPIO(rx3715_map_io)
INITIRQ(rx3715_init_irq)
......
......@@ -26,6 +26,9 @@
* @History:
* derived from linux/arch/arm/mach-s3c2410/mach-bast.c, written by
* Ben Dooks <ben@simtec.co.uk>
*
* 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
*
***********************************************************************/
#include <linux/kernel.h>
......@@ -110,7 +113,7 @@ void __init smdk2410_init_irq(void)
MACHINE_START(SMDK2410, "SMDK2410") /* @TODO: request a new identifier and switch
* to SMDK2410 */
MAINTAINER("Jonas Dietsche")
BOOT_MEM(S3C2410_SDRAM_PA, S3C2410_PA_UART, S3C2410_VA_UART)
BOOT_MEM(S3C2410_SDRAM_PA, S3C2410_PA_UART, S3C24XX_VA_UART)
BOOT_PARAMS(S3C2410_SDRAM_PA + 0x100)
MAPIO(smdk2410_map_io)
INITIRQ(smdk2410_init_irq)
......
......@@ -12,10 +12,11 @@
* published by the Free Software Foundation.
*
* Modifications:
* 01-Nov-2004 BJD Initial version
* 12-Nov-2004 BJD Updated for release
* 04-Jan-2005 BJD Fixes for pre-release
* 22-Feb-2005 BJD Updated for 2.6.11-rc5 relesa
* 01-Nov-2004 BJD Initial version
* 12-Nov-2004 BJD Updated for release
* 04-Jan-2005 BJD Fixes for pre-release
* 22-Feb-2005 BJD Updated for 2.6.11-rc5 relesa
* 10-Mar-2005 LCVR Replaced S3C2410_VA by S3C24XX_VA
*/
#include <linux/kernel.h>
......@@ -50,8 +51,8 @@
static struct map_desc smdk2440_iodesc[] __initdata = {
/* ISA IO Space map (memory space selected by A24) */
{ S3C2410_VA_ISA_WORD, S3C2410_CS2, SZ_16M, MT_DEVICE },
{ S3C2410_VA_ISA_BYTE, S3C2410_CS2, SZ_16M, MT_DEVICE },
{ S3C24XX_VA_ISA_WORD, S3C2410_CS2, SZ_16M, MT_DEVICE },
{ S3C24XX_VA_ISA_BYTE, S3C2410_CS2, SZ_16M, MT_DEVICE },
};
#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
......@@ -123,7 +124,7 @@ void __init smdk2440_machine_init(void)
MACHINE_START(S3C2440, "SMDK2440")
MAINTAINER("Ben Dooks <ben@fluff.org>")
BOOT_MEM(S3C2410_SDRAM_PA, S3C2410_PA_UART, S3C2410_VA_UART)
BOOT_MEM(S3C2410_SDRAM_PA, S3C2410_PA_UART, S3C24XX_VA_UART)
BOOT_PARAMS(S3C2410_SDRAM_PA + 0x100)
.init_irq = s3c24xx_init_irq,
......
......@@ -25,6 +25,7 @@
* 15-Jan-2005 BJD Add serial port device definition
* 20-Jan-2005 BJD Use UPF_IOREMAP for ports
* 10-Feb-2005 BJD Added power-off capability
* 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
*/
#include <linux/kernel.h>
......@@ -77,8 +78,8 @@
static struct map_desc vr1000_iodesc[] __initdata = {
/* ISA IO areas */
{ S3C2410_VA_ISA_BYTE, PA_CS2(BAST_PA_ISAIO), SZ_16M, MT_DEVICE },
{ S3C2410_VA_ISA_WORD, PA_CS3(BAST_PA_ISAIO), SZ_16M, MT_DEVICE },
{ S3C24XX_VA_ISA_BYTE, PA_CS2(BAST_PA_ISAIO), SZ_16M, MT_DEVICE },
{ S3C24XX_VA_ISA_WORD, PA_CS3(BAST_PA_ISAIO), SZ_16M, MT_DEVICE },
/* we could possibly compress the next set down into a set of smaller tables
* pagetables, but that would mean using an L2 section, and it still means
......@@ -307,7 +308,7 @@ void __init vr1000_init_irq(void)
MACHINE_START(VR1000, "Thorcom-VR1000")
MAINTAINER("Ben Dooks <ben@simtec.co.uk>")
BOOT_MEM(S3C2410_SDRAM_PA, S3C2410_PA_UART, S3C2410_VA_UART)
BOOT_MEM(S3C2410_SDRAM_PA, S3C2410_PA_UART, S3C24XX_VA_UART)
BOOT_PARAMS(S3C2410_SDRAM_PA + 0x100)
MAPIO(vr1000_map_io)
INITIRQ(vr1000_init_irq)
......
......@@ -24,6 +24,9 @@
* Parts based on arch/arm/mach-pxa/pm.c
*
* Thanks to Dimitry Andric for debugging
*
* Modifications:
* 10-Mar-2005 LCVR Changed S3C2410_VA_UART to S3C24XX_VA_UART
*/
#include <linux/config.h>
......@@ -144,9 +147,11 @@ static struct sleep_save gpio_save[] = {
SAVE_ITEM((va) + S3C2410_UBRDIV)
static struct sleep_save uart_save[] = {
SAVE_UART(S3C2410_VA_UART0),
SAVE_UART(S3C2410_VA_UART1),
SAVE_UART(S3C2410_VA_UART2),
SAVE_UART(S3C24XX_VA_UART0),
SAVE_UART(S3C24XX_VA_UART1),
#ifndef CONFIG_CPU_S3C2400
SAVE_UART(S3C24XX_VA_UART2),
#endif
};
/* debug
......
......@@ -13,6 +13,7 @@
* 08-Nov-2004 BJD Initial creation
* 12-Nov-2004 BJD Added periodic IRQ and PM code
* 22-Nov-2004 BJD Sign-test on alarm code to check for <0
* 10-Mar-2005 LCVR Changed S3C2410_VA_RTC to S3C24XX_VA_RTC
*/
#include <linux/module.h>
......@@ -38,8 +39,8 @@
/* need this for the RTC_AF definitions */
#include <linux/mc146818rtc.h>
#undef S3C2410_VA_RTC
#define S3C2410_VA_RTC s3c2410_rtc_base
#undef S3C24XX_VA_RTC
#define S3C24XX_VA_RTC s3c2410_rtc_base
static struct resource *s3c2410_rtc_mem;
......
......@@ -26,6 +26,8 @@
* 05-Oct-2004 BJD Added semaphore init to stop crashes on open
* Fixed tmr_count / wdt_count confusion
* Added configurable debug
*
* 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
*/
#include <linux/module.h>
......@@ -48,8 +50,8 @@
#include <asm/arch/map.h>
#include <asm/hardware/clock.h>
#undef S3C2410_VA_WATCHDOG
#define S3C2410_VA_WATCHDOG (0)
#undef S3C24XX_VA_WATCHDOG
#define S3C24XX_VA_WATCHDOG (0)
#include <asm/arch/regs-watchdog.h>
......
......@@ -29,6 +29,8 @@
* 06-Mar-2005 BJD Add s3c2440 fclk clock source
*
* 09-Mar-2005 BJD Add s3c2400 support
*
* 10-Mar-2005 LCVR Changed S3C2410_VA_UART to S3C24XX_VA_UART
*/
/* Note on 2440 fclk clock source handling
......@@ -1093,7 +1095,7 @@ static int s3c24xx_serial_init_port(struct s3c24xx_uart_port *ourport,
port->mapbase = res->start;
port->membase = (void __iomem *)(res->start - S3C2410_PA_UART);
port->membase += S3C2410_VA_UART;
port->membase += S3C24XX_VA_UART;
port->irq = platform_get_irq(platdev, 0);
ourport->clk = clk_get(&platdev->dev, "uart");
......@@ -1441,9 +1443,9 @@ static int s3c2440_serial_getsource(struct uart_port *port,
/* the fun of calculating the uart divisors on
* the s3c2440 */
ucon0 = __raw_readl(S3C2410_VA_UART0 + S3C2410_UCON);
ucon1 = __raw_readl(S3C2410_VA_UART1 + S3C2410_UCON);
ucon2 = __raw_readl(S3C2410_VA_UART2 + S3C2410_UCON);
ucon0 = __raw_readl(S3C24XX_VA_UART0 + S3C2410_UCON);
ucon1 = __raw_readl(S3C24XX_VA_UART1 + S3C2410_UCON);
ucon2 = __raw_readl(S3C24XX_VA_UART2 + S3C2410_UCON);
printk("ucons: %08lx, %08lx, %08lx\n", ucon0, ucon1, ucon2);
......
......@@ -11,6 +11,8 @@
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Modifications:
* 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
*/
#include <asm/arch/map.h>
......@@ -24,7 +26,7 @@
mrc p15, 0, \rx, c1, c0
tst \rx, #1
ldreq \rx, = S3C2410_PA_UART
ldrne \rx, = S3C2410_VA_UART
ldrne \rx, = S3C24XX_VA_UART
#if CONFIG_DEBUG_S3C2410_UART != 0
add \rx, \rx, #(S3C2410_UART1_OFF * CONFIG_DEBUG_S3C2410_UART)
#endif
......@@ -43,7 +45,7 @@
mrc p15, 0, \rd, c1, c0
tst \rd, #1
addeq \rd, \rx, #(S3C2410_PA_GPIO - S3C2410_PA_UART)
addne \rd, \rx, #(S3C2410_VA_GPIO - S3C2410_VA_UART)
addne \rd, \rx, #(S3C24XX_VA_GPIO - S3C24XX_VA_UART)
bic \rd, \rd, #0xff000
ldr \rd, [ \rd, # S3C2410_GSTATUS1 - S3C2410_GPIOREG(0) ]
and \rd, \rd, #0x00ff0000
......@@ -74,7 +76,7 @@
mrc p15, 0, \rd, c1, c0
tst \rd, #1
addeq \rd, \rx, #(S3C2410_PA_GPIO - S3C2410_PA_UART)
addne \rd, \rx, #(S3C2410_VA_GPIO - S3C2410_VA_UART)
addne \rd, \rx, #(S3C24XX_VA_GPIO - S3C24XX_VA_UART)
bic \rd, \rd, #0xff000
ldr \rd, [ \rd, # S3C2410_GSTATUS1 - S3C2410_GPIOREG(0) ]
and \rd, \rd, #0x00ff0000
......
......@@ -6,12 +6,15 @@
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
* Modifications:
* 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
*/
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
mov \tmp, #S3C2410_VA_IRQ
mov \tmp, #S3C24XX_VA_IRQ
ldr \irqnr, [ \tmp, #0x14 ] @ get irq no
30000:
teq \irqnr, #4
......@@ -45,7 +48,7 @@
.align 4
20004:
mov r1, #1
mov \tmp, #S3C2410_VA_IRQ
mov \tmp, #S3C24XX_VA_IRQ
ldmfd r13!, { r0 - r4 , r8-r12, r14 }
#endif
......@@ -83,7 +86,7 @@
@ we get here from no main or external interrupts pending
1002:
add \tmp, \tmp, #S3C2410_VA_GPIO - S3C2410_VA_IRQ
add \tmp, \tmp, #S3C24XX_VA_GPIO - S3C24XX_VA_IRQ
ldr \irqstat, [ \tmp, # 0xa8 ] @ EXTINTPEND
ldr \irqnr, [ \tmp, # 0xa4 ] @ EXTINTMASK
......
......@@ -8,6 +8,7 @@
* Modifications:
* 06-Dec-1997 RMK Created.
* 02-Sep-2003 BJD Modified for S3C2410
* 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
*
*/
......@@ -26,10 +27,10 @@
#define __PORT_PCIO(x) ((x) < (1<<28))
#define PCIO_BASE (S3C2410_VA_ISA_WORD)
#define PCIO_BASE_b (S3C2410_VA_ISA_BYTE)
#define PCIO_BASE_w (S3C2410_VA_ISA_WORD)
#define PCIO_BASE_l (S3C2410_VA_ISA_WORD)
#define PCIO_BASE (S3C24XX_VA_ISA_WORD)
#define PCIO_BASE_b (S3C24XX_VA_ISA_BYTE)
#define PCIO_BASE_w (S3C24XX_VA_ISA_WORD)
#define PCIO_BASE_l (S3C24XX_VA_ISA_WORD)
/*
* Dynamic IO functions - let the compiler
* optimize the expressions
......
......@@ -10,9 +10,10 @@
* published by the Free Software Foundation.
*
* Changelog:
* 12-May-2003 BJD Created file
* 06-Jan-2003 BJD Linux 2.6.0 version, moved bast specifics out
* 10-Feb-2005 BJD Added CAMIF definition from guillaume.gourat@nexvision.tv
* 12-May-2003 BJD Created file
* 06-Jan-2003 BJD Linux 2.6.0 version, moved bast specifics out
* 10-Feb-2005 BJD Added CAMIF definition from guillaume.gourat@nexvision.tv
* 10-Mar-2005 LCVR Added support to S3C2400, changed {VA,SZ} names
*/
#ifndef __ASM_ARCH_MAP_H
......@@ -30,100 +31,122 @@
*/
#define S3C2410_ADDR(x) (0xF0000000 + (x))
#define S3C2400_ADDR(x) S3C2410_ADDR(x)
/* interrupt controller is the first thing we put in, to make
* the assembly code for the irq detection easier
*/
#define S3C2410_VA_IRQ S3C2410_ADDR(0x00000000)
#define S3C24XX_VA_IRQ S3C2410_ADDR(0x00000000)
#define S3C2400_PA_IRQ (0x14400000)
#define S3C2410_PA_IRQ (0x4A000000)
#define S3C2410_SZ_IRQ SZ_1M
#define S3C24XX_SZ_IRQ SZ_1M
/* memory controller registers */
#define S3C2410_VA_MEMCTRL S3C2410_ADDR(0x00100000)
#define S3C24XX_VA_MEMCTRL S3C2410_ADDR(0x00100000)
#define S3C2400_PA_MEMCTRL (0x14000000)
#define S3C2410_PA_MEMCTRL (0x48000000)
#define S3C2410_SZ_MEMCTRL SZ_1M
#define S3C24XX_SZ_MEMCTRL SZ_1M
/* USB host controller */
#define S3C2410_VA_USBHOST S3C2410_ADDR(0x00200000)
#define S3C24XX_VA_USBHOST S3C2410_ADDR(0x00200000)
#define S3C2400_PA_USBHOST (0x14200000)
#define S3C2410_PA_USBHOST (0x49000000)
#define S3C2410_SZ_USBHOST SZ_1M
#define S3C24XX_SZ_USBHOST SZ_1M
/* DMA controller */
#define S3C2410_VA_DMA S3C2410_ADDR(0x00300000)
#define S3C24XX_VA_DMA S3C2410_ADDR(0x00300000)
#define S3C2400_PA_DMA (0x14600000)
#define S3C2410_PA_DMA (0x4B000000)
#define S3C2410_SZ_DMA SZ_1M
#define S3C24XX_SZ_DMA SZ_1M
/* Clock and Power management */
#define S3C2410_VA_CLKPWR S3C2410_ADDR(0x00400000)
#define S3C24XX_VA_CLKPWR S3C2410_ADDR(0x00400000)
#define S3C2400_PA_CLKPWR (0x14800000)
#define S3C2410_PA_CLKPWR (0x4C000000)
#define S3C2410_SZ_CLKPWR SZ_1M
#define S3C24XX_SZ_CLKPWR SZ_1M
/* LCD controller */
#define S3C2410_VA_LCD S3C2410_ADDR(0x00600000)
#define S3C24XX_VA_LCD S3C2410_ADDR(0x00600000)
#define S3C2400_PA_LCD (0x14A00000)
#define S3C2410_PA_LCD (0x4D000000)
#define S3C2410_SZ_LCD SZ_1M
#define S3C24XX_SZ_LCD SZ_1M
/* NAND flash controller */
#define S3C2410_VA_NAND S3C2410_ADDR(0x00700000)
#define S3C24XX_VA_NAND S3C2410_ADDR(0x00700000)
#define S3C2410_PA_NAND (0x4E000000)
#define S3C2410_SZ_NAND SZ_1M
#define S3C24XX_SZ_NAND SZ_1M
/* MMC controller - available on the S3C2400 */
#define S3C2400_VA_MMC S3C2400_ADDR(0x00700000)
#define S3C2400_PA_MMC (0x15A00000)
#define S3C2400_SZ_MMC SZ_1M
/* UARTs */
#define S3C2410_VA_UART S3C2410_ADDR(0x00800000)
#define S3C24XX_VA_UART S3C2410_ADDR(0x00800000)
#define S3C2400_PA_UART (0x15000000)
#define S3C2410_PA_UART (0x50000000)
#define S3C2410_SZ_UART SZ_1M
#define S3C24XX_SZ_UART SZ_1M
/* Timers */
#define S3C2410_VA_TIMER S3C2410_ADDR(0x00900000)
#define S3C24XX_VA_TIMER S3C2410_ADDR(0x00900000)
#define S3C2400_PA_TIMER (0x15100000)
#define S3C2410_PA_TIMER (0x51000000)
#define S3C2410_SZ_TIMER SZ_1M
#define S3C24XX_SZ_TIMER SZ_1M
/* USB Device port */
#define S3C2410_VA_USBDEV S3C2410_ADDR(0x00A00000)
#define S3C24XX_VA_USBDEV S3C2410_ADDR(0x00A00000)
#define S3C2400_PA_USBDEV (0x15200140)
#define S3C2410_PA_USBDEV (0x52000000)
#define S3C2410_SZ_USBDEV SZ_1M
#define S3C24XX_SZ_USBDEV SZ_1M
/* Watchdog */
#define S3C2410_VA_WATCHDOG S3C2410_ADDR(0x00B00000)
#define S3C24XX_VA_WATCHDOG S3C2410_ADDR(0x00B00000)
#define S3C2400_PA_WATCHDOG (0x15300000)
#define S3C2410_PA_WATCHDOG (0x53000000)
#define S3C2410_SZ_WATCHDOG SZ_1M
#define S3C24XX_SZ_WATCHDOG SZ_1M
/* IIC hardware controller */
#define S3C2410_VA_IIC S3C2410_ADDR(0x00C00000)
#define S3C24XX_VA_IIC S3C2410_ADDR(0x00C00000)
#define S3C2400_PA_IIC (0x15400000)
#define S3C2410_PA_IIC (0x54000000)
#define S3C2410_SZ_IIC SZ_1M
#define S3C24XX_SZ_IIC SZ_1M
#define VA_IIC_BASE (S3C2410_VA_IIC)
#define VA_IIC_BASE (S3C24XX_VA_IIC)
/* IIS controller */
#define S3C2410_VA_IIS S3C2410_ADDR(0x00D00000)
#define S3C24XX_VA_IIS S3C2410_ADDR(0x00D00000)
#define S3C2400_PA_IIS (0x15508000)
#define S3C2410_PA_IIS (0x55000000)
#define S3C2410_SZ_IIS SZ_1M
#define S3C24XX_SZ_IIS SZ_1M
/* GPIO ports */
#define S3C2410_VA_GPIO S3C2410_ADDR(0x00E00000)
#define S3C24XX_VA_GPIO S3C2410_ADDR(0x00E00000)
#define S3C2400_PA_GPIO (0x15600000)
#define S3C2410_PA_GPIO (0x56000000)
#define S3C2410_SZ_GPIO SZ_1M
#define S3C24XX_SZ_GPIO SZ_1M
/* RTC */
#define S3C2410_VA_RTC S3C2410_ADDR(0x00F00000)
#define S3C24XX_VA_RTC S3C2410_ADDR(0x00F00000)
#define S3C2400_PA_RTC (0x15700040)
#define S3C2410_PA_RTC (0x57000000)
#define S3C2410_SZ_RTC SZ_1M
#define S3C24XX_SZ_RTC SZ_1M
/* ADC */
#define S3C2410_VA_ADC S3C2410_ADDR(0x01000000)
#define S3C24XX_VA_ADC S3C2410_ADDR(0x01000000)
#define S3C2400_PA_ADC (0x15800000)
#define S3C2410_PA_ADC (0x58000000)
#define S3C2410_SZ_ADC SZ_1M
#define S3C24XX_SZ_ADC SZ_1M
/* SPI */
#define S3C2410_VA_SPI S3C2410_ADDR(0x01100000)
#define S3C24XX_VA_SPI S3C2410_ADDR(0x01100000)
#define S3C2400_PA_SPI (0x15900000)
#define S3C2410_PA_SPI (0x59000000)
#define S3C2410_SZ_SPI SZ_1M
#define S3C24XX_SZ_SPI SZ_1M
/* SDI */
#define S3C2410_VA_SDI S3C2410_ADDR(0x01200000)
#define S3C24XX_VA_SDI S3C2410_ADDR(0x01200000)
#define S3C2410_PA_SDI (0x5A000000)
#define S3C2410_SZ_SDI SZ_1M
#define S3C24XX_SZ_SDI SZ_1M
/* CAMIF */
#define S3C2440_PA_CAMIF (0x4F000000)
......@@ -133,8 +156,8 @@
* implements it. We reserve two 16M regions for ISA.
*/
#define S3C2410_VA_ISA_WORD S3C2410_ADDR(0x02000000)
#define S3C2410_VA_ISA_BYTE S3C2410_ADDR(0x03000000)
#define S3C24XX_VA_ISA_WORD S3C2410_ADDR(0x02000000)
#define S3C24XX_VA_ISA_BYTE S3C2410_ADDR(0x03000000)
/* physical addresses of all the chip-select areas */
......@@ -149,5 +172,16 @@
#define S3C2410_SDRAM_PA (S3C2410_CS6)
#define S3C2400_CS0 (0x00000000)
#define S3C2400_CS1 (0x02000000)
#define S3C2400_CS2 (0x04000000)
#define S3C2400_CS3 (0x06000000)
#define S3C2400_CS4 (0x08000000)
#define S3C2400_CS5 (0x0A000000)
#define S3C2400_CS6 (0x0C000000)
#define S3C2400_CS7 (0x0E000000)
#define S3C2400_SDRAM_PA (S3C2400_CS6)
#endif /* __ASM_ARCH_MAP_H */
......@@ -10,18 +10,19 @@
* S3C2410 clock register definitions
*
* Changelog:
* 18-Aug-2004 Ben Dooks Added 2440 definitions
* 08-Aug-2004 Herbert Ptzl Added CLKCON definitions
* 19-06-2003 Ben Dooks Created file
* 12-03-2004 Ben Dooks Updated include protection
* 29-Sep-2004 Ben Dooks Fixed usage for assembly inclusion
* 10-Feb-2005 Ben Dooks Fixed CAMDIVN address (Guillaume Gourat)
* 18-Aug-2004 Ben Dooks Added 2440 definitions
* 08-Aug-2004 Herbert Ptzl Added CLKCON definitions
* 19-06-2003 Ben Dooks Created file
* 12-03-2004 Ben Dooks Updated include protection
* 29-Sep-2004 Ben Dooks Fixed usage for assembly inclusion
* 10-Feb-2005 Ben Dooks Fixed CAMDIVN address (Guillaume Gourat)
* 10-Mar-2005 Lucas Villa Real Changed S3C2410_VA to S3C24XX_VA
*/
#ifndef __ASM_ARM_REGS_CLOCK
#define __ASM_ARM_REGS_CLOCK "$Id: clock.h,v 1.4 2003/04/30 14:50:51 ben Exp $"
#define S3C2410_CLKREG(x) ((x) + S3C2410_VA_CLKPWR)
#define S3C2410_CLKREG(x) ((x) + S3C24XX_VA_CLKPWR)
#define S3C2410_PLLVAL(_m,_p,_s) ((_m) << 12 | ((_p) << 4) | ((_s)))
......
......@@ -18,6 +18,7 @@
* 17-10-2004 BJD Added GSTATUS1 register definitions
* 18-11-2004 BJD Fixed definitions of GPE3, GPE4, GPE5 and GPE6
* 18-11-2004 BJD Added S3C2440 AC97 controls
* 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
*/
......@@ -35,7 +36,7 @@
#define S3C2410_GPIO_BANKG (32*6)
#define S3C2410_GPIO_BANKH (32*7)
#define S3C2410_GPIO_BASE(pin) ((((pin) & ~31) >> 1) + S3C2410_VA_GPIO)
#define S3C2410_GPIO_BASE(pin) ((((pin) & ~31) >> 1) + S3C24XX_VA_GPIO)
#define S3C2410_GPIO_OFFSET(pin) ((pin) & 31)
/* general configuration options */
......@@ -44,7 +45,7 @@
/* configure GPIO ports A..G */
#define S3C2410_GPIOREG(x) ((x) + S3C2410_VA_GPIO)
#define S3C2410_GPIOREG(x) ((x) + S3C24XX_VA_GPIO)
/* port A - 22bits, zero in bit X makes pin X output
* 1 makes port special function, this is default
......
......@@ -12,6 +12,7 @@
* Changelog:
* 19-06-2003 BJD Created file
* 12-03-2004 BJD Updated include protection
* 10-03-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
*/
......@@ -20,8 +21,8 @@
/* interrupt controller */
#define S3C2410_IRQREG(x) ((x) + S3C2410_VA_IRQ)
#define S3C2410_EINTREG(x) ((x) + S3C2410_VA_GPIO)
#define S3C2410_IRQREG(x) ((x) + S3C24XX_VA_IRQ)
#define S3C2410_EINTREG(x) ((x) + S3C24XX_VA_GPIO)
#define S3C2410_SRCPND S3C2410_IRQREG(0x000)
#define S3C2410_INTMOD S3C2410_IRQREG(0x004)
......
......@@ -13,13 +13,14 @@
* 12-06-2003 BJD Created file
* 26-06-2003 BJD Updated LCDCON register definitions
* 12-03-2004 BJD Updated include protection
* 10-03-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
*/
#ifndef ___ASM_ARCH_REGS_LCD_H
#define ___ASM_ARCH_REGS_LCD_H "$Id: lcd.h,v 1.3 2003/06/26 13:25:06 ben Exp $"
#define S3C2410_LCDREG(x) ((x) + S3C2410_VA_LCD)
#define S3C2410_LCDREG(x) ((x) + S3C24XX_VA_LCD)
/* LCD control registers */
#define S3C2410_LCDCON1 S3C2410_LCDREG(0x00)
......
......@@ -11,6 +11,7 @@
*
* Changelog:
* 29-Sep-2004 BJD Initial include for Linux
* 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
*
*/
......@@ -18,7 +19,7 @@
#define __ASM_ARM_MEMREGS_H "$Id: regs.h,v 1.8 2003/05/01 15:55:41 ben Exp $"
#ifndef S3C2410_MEMREG
#define S3C2410_MEMREG(x) (S3C2410_VA_MEMCTRL + (x))
#define S3C2410_MEMREG(x) (S3C24XX_VA_MEMCTRL + (x))
#endif
/* bus width, and wait state control */
......
......@@ -12,12 +12,13 @@
* Changelog:
* 19-06-2003 BJD Created file
* 12-03-2004 BJD Updated include protection
* 15-01-2005 LCVR Changed S3C2410_VA to S3C24XX_VA (s3c2400 support)
*/
#ifndef __ASM_ARCH_REGS_RTC_H
#define __ASM_ARCH_REGS_RTC_H __FILE__
#define S3C2410_RTCREG(x) ((x) + S3C2410_VA_RTC)
#define S3C2410_RTCREG(x) ((x) + S3C24XX_VA_RTC)
#define S3C2410_RTCCON S3C2410_RTCREG(0x40)
#define S3C2410_RTCCON_RTCEN (1<<0)
......
......@@ -27,14 +27,17 @@
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
* Modifications:
* 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA (s3c2400 support)
*/
#ifndef __ASM_ARM_REGS_SERIAL_H
#define __ASM_ARM_REGS_SERIAL_H
#define S3C2410_VA_UART0 (S3C2410_VA_UART)
#define S3C2410_VA_UART1 (S3C2410_VA_UART + 0x4000 )
#define S3C2410_VA_UART2 (S3C2410_VA_UART + 0x8000 )
#define S3C24XX_VA_UART0 (S3C24XX_VA_UART)
#define S3C24XX_VA_UART1 (S3C24XX_VA_UART + 0x4000 )
#define S3C24XX_VA_UART2 (S3C24XX_VA_UART + 0x8000 )
#define S3C2410_PA_UART0 (S3C2410_PA_UART)
#define S3C2410_PA_UART1 (S3C2410_PA_UART + 0x4000 )
......
......@@ -14,13 +14,14 @@
* 26-06-2003 BJD Added more timer definitions to mux / control
* 12-03-2004 BJD Updated include protection
* 10-02-2005 BJD Added S3C2410_TCFG1_MUX4_SHIFT (Guillaume Gourat)
* 10-03-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
*/
#ifndef __ASM_ARCH_REGS_TIMER_H
#define __ASM_ARCH_REGS_TIMER_H "$Id: timer.h,v 1.4 2003/05/06 19:30:50 ben Exp $"
#define S3C2410_TIMERREG(x) (S3C2410_VA_TIMER + (x))
#define S3C2410_TIMERREG(x) (S3C24XX_VA_TIMER + (x))
#define S3C2410_TIMERREG2(tmr,reg) S3C2410_TIMERREG((reg)+0x0c+((tmr)*0x0c))
#define S3C2410_TCFG0 S3C2410_TIMERREG(0x00)
......
......@@ -11,13 +11,14 @@
* 01-08-2004 Initial creation
* 12-09-2004 Cleanup for submission
* 24-10-2004 Fixed S3C2410_UDC_MAXP_REG definition
* 10-03-2005 Changed S3C2410_VA to S3C24XX_VA
*/
#ifndef __ASM_ARCH_REGS_UDC_H
#define __ASM_ARCH_REGS_UDC_H
#define S3C2410_USBDREG(x) ((x) + S3C2410_VA_USBDEV)
#define S3C2410_USBDREG(x) ((x) + S3C24XX_VA_USBDEV)
#define S3C2410_UDC_FUNC_ADDR_REG S3C2410_USBDREG(0x0140)
#define S3C2410_UDC_PWR_REG S3C2410_USBDREG(0x0144)
......
......@@ -12,13 +12,14 @@
* Changelog:
* 21-06-2003 BJD Created file
* 12-03-2004 BJD Updated include protection
* 10-03-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
*/
#ifndef __ASM_ARCH_REGS_WATCHDOG_H
#define __ASM_ARCH_REGS_WATCHDOG_H "$Id: watchdog.h,v 1.2 2003/04/29 13:31:09 ben Exp $"
#define S3C2410_WDOGREG(x) ((x) + S3C2410_VA_WATCHDOG)
#define S3C2410_WDOGREG(x) ((x) + S3C24XX_VA_WATCHDOG)
#define S3C2410_WTCON S3C2410_WDOGREG(0x00)
#define S3C2410_WTDAT S3C2410_WDOGREG(0x04)
......
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