Commit 1cf0cee1 authored by Tom Rix's avatar Tom Rix Committed by Rafael J. Wysocki

ACPICA: Clean up double word in comment

ACPICA commit 01f43b049722fa7613fca3c9fa657b150fae8ac1

Remove the second 'know' and 'than'.

Link: https://github.com/acpica/acpica/commit/01f43b04Signed-off-by: default avatarTom Rix <trix@redhat.com>
Signed-off-by: default avatarBob Moore <robert.moore@intel.com>
Signed-off-by: default avatarRafael J. Wysocki <rafael.j.wysocki@intel.com>
parent e468e39f
...@@ -104,7 +104,7 @@ acpi_ex_setup_region(union acpi_operand_object *obj_desc, ...@@ -104,7 +104,7 @@ acpi_ex_setup_region(union acpi_operand_object *obj_desc,
#ifdef ACPI_UNDER_DEVELOPMENT #ifdef ACPI_UNDER_DEVELOPMENT
/* /*
* If the Field access is any_acc, we can now compute the optimal * If the Field access is any_acc, we can now compute the optimal
* access (because we know know the length of the parent region) * access (because we know the length of the parent region)
*/ */
if (!(obj_desc->common.flags & AOPOBJ_DATA_VALID)) { if (!(obj_desc->common.flags & AOPOBJ_DATA_VALID)) {
if (ACPI_FAILURE(status)) { if (ACPI_FAILURE(status)) {
......
...@@ -446,7 +446,7 @@ struct acpi_bit_register_info *acpi_hw_get_bit_register_info(u32 register_id) ...@@ -446,7 +446,7 @@ struct acpi_bit_register_info *acpi_hw_get_bit_register_info(u32 register_id)
* RETURN: Status * RETURN: Status
* *
* DESCRIPTION: Write the PM1 A/B control registers. These registers are * DESCRIPTION: Write the PM1 A/B control registers. These registers are
* different than than the PM1 A/B status and enable registers * different than the PM1 A/B status and enable registers
* in that different values can be written to the A/B registers. * in that different values can be written to the A/B registers.
* Most notably, the SLP_TYP bits can be different, as per the * Most notably, the SLP_TYP bits can be different, as per the
* values returned from the _Sx predefined methods. * values returned from the _Sx predefined methods.
......
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