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Commit 1d0619c5 authored by Linus Torvalds's avatar Linus Torvalds
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Merge http://linux-isdn.bkbits.net/linux-2.5.isdn 

into home.transmeta.com:/home/torvalds/v2.5/linux
parents 911a1ac4 05cb64ba
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Showing with 3170 additions and 2984 deletions
drivers/isdn/hisax/amd7930.c
View file @ 1d0619c5
......@@ -642,7 +642,7 @@ amd7930_liu_callback(struct IsdnCardState *cs)
void
amd7930_l1cmd(struct IsdnCardState *cs, int msg, void *arg)
{
u_char val;
u8 val;
char tmp[32];
if (cs->debug & L1_DEB_ISAC) {
......
drivers/isdn/hisax/amd7930_fn.c
View file @ 1d0619c5
......@@ -77,13 +77,13 @@ LOBYTE(u16 w)
static inline u8
rByteAMD(struct IsdnCardState *cs, u8 reg)
{
return cs->readisac(cs, reg);
return cs->dc_hw_ops->read_reg(cs, reg);
}
static inline void
wByteAMD(struct IsdnCardState *cs, u8 reg, u8 val)
{
cs->writeisac(cs, reg, val);
cs->dc_hw_ops->write_reg(cs, reg, val);
}
static void
......@@ -125,7 +125,7 @@ AmdIrqOn(struct IsdnCardState *cs)
}
static void
Amd7930_ph_command(struct IsdnCardState *cs, u_char command, char *s)
Amd7930_ph_command(struct IsdnCardState *cs, u8 command, char *s)
{
if (cs->debug & L1_DEB_ISAC)
debugl1(cs, "AMD7930: %s: ph_command 0x%02X", s, command);
......@@ -167,8 +167,8 @@ Amd7930_get_state(struct IsdnCardState *cs) {
static void
Amd7930_new_ph(struct IsdnCardState *cs)
{
u_char index = stateHelper[cs->dc.amd7930.old_state]*8 + stateHelper[cs->dc.amd7930.ph_state]-1;
u_char message = i430States[index];
u8 index = stateHelper[cs->dc.amd7930.old_state]*8 + stateHelper[cs->dc.amd7930.ph_state]-1;
u8 message = i430States[index];
if (cs->debug & L1_DEB_ISAC)
debugl1(cs, "AMD7930: new_ph %d, old_ph %d, message %d, index %d",
......
drivers/isdn/hisax/arcofi.c
View file @ 1d0619c5
......@@ -17,6 +17,19 @@
#define ARCOFI_TIMER_VALUE 20
static inline u8
isac_read(struct IsdnCardState *cs, u8 addr)
{
return cs->dc_hw_ops->read_reg(cs, addr);
}
static inline void
isac_write(struct IsdnCardState *cs, u8 addr, u8 val)
{
cs->dc_hw_ops->write_reg(cs, addr, val);
}
static void
add_arcofi_timer(struct IsdnCardState *cs) {
if (test_and_set_bit(FLG_ARCOFI_TIMER, &cs->HW_Flags)) {
......@@ -29,7 +42,7 @@ add_arcofi_timer(struct IsdnCardState *cs) {
static void
send_arcofi(struct IsdnCardState *cs) {
u_char val;
u8 val;
add_arcofi_timer(cs);
cs->dc.isac.mon_txp = 0;
......@@ -43,11 +56,11 @@ send_arcofi(struct IsdnCardState *cs) {
}
cs->dc.isac.mocr &= 0x0f;
cs->dc.isac.mocr |= 0xa0;
cs->writeisac(cs, ISAC_MOCR, cs->dc.isac.mocr);
val = cs->readisac(cs, ISAC_MOSR);
cs->writeisac(cs, ISAC_MOX1, cs->dc.isac.mon_tx[cs->dc.isac.mon_txp++]);
isac_write(cs, ISAC_MOCR, cs->dc.isac.mocr);
val = isac_read(cs, ISAC_MOSR);
isac_write(cs, ISAC_MOX1, cs->dc.isac.mon_tx[cs->dc.isac.mon_txp++]);
cs->dc.isac.mocr |= 0x10;
cs->writeisac(cs, ISAC_MOCR, cs->dc.isac.mocr);
isac_write(cs, ISAC_MOCR, cs->dc.isac.mocr);
}
int
......
drivers/isdn/hisax/asuscom.c
View file @ 1d0619c5
This diff is collapsed.
drivers/isdn/hisax/avm_a1.c
View file @ 1d0619c5
......@@ -26,85 +26,98 @@ static const char *avm_revision = "$Revision: 2.13.6.2 $";
#define byteout(addr,val) outb(val,addr)
#define bytein(addr) inb(addr)
static inline u_char
readreg(unsigned int adr, u_char off)
static inline u8
readreg(unsigned int adr, u8 off)
{
return (bytein(adr + off));
}
static inline void
writereg(unsigned int adr, u_char off, u_char data)
writereg(unsigned int adr, u8 off, u8 data)
{
byteout(adr + off, data);
}
static inline void
read_fifo(unsigned int adr, u_char * data, int size)
read_fifo(unsigned int adr, u8 * data, int size)
{
insb(adr, data, size);
}
static void
write_fifo(unsigned int adr, u_char * data, int size)
write_fifo(unsigned int adr, u8 * data, int size)
{
outsb(adr, data, size);
}
/* Interface functions */
static u_char
ReadISAC(struct IsdnCardState *cs, u_char offset)
static u8
isac_read(struct IsdnCardState *cs, u8 offset)
{
return (readreg(cs->hw.avm.isac, offset));
return readreg(cs->hw.avm.isac, offset);
}
static void
WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
isac_write(struct IsdnCardState *cs, u8 offset, u8 value)
{
writereg(cs->hw.avm.isac, offset, value);
}
static void
ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size)
isac_read_fifo(struct IsdnCardState *cs, u8 * data, int size)
{
read_fifo(cs->hw.avm.isacfifo, data, size);
}
static void
WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size)
isac_write_fifo(struct IsdnCardState *cs, u8 * data, int size)
{
write_fifo(cs->hw.avm.isacfifo, data, size);
}
static u_char
ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset)
static struct dc_hw_ops isac_ops = {
.read_reg = isac_read,
.write_reg = isac_write,
.read_fifo = isac_read_fifo,
.write_fifo = isac_write_fifo,
};
static u8
hscx_read(struct IsdnCardState *cs, int hscx, u8 offset)
{
return (readreg(cs->hw.avm.hscx[hscx], offset));
}
static void
WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value)
hscx_write(struct IsdnCardState *cs, int hscx, u8 offset, u8 value)
{
writereg(cs->hw.avm.hscx[hscx], offset, value);
}
/*
* fast interrupt HSCX stuff goes here
*/
static void
hscx_read_fifo(struct IsdnCardState *cs, int hscx, u8 *data, int size)
{
read_fifo(cs->hw.avm.hscxfifo[hscx], data, size);
}
#define READHSCX(cs, nr, reg) readreg(cs->hw.avm.hscx[nr], reg)
#define WRITEHSCX(cs, nr, reg, data) writereg(cs->hw.avm.hscx[nr], reg, data)
#define READHSCXFIFO(cs, nr, ptr, cnt) read_fifo(cs->hw.avm.hscxfifo[nr], ptr, cnt)
#define WRITEHSCXFIFO(cs, nr, ptr, cnt) write_fifo(cs->hw.avm.hscxfifo[nr], ptr, cnt)
static void
hscx_write_fifo(struct IsdnCardState *cs, int hscx, u8 *data, int size)
{
write_fifo(cs->hw.avm.hscxfifo[hscx], data, size);
}
#include "hscx_irq.c"
static struct bc_hw_ops hscx_ops = {
.read_reg = hscx_read,
.write_reg = hscx_write,
.read_fifo = hscx_read_fifo,
.write_fifo = hscx_write_fifo,
};
static void
avm_a1_interrupt(int intno, void *dev_id, struct pt_regs *regs)
{
struct IsdnCardState *cs = dev_id;
u_char val, sval;
u8 val, sval;
spin_lock(&cs->lock);
while (((sval = bytein(cs->hw.avm.cfg_reg)) & 0xf) != 0x7) {
......@@ -114,22 +127,22 @@ avm_a1_interrupt(int intno, void *dev_id, struct pt_regs *regs)
} else if (cs->debug & L1_DEB_INTSTAT)
debugl1(cs, "avm IntStatus %x", sval);
if (!(sval & AVM_A1_STAT_HSCX)) {
val = readreg(cs->hw.avm.hscx[1], HSCX_ISTA);
val = hscx_read(cs, 1, HSCX_ISTA);
if (val)
hscx_int_main(cs, val);
}
if (!(sval & AVM_A1_STAT_ISAC)) {
val = readreg(cs->hw.avm.isac, ISAC_ISTA);
val = isac_read(cs, ISAC_ISTA);
if (val)
isac_interrupt(cs, val);
}
}
writereg(cs->hw.avm.hscx[0], HSCX_MASK, 0xFF);
writereg(cs->hw.avm.hscx[1], HSCX_MASK, 0xFF);
writereg(cs->hw.avm.isac, ISAC_MASK, 0xFF);
writereg(cs->hw.avm.isac, ISAC_MASK, 0x0);
writereg(cs->hw.avm.hscx[0], HSCX_MASK, 0x0);
writereg(cs->hw.avm.hscx[1], HSCX_MASK, 0x0);
hscx_write(cs, 0, HSCX_MASK, 0xFF);
hscx_write(cs, 1, HSCX_MASK, 0xFF);
isac_write(cs, ISAC_MASK, 0xFF);
isac_write(cs, ISAC_MASK, 0x0);
hscx_write(cs, 0, HSCX_MASK, 0x0);
hscx_write(cs, 1, HSCX_MASK, 0x0);
spin_unlock(&cs->lock);
}
......@@ -174,7 +187,7 @@ AVM_card_msg(struct IsdnCardState *cs, int mt, void *arg)
int __init
setup_avm_a1(struct IsdnCard *card)
{
u_char val;
u8 val;
struct IsdnCardState *cs = card->cs;
char tmp[64];
......@@ -289,13 +302,8 @@ setup_avm_a1(struct IsdnCard *card)
cs->hw.avm.hscx[0] + 32, cs->hw.avm.hscxfifo[0],
cs->hw.avm.hscx[1] + 32, cs->hw.avm.hscxfifo[1]);
cs->readisac = &ReadISAC;
cs->writeisac = &WriteISAC;
cs->readisacfifo = &ReadISACfifo;
cs->writeisacfifo = &WriteISACfifo;
cs->BC_Read_Reg = &ReadHSCX;
cs->BC_Write_Reg = &WriteHSCX;
cs->BC_Send_Data = &hscx_fill_fifo;
cs->dc_hw_ops = &isac_ops;
cs->bc_hw_ops = &hscx_ops;
cs->cardmsg = &AVM_card_msg;
cs->irq_func = &avm_a1_interrupt;
ISACVersion(cs, "AVM A1:");
......
drivers/isdn/hisax/avm_a1p.c
View file @ 1d0619c5
......@@ -59,147 +59,133 @@
static const char *avm_revision = "$Revision: 2.7.6.2 $";
static spinlock_t avm_a1p_lock = SPIN_LOCK_UNLOCKED;
static inline u_char
ReadISAC(struct IsdnCardState *cs, u_char offset)
static inline u8
readreg(struct IsdnCardState *cs, int offset, u8 adr)
{
unsigned long flags;
u_char ret;
u8 ret;
offset -= 0x20;
spin_lock_irqsave(&avm_a1p_lock, flags);
byteout(cs->hw.avm.cfg_reg+ADDRREG_OFFSET,ISAC_REG_OFFSET+offset);
ret = bytein(cs->hw.avm.cfg_reg+DATAREG_OFFSET);
byteout(cs->hw.avm.cfg_reg + ADDRREG_OFFSET, offset + adr - 0x20);
ret = bytein(cs->hw.avm.cfg_reg + DATAREG_OFFSET);
spin_unlock_irqrestore(&avm_a1p_lock, flags);
return ret;
}
static inline void
WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
writereg(struct IsdnCardState *cs, int offset, u8 adr, u8 value)
{
unsigned long flags;
offset -= 0x20;
spin_lock_irqsave(&avm_a1p_lock, flags);
byteout(cs->hw.avm.cfg_reg+ADDRREG_OFFSET,ISAC_REG_OFFSET+offset);
byteout(cs->hw.avm.cfg_reg+ADDRREG_OFFSET, offset + adr - 0x20);
byteout(cs->hw.avm.cfg_reg+DATAREG_OFFSET, value);
spin_unlock_irqrestore(&avm_a1p_lock, flags);
}
static inline void
ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size)
readfifo(struct IsdnCardState *cs, int offset, u8 *data, int size)
{
unsigned long flags;
spin_lock_irqsave(&avm_a1p_lock, flags);
byteout(cs->hw.avm.cfg_reg+ADDRREG_OFFSET,ISAC_FIFO_OFFSET);
insb(cs->hw.avm.cfg_reg+DATAREG_OFFSET, data, size);
spin_unlock_irqrestore(&avm_a1p_lock, flags);
byteout(cs->hw.avm.cfg_reg + ADDRREG_OFFSET, offset);
insb(cs->hw.avm.cfg_reg + DATAREG_OFFSET, data, size);
}
static inline void
WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size)
writefifo(struct IsdnCardState *cs, int offset, u8 *data, int size)
{
unsigned long flags;
spin_lock_irqsave(&avm_a1p_lock, flags);
byteout(cs->hw.avm.cfg_reg+ADDRREG_OFFSET,ISAC_FIFO_OFFSET);
byteout(cs->hw.avm.cfg_reg+ADDRREG_OFFSET, offset);
outsb(cs->hw.avm.cfg_reg+DATAREG_OFFSET, data, size);
spin_unlock_irqrestore(&avm_a1p_lock, flags);
}
static inline u_char
ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset)
static u8
isac_read(struct IsdnCardState *cs, u8 adr)
{
u_char ret;
unsigned long flags;
return readreg(cs, ISAC_REG_OFFSET, adr);
}
offset -= 0x20;
static void
isac_write(struct IsdnCardState *cs, u8 adr, u8 value)
{
writereg(cs, ISAC_REG_OFFSET, adr, value);
}
spin_lock_irqsave(&avm_a1p_lock, flags);
byteout(cs->hw.avm.cfg_reg+ADDRREG_OFFSET,
HSCX_REG_OFFSET+hscx*HSCX_CH_DIFF+offset);
ret = bytein(cs->hw.avm.cfg_reg+DATAREG_OFFSET);
spin_unlock_irqrestore(&avm_a1p_lock, flags);
return ret;
static void
isac_read_fifo(struct IsdnCardState *cs, u8 *data, int size)
{
readfifo(cs, ISAC_FIFO_OFFSET, data, size);
}
static inline void
WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value)
static void
isac_write_fifo(struct IsdnCardState *cs, u8 *data, int size)
{
unsigned long flags;
writefifo(cs, ISAC_FIFO_OFFSET, data, size);
}
offset -= 0x20;
static struct dc_hw_ops isac_ops = {
.read_reg = isac_read,
.write_reg = isac_write,
.read_fifo = isac_read_fifo,
.write_fifo = isac_write_fifo,
};
spin_lock_irqsave(&avm_a1p_lock, flags);
byteout(cs->hw.avm.cfg_reg+ADDRREG_OFFSET,
HSCX_REG_OFFSET+hscx*HSCX_CH_DIFF+offset);
byteout(cs->hw.avm.cfg_reg+DATAREG_OFFSET, value);
spin_unlock_irqrestore(&avm_a1p_lock, flags);
static u8
hscx_read(struct IsdnCardState *cs, int hscx, u8 adr)
{
return readreg(cs, HSCX_REG_OFFSET + hscx*HSCX_CH_DIFF, adr);
}
static inline void
ReadHSCXfifo(struct IsdnCardState *cs, int hscx, u_char * data, int size)
static void
hscx_write(struct IsdnCardState *cs, int hscx, u8 adr, u8 value)
{
unsigned long flags;
spin_lock_irqsave(&avm_a1p_lock, flags);
byteout(cs->hw.avm.cfg_reg+ADDRREG_OFFSET,
HSCX_FIFO_OFFSET+hscx*HSCX_CH_DIFF);
insb(cs->hw.avm.cfg_reg+DATAREG_OFFSET, data, size);
spin_unlock_irqrestore(&avm_a1p_lock, flags);
writereg(cs, HSCX_REG_OFFSET + hscx*HSCX_CH_DIFF, adr, value);
}
static inline void
WriteHSCXfifo(struct IsdnCardState *cs, int hscx, u_char * data, int size)
static void
hscx_read_fifo(struct IsdnCardState *cs, int hscx, u8 *data, int size)
{
unsigned long flags;
spin_lock_irqsave(&avm_a1p_lock, flags);
byteout(cs->hw.avm.cfg_reg+ADDRREG_OFFSET,
HSCX_FIFO_OFFSET+hscx*HSCX_CH_DIFF);
outsb(cs->hw.avm.cfg_reg+DATAREG_OFFSET, data, size);
spin_unlock_irqrestore(&avm_a1p_lock, flags);
return readfifo(cs, HSCX_FIFO_OFFSET + hscx*HSCX_CH_DIFF, data, size);
}
/*
* fast interrupt HSCX stuff goes here
*/
#define READHSCX(cs, nr, reg) ReadHSCX(cs, nr, reg)
#define WRITEHSCX(cs, nr, reg, data) WriteHSCX(cs, nr, reg, data)
#define READHSCXFIFO(cs, nr, ptr, cnt) ReadHSCXfifo(cs, nr, ptr, cnt)
#define WRITEHSCXFIFO(cs, nr, ptr, cnt) WriteHSCXfifo(cs, nr, ptr, cnt)
static void
hscx_write_fifo(struct IsdnCardState *cs, int hscx, u8 *data, int size)
{
writefifo(cs, HSCX_FIFO_OFFSET + hscx*HSCX_CH_DIFF, data, size);
}
#include "hscx_irq.c"
static struct bc_hw_ops hscx_ops = {
.read_reg = hscx_read,
.write_reg = hscx_write,
.read_fifo = hscx_read_fifo,
.write_fifo = hscx_write_fifo,
};
static void
avm_a1p_interrupt(int intno, void *dev_id, struct pt_regs *regs)
{
struct IsdnCardState *cs = dev_id;
u_char val, sval;
u8 val, sval;
spin_lock(&cs->lock);
while ((sval = (~bytein(cs->hw.avm.cfg_reg+ASL0_OFFSET) & ASL0_R_IRQPENDING))) {
if (cs->debug & L1_DEB_INTSTAT)
debugl1(cs, "avm IntStatus %x", sval);
if (sval & ASL0_R_HSCX) {
val = ReadHSCX(cs, 1, HSCX_ISTA);
val = hscx_read(cs, 1, HSCX_ISTA);
if (val)
hscx_int_main(cs, val);
}
if (sval & ASL0_R_ISAC) {
val = ReadISAC(cs, ISAC_ISTA);
val = isac_read(cs, ISAC_ISTA);
if (val)
isac_interrupt(cs, val);
}
}
WriteHSCX(cs, 0, HSCX_MASK, 0xff);
WriteHSCX(cs, 1, HSCX_MASK, 0xff);
WriteISAC(cs, ISAC_MASK, 0xff);
WriteISAC(cs, ISAC_MASK, 0x00);
WriteHSCX(cs, 0, HSCX_MASK, 0x00);
WriteHSCX(cs, 1, HSCX_MASK, 0x00);
hscx_write(cs, 0, HSCX_MASK, 0xFF);
hscx_write(cs, 1, HSCX_MASK, 0xFF);
isac_write(cs, ISAC_MASK, 0xFF);
isac_write(cs, ISAC_MASK, 0x0);
hscx_write(cs, 0, HSCX_MASK, 0x0);
hscx_write(cs, 1, HSCX_MASK, 0x0);
spin_unlock(&cs->lock);
}
......@@ -239,7 +225,7 @@ AVM_card_msg(struct IsdnCardState *cs, int mt, void *arg)
int __devinit
setup_avm_a1_pcmcia(struct IsdnCard *card)
{
u_char model, vers;
u8 model, vers;
struct IsdnCardState *cs = card->cs;
char tmp[64];
......@@ -270,13 +256,8 @@ setup_avm_a1_pcmcia(struct IsdnCard *card)
printk(KERN_INFO "AVM A1 PCMCIA: io 0x%x irq %d model %d version %d\n",
cs->hw.avm.cfg_reg, cs->irq, model, vers);
cs->readisac = &ReadISAC;
cs->writeisac = &WriteISAC;
cs->readisacfifo = &ReadISACfifo;
cs->writeisacfifo = &WriteISACfifo;
cs->BC_Read_Reg = &ReadHSCX;
cs->BC_Write_Reg = &WriteHSCX;
cs->BC_Send_Data = &hscx_fill_fifo;
cs->dc_hw_ops = &isac_ops;
cs->bc_hw_ops = &hscx_ops;
cs->cardmsg = &AVM_card_msg;
cs->irq_func = &avm_a1p_interrupt;
......
drivers/isdn/hisax/avm_pci.c
View file @ 1d0619c5
......@@ -76,12 +76,12 @@ static spinlock_t avm_pci_lock = SPIN_LOCK_UNLOCKED;
/* Interface functions */
static u_char
ReadISAC(struct IsdnCardState *cs, u_char offset)
static u8
ReadISAC(struct IsdnCardState *cs, u8 offset)
{
register u_char idx = (offset > 0x2f) ? AVM_ISAC_REG_HIGH : AVM_ISAC_REG_LOW;
register u_char val;
register unsigned long flags;
u8 idx = (offset > 0x2f) ? AVM_ISAC_REG_HIGH : AVM_ISAC_REG_LOW;
u8 val;
unsigned long flags;
spin_lock_irqsave(&avm_pci_lock, flags);
outb(idx, cs->hw.avm.cfg_reg + 4);
......@@ -91,10 +91,10 @@ ReadISAC(struct IsdnCardState *cs, u_char offset)
}
static void
WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
WriteISAC(struct IsdnCardState *cs, u8 offset, u8 value)
{
register u_char idx = (offset > 0x2f) ? AVM_ISAC_REG_HIGH : AVM_ISAC_REG_LOW;
register unsigned long flags;
u8 idx = (offset > 0x2f) ? AVM_ISAC_REG_HIGH : AVM_ISAC_REG_LOW;
unsigned long flags;
spin_lock_irqsave(&avm_pci_lock, flags);
outb(idx, cs->hw.avm.cfg_reg + 4);
......@@ -103,25 +103,32 @@ WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
}
static void
ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size)
ReadISACfifo(struct IsdnCardState *cs, u8 * data, int size)
{
outb(AVM_ISAC_FIFO, cs->hw.avm.cfg_reg + 4);
insb(cs->hw.avm.isac, data, size);
}
static void
WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size)
WriteISACfifo(struct IsdnCardState *cs, u8 * data, int size)
{
outb(AVM_ISAC_FIFO, cs->hw.avm.cfg_reg + 4);
outsb(cs->hw.avm.isac, data, size);
}
static struct dc_hw_ops isac_ops = {
.read_reg = ReadISAC,
.write_reg = WriteISAC,
.read_fifo = ReadISACfifo,
.write_fifo = WriteISACfifo,
};
static inline u_int
ReadHDLCPCI(struct IsdnCardState *cs, int chan, u_char offset)
ReadHDLCPCI(struct IsdnCardState *cs, int chan, u8 offset)
{
register u_int idx = chan ? AVM_HDLC_2 : AVM_HDLC_1;
register u_int val;
register unsigned long flags;
u_int idx = chan ? AVM_HDLC_2 : AVM_HDLC_1;
u_int val;
unsigned long flags;
spin_lock_irqsave(&avm_pci_lock, flags);
outl(idx, cs->hw.avm.cfg_reg + 4);
......@@ -131,10 +138,10 @@ ReadHDLCPCI(struct IsdnCardState *cs, int chan, u_char offset)
}
static inline void
WriteHDLCPCI(struct IsdnCardState *cs, int chan, u_char offset, u_int value)
WriteHDLCPCI(struct IsdnCardState *cs, int chan, u8 offset, u_int value)
{
register u_int idx = chan ? AVM_HDLC_2 : AVM_HDLC_1;
register unsigned long flags;
u_int idx = chan ? AVM_HDLC_2 : AVM_HDLC_1;
unsigned long flags;
spin_lock_irqsave(&avm_pci_lock, flags);
outl(idx, cs->hw.avm.cfg_reg + 4);
......@@ -142,12 +149,12 @@ WriteHDLCPCI(struct IsdnCardState *cs, int chan, u_char offset, u_int value)
spin_unlock_irqrestore(&avm_pci_lock, flags);
}
static inline u_char
ReadHDLCPnP(struct IsdnCardState *cs, int chan, u_char offset)
static inline u8
ReadHDLCPnP(struct IsdnCardState *cs, int chan, u8 offset)
{
register u_char idx = chan ? AVM_HDLC_2 : AVM_HDLC_1;
register u_char val;
register unsigned long flags;
u8 idx = chan ? AVM_HDLC_2 : AVM_HDLC_1;
u8 val;
unsigned long flags;
spin_lock_irqsave(&avm_pci_lock, flags);
outb(idx, cs->hw.avm.cfg_reg + 4);
......@@ -157,10 +164,10 @@ ReadHDLCPnP(struct IsdnCardState *cs, int chan, u_char offset)
}
static inline void
WriteHDLCPnP(struct IsdnCardState *cs, int chan, u_char offset, u_char value)
WriteHDLCPnP(struct IsdnCardState *cs, int chan, u8 offset, u8 value)
{
register u_char idx = chan ? AVM_HDLC_2 : AVM_HDLC_1;
register unsigned long flags;
u8 idx = chan ? AVM_HDLC_2 : AVM_HDLC_1;
unsigned long flags;
spin_lock_irqsave(&avm_pci_lock, flags);
outb(idx, cs->hw.avm.cfg_reg + 4);
......@@ -168,18 +175,6 @@ WriteHDLCPnP(struct IsdnCardState *cs, int chan, u_char offset, u_char value)
spin_unlock_irqrestore(&avm_pci_lock, flags);
}
static u_char
ReadHDLC_s(struct IsdnCardState *cs, int chan, u_char offset)
{
return(0xff & ReadHDLCPCI(cs, chan, offset));
}
static void
WriteHDLC_s(struct IsdnCardState *cs, int chan, u_char offset, u_char value)
{
WriteHDLCPCI(cs, chan, offset, value);
}
static inline
struct BCState *Sel_BCS(struct IsdnCardState *cs, int channel)
{
......@@ -265,8 +260,8 @@ static inline void
hdlc_empty_fifo(struct BCState *bcs, int count)
{
register u_int *ptr;
u_char *p;
u_char idx = bcs->channel ? AVM_HDLC_2 : AVM_HDLC_1;
u8 *p;
u8 idx = bcs->channel ? AVM_HDLC_2 : AVM_HDLC_1;
int cnt=0;
struct IsdnCardState *cs = bcs->cs;
......@@ -304,7 +299,7 @@ hdlc_empty_fifo(struct BCState *bcs, int count)
char *t = bcs->blog;
if (cs->subtyp == AVM_FRITZ_PNP)
p = (u_char *) ptr;
p = (u8 *) ptr;
t += sprintf(t, "hdlc_empty_fifo %c cnt %d",
bcs->channel ? 'B' : 'A', count);
QuickHex(t, p, count);
......@@ -312,7 +307,7 @@ hdlc_empty_fifo(struct BCState *bcs, int count)
}
}
static inline void
static void
hdlc_fill_fifo(struct BCState *bcs)
{
struct IsdnCardState *cs = bcs->cs;
......@@ -365,6 +360,10 @@ reset_xmit(struct BCState *bcs)
hdlc_fill_fifo(bcs);
}
static struct bc_l1_ops hdlc_l1_ops = {
.fill_fifo = hdlc_fill_fifo,
};
static inline void
HDLC_irq(struct BCState *bcs, u_int stat)
{
......@@ -595,8 +594,8 @@ static void
avm_pcipnp_interrupt(int intno, void *dev_id, struct pt_regs *regs)
{
struct IsdnCardState *cs = dev_id;
u_char val;
u_char sval;
u8 val;
u8 sval;
if (!cs) {
printk(KERN_WARNING "AVM PCI: Spurious interrupt!\n");
......@@ -764,30 +763,20 @@ setup_avm_pcipnp(struct IsdnCard *card)
printk(KERN_INFO "AVM PCI: stat %#x\n", val);
printk(KERN_INFO "AVM PCI: Class %X Rev %d\n",
val & 0xff, (val>>8) & 0xff);
cs->BC_Read_Reg = &ReadHDLC_s;
cs->BC_Write_Reg = &WriteHDLC_s;
break;
case AVM_FRITZ_PNP:
val = inb(cs->hw.avm.cfg_reg);
ver = inb(cs->hw.avm.cfg_reg + 1);
printk(KERN_INFO "AVM PnP: Class %X Rev %d\n", val, ver);
reset_avmpcipnp(cs);
cs->BC_Read_Reg = &ReadHDLCPnP;
cs->BC_Write_Reg = &WriteHDLCPnP;
break;
default:
printk(KERN_WARNING "AVM unknown subtype %d\n", cs->subtyp);
return(0);
}
printk(KERN_INFO "HiSax: %s config irq:%d base:0x%X\n",
(cs->subtyp == AVM_FRITZ_PCI) ? "AVM Fritz!PCI" : "AVM Fritz!PnP",
cs->irq, cs->hw.avm.cfg_reg);
cs->readisac = &ReadISAC;
cs->writeisac = &WriteISAC;
cs->readisacfifo = &ReadISACfifo;
cs->writeisacfifo = &WriteISACfifo;
cs->BC_Send_Data = &hdlc_fill_fifo;
cs->dc_hw_ops = &isac_ops;
cs->bc_l1_ops = &hdlc_l1_ops;
cs->cardmsg = &AVM_card_msg;
cs->irq_func = &avm_pcipnp_interrupt;
ISACVersion(cs, (cs->subtyp == AVM_FRITZ_PCI) ? "AVM PCI:" : "AVM PnP:");
......
drivers/isdn/hisax/avma1_cs.c
View file @ 1d0619c5
......@@ -298,7 +298,7 @@ static void avma1cs_config(dev_link_t *link)
cistpl_cftable_entry_t *cf = &parse.cftable_entry;
local_info_t *dev;
int i;
u_char buf[64];
u8 buf[64];
char devname[128];
int busy = 0;
......
drivers/isdn/hisax/bkm_a4t.c
View file @ 1d0619c5
......@@ -26,10 +26,10 @@ static spinlock_t bkm_a4t_lock = SPIN_LOCK_UNLOCKED;
const char *bkm_a4t_revision = "$Revision: 1.13.6.6 $";
static inline u_char
readreg(unsigned int ale, unsigned long adr, u_char off)
static inline u8
readreg(unsigned int ale, unsigned long adr, u8 off)
{
register u_int ret;
u_int ret;
unsigned long flags;
unsigned int *po = (unsigned int *) adr; /* Postoffice */
spin_lock_irqsave(&bkm_a4t_lock, flags);
......@@ -42,19 +42,8 @@ readreg(unsigned int ale, unsigned long adr, u_char off)
return ((unsigned char) ret);
}
static inline void
readfifo(unsigned int ale, unsigned long adr, u_char off, u_char * data, int size)
{
/* fifo read without cli because it's allready done */
int i;
for (i = 0; i < size; i++)
*data++ = readreg(ale, adr, off);
}
static inline void
writereg(unsigned int ale, unsigned long adr, u_char off, u_char data)
writereg(unsigned int ale, unsigned long adr, u8 off, u8 data)
{
unsigned long flags;
unsigned int *po = (unsigned int *) adr; /* Postoffice */
......@@ -66,77 +55,93 @@ writereg(unsigned int ale, unsigned long adr, u_char off, u_char data)
spin_unlock_irqrestore(&bkm_a4t_lock, flags);
}
static inline void
writefifo(unsigned int ale, unsigned long adr, u_char off, u_char * data, int size)
readfifo(unsigned int ale, unsigned long adr, u8 off, u8 * data, int size)
{
/* fifo write without cli because it's allready done */
int i;
for (i = 0; i < size; i++)
writereg(ale, adr, off, *data++);
*data++ = readreg(ale, adr, off);
}
static inline void
writefifo(unsigned int ale, unsigned long adr, u8 off, u8 * data, int size)
{
int i;
/* Interface functions */
for (i = 0; i < size; i++)
writereg(ale, adr, off, *data++);
}
static u_char
ReadISAC(struct IsdnCardState *cs, u_char offset)
static u8
isac_read(struct IsdnCardState *cs, u8 offset)
{
return (readreg(cs->hw.ax.isac_ale, cs->hw.ax.isac_adr, offset));
}
static void
WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
isac_write(struct IsdnCardState *cs, u8 offset, u8 value)
{
writereg(cs->hw.ax.isac_ale, cs->hw.ax.isac_adr, offset, value);
}
static void
ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size)
isac_read_fifo(struct IsdnCardState *cs, u8 * data, int size)
{
readfifo(cs->hw.ax.isac_ale, cs->hw.ax.isac_adr, 0, data, size);
}
static void
WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size)
isac_write_fifo(struct IsdnCardState *cs, u8 * data, int size)
{
writefifo(cs->hw.ax.isac_ale, cs->hw.ax.isac_adr, 0, data, size);
}
static u_char
ReadJADE(struct IsdnCardState *cs, int jade, u_char offset)
static struct dc_hw_ops isac_ops = {
.read_reg = isac_read,
.write_reg = isac_write,
.read_fifo = isac_read_fifo,
.write_fifo = isac_write_fifo,
};
static u8
jade_read(struct IsdnCardState *cs, int jade, u8 offset)
{
return (readreg(cs->hw.ax.jade_ale, cs->hw.ax.jade_adr, offset + (jade == -1 ? 0 : (jade ? 0xC0 : 0x80))));
return readreg(cs->hw.ax.jade_ale, cs->hw.ax.jade_adr, offset + (jade == -1 ? 0 : (jade ? 0xC0 : 0x80)));
}
static void
WriteJADE(struct IsdnCardState *cs, int jade, u_char offset, u_char value)
jade_write(struct IsdnCardState *cs, int jade, u8 offset, u8 value)
{
writereg(cs->hw.ax.jade_ale, cs->hw.ax.jade_adr, offset + (jade == -1 ? 0 : (jade ? 0xC0 : 0x80)), value);
}
/*
* fast interrupt JADE stuff goes here
*/
#define READJADE(cs, nr, reg) readreg(cs->hw.ax.jade_ale,\
cs->hw.ax.jade_adr, reg + (nr == -1 ? 0 : (nr ? 0xC0 : 0x80)))
#define WRITEJADE(cs, nr, reg, data) writereg(cs->hw.ax.jade_ale,\
cs->hw.ax.jade_adr, reg + (nr == -1 ? 0 : (nr ? 0xC0 : 0x80)), data)
static void
jade_read_fifo(struct IsdnCardState *cs, int hscx, u8 *data, int size)
{
readfifo(cs->hw.ax.jade_ale, cs->hw.ax.jade_adr,
(hscx == -1 ? 0 : (hscx ? 0xc0 : 0x80)), data, size);
}
#define READJADEFIFO(cs, nr, ptr, cnt) readfifo(cs->hw.ax.jade_ale,\
cs->hw.ax.jade_adr, (nr == -1 ? 0 : (nr ? 0xC0 : 0x80)), ptr, cnt)
#define WRITEJADEFIFO(cs, nr, ptr, cnt) writefifo( cs->hw.ax.jade_ale,\
cs->hw.ax.jade_adr, (nr == -1 ? 0 : (nr ? 0xC0 : 0x80)), ptr, cnt)
static void
jade_write_fifo(struct IsdnCardState *cs, int hscx, u8 *data, int size)
{
writefifo(cs->hw.ax.jade_ale, cs->hw.ax.jade_adr,
(hscx == -1 ? 0 : (hscx ? 0xc0 : 0x80)), data, size);
}
#include "jade_irq.c"
static struct bc_hw_ops jade_ops = {
.read_reg = jade_read,
.write_reg = jade_write,
.read_fifo = jade_read_fifo,
.write_fifo = jade_write_fifo,
};
static void
bkm_interrupt(int intno, void *dev_id, struct pt_regs *regs)
{
struct IsdnCardState *cs = dev_id;
u_char val = 0;
u8 val = 0;
I20_REGISTER_FILE *pI20_Regs;
spin_lock(&cs->lock);
......@@ -327,13 +332,8 @@ setup_bkm_a4t(struct IsdnCard *card)
CardType[card->typ], cs->hw.ax.base, cs->irq);
reset_bkm(cs);
cs->readisac = &ReadISAC;
cs->writeisac = &WriteISAC;
cs->readisacfifo = &ReadISACfifo;
cs->writeisacfifo = &WriteISACfifo;
cs->BC_Read_Reg = &ReadJADE;
cs->BC_Write_Reg = &WriteJADE;
cs->BC_Send_Data = &jade_fill_fifo;
cs->dc_hw_ops = &isac_ops;
cs->bc_hw_ops = &jade_ops;
cs->cardmsg = &BKM_card_msg;
cs->irq_func = &bkm_interrupt;
cs->irq_flags |= SA_SHIRQ;
......
drivers/isdn/hisax/bkm_a8.c
View file @ 1d0619c5
......@@ -41,127 +41,134 @@ static const char *sct_quadro_subtypes[] =
#define wordout(addr,val) outw(val,addr)
#define wordin(addr) inw(addr)
static inline u_char
readreg(unsigned int ale, unsigned int adr, u_char off)
static inline u8
readreg(struct IsdnCardState *cs, u8 off)
{
register u_char ret;
u8 ret;
unsigned long flags;
spin_lock_irqsave(&bkm_a8_lock, flags);
wordout(ale, off);
ret = wordin(adr) & 0xFF;
wordout(cs->hw.ax.base, off);
ret = wordin(cs->hw.ax.data_adr) & 0xFF;
spin_unlock_irqrestore(&bkm_a8_lock, flags);
return (ret);
}
static inline void
readfifo(unsigned int ale, unsigned int adr, u_char off, u_char * data, int size)
{
/* fifo read without cli because it's allready done */
int i;
wordout(ale, off);
for (i = 0; i < size; i++)
data[i] = wordin(adr) & 0xFF;
}
static inline void
writereg(unsigned int ale, unsigned int adr, u_char off, u_char data)
writereg(struct IsdnCardState *cs, u8 off, u8 data)
{
unsigned long flags;
spin_lock_irqsave(&bkm_a8_lock, flags);
wordout(ale, off);
wordout(adr, data);
wordout(cs->hw.ax.base, off);
wordout(cs->hw.ax.data_adr, data);
spin_unlock_irqrestore(&bkm_a8_lock, flags);
}
static inline void
writefifo(unsigned int ale, unsigned int adr, u_char off, u_char * data, int size)
readfifo(struct IsdnCardState *cs, u8 off, u8 *data, int size)
{
/* fifo write without cli because it's allready done */
int i;
wordout(ale, off);
wordout(cs->hw.ax.base, off);
for (i = 0; i < size; i++)
wordout(adr, data[i]);
data[i] = wordin(cs->hw.ax.data_adr) & 0xFF;
}
/* Interface functions */
static inline void
writefifo(struct IsdnCardState *cs, u8 off, u8 *data, int size)
{
int i;
wordout(cs->hw.ax.base, off);
for (i = 0; i < size; i++)
wordout(cs->hw.ax.data_adr, data[i]);
}
static u_char
ReadISAC(struct IsdnCardState *cs, u_char offset)
static u8
ipac_dc_read(struct IsdnCardState *cs, u8 offset)
{
return (readreg(cs->hw.ax.base, cs->hw.ax.data_adr, offset | 0x80));
return readreg(cs, offset | 0x80);
}
static void
WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
ipac_dc_write(struct IsdnCardState *cs, u8 offset, u8 value)
{
writereg(cs->hw.ax.base, cs->hw.ax.data_adr, offset | 0x80, value);
writereg(cs, offset | 0x80, value);
}
static void
ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size)
ipac_dc_read_fifo(struct IsdnCardState *cs, u8 * data, int size)
{
readfifo(cs->hw.ax.base, cs->hw.ax.data_adr, 0x80, data, size);
readfifo(cs, 0x80, data, size);
}
static void
WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size)
ipac_dc_write_fifo(struct IsdnCardState *cs, u8 * data, int size)
{
writefifo(cs->hw.ax.base, cs->hw.ax.data_adr, 0x80, data, size);
writefifo(cs, 0x80, data, size);
}
static struct dc_hw_ops ipac_dc_ops = {
.read_reg = ipac_dc_read,
.write_reg = ipac_dc_write,
.read_fifo = ipac_dc_read_fifo,
.write_fifo = ipac_dc_write_fifo,
};
static u_char
ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset)
static u8
hscx_read(struct IsdnCardState *cs, int hscx, u8 offset)
{
return (readreg(cs->hw.ax.base, cs->hw.ax.data_adr, offset + (hscx ? 0x40 : 0)));
return readreg(cs, offset + (hscx ? 0x40 : 0));
}
static void
WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value)
hscx_write(struct IsdnCardState *cs, int hscx, u8 offset, u8 value)
{
writereg(cs->hw.ax.base, cs->hw.ax.data_adr, offset + (hscx ? 0x40 : 0), value);
writereg(cs, offset + (hscx ? 0x40 : 0), value);
}
/* Set the specific ipac to active */
static void
set_ipac_active(struct IsdnCardState *cs, u_int active)
hscx_read_fifo(struct IsdnCardState *cs, int hscx, u8 *data, int size)
{
/* set irq mask */
writereg(cs->hw.ax.base, cs->hw.ax.data_adr, IPAC_MASK,
active ? 0xc0 : 0xff);
readfifo(cs, hscx ? 0x40 : 0, data, size);
}
/*
* fast interrupt HSCX stuff goes here
*/
static void
hscx_write_fifo(struct IsdnCardState *cs, int hscx, u8 *data, int size)
{
writefifo(cs, hscx ? 0x40 : 0, data, size);
}
#define READHSCX(cs, nr, reg) readreg(cs->hw.ax.base, \
cs->hw.ax.data_adr, reg + (nr ? 0x40 : 0))
#define WRITEHSCX(cs, nr, reg, data) writereg(cs->hw.ax.base, \
cs->hw.ax.data_adr, reg + (nr ? 0x40 : 0), data)
#define READHSCXFIFO(cs, nr, ptr, cnt) readfifo(cs->hw.ax.base, \
cs->hw.ax.data_adr, (nr ? 0x40 : 0), ptr, cnt)
#define WRITEHSCXFIFO(cs, nr, ptr, cnt) writefifo(cs->hw.ax.base, \
cs->hw.ax.data_adr, (nr ? 0x40 : 0), ptr, cnt)
static struct bc_hw_ops hscx_ops = {
.read_reg = hscx_read,
.write_reg = hscx_write,
.read_fifo = hscx_read_fifo,
.write_fifo = hscx_write_fifo,
};
#include "hscx_irq.c"
/* Set the specific ipac to active */
static void
set_ipac_active(struct IsdnCardState *cs, u_int active)
{
/* set irq mask */
writereg(cs, IPAC_MASK, active ? 0xc0 : 0xff);
}
static void
bkm_interrupt_ipac(int intno, void *dev_id, struct pt_regs *regs)
{
struct IsdnCardState *cs = dev_id;
u_char ista, val, icnt = 5;
u8 ista, val, icnt = 5;
spin_lock(&cs->lock);
ista = readreg(cs->hw.ax.base, cs->hw.ax.data_adr, IPAC_ISTA);
ista = readreg(cs, IPAC_ISTA);
if (!(ista & 0x3f)) /* not this IPAC */
goto unlock;
Start_IPAC:
if (cs->debug & L1_DEB_IPAC)
debugl1(cs, "IPAC ISTA %02X", ista);
if (ista & 0x0f) {
val = readreg(cs->hw.ax.base, cs->hw.ax.data_adr, HSCX_ISTA + 0x40);
val = hscx_read(cs, 1, HSCX_ISTA);
if (ista & 0x01)
val |= 0x01;
if (ista & 0x04)
......@@ -173,7 +180,7 @@ bkm_interrupt_ipac(int intno, void *dev_id, struct pt_regs *regs)
}
}
if (ista & 0x20) {
val = 0xfe & readreg(cs->hw.ax.base, cs->hw.ax.data_adr, ISAC_ISTA | 0x80);
val = ipac_dc_read(cs, ISAC_ISTA) & 0xfe;
if (val) {
isac_interrupt(cs, val);
}
......@@ -182,7 +189,7 @@ bkm_interrupt_ipac(int intno, void *dev_id, struct pt_regs *regs)
val = 0x01;
isac_interrupt(cs, val);
}
ista = readreg(cs->hw.ax.base, cs->hw.ax.data_adr, IPAC_ISTA);
ista = readreg(cs, IPAC_ISTA);
if ((ista & 0x3f) && icnt) {
icnt--;
goto Start_IPAC;
......@@ -191,8 +198,8 @@ bkm_interrupt_ipac(int intno, void *dev_id, struct pt_regs *regs)
printk(KERN_WARNING "HiSax: %s (%s) IRQ LOOP\n",
CardType[cs->typ],
sct_quadro_subtypes[cs->subtyp]);
writereg(cs->hw.ax.base, cs->hw.ax.data_adr, IPAC_MASK, 0xFF);
writereg(cs->hw.ax.base, cs->hw.ax.data_adr, IPAC_MASK, 0xC0);
writereg(cs, IPAC_MASK, 0xFF);
writereg(cs, IPAC_MASK, 0xC0);
unlock:
spin_unlock(&cs->lock);
}
......@@ -277,7 +284,7 @@ sct_alloc_io(u_int adr, u_int len)
static struct pci_dev *dev_a8 __initdata = NULL;
static u16 sub_vendor_id __initdata = 0;
static u16 sub_sys_id __initdata = 0;
static u_char pci_irq __initdata = 0;
static u8 pci_irq __initdata = 0;
#endif /* CONFIG_PCI */
......@@ -287,7 +294,7 @@ setup_sct_quadro(struct IsdnCard *card)
#if CONFIG_PCI
struct IsdnCardState *cs = card->cs;
char tmp[64];
u_char pci_rev_id;
u8 pci_rev_id;
u_int found = 0;
u_int pci_ioaddr1, pci_ioaddr2, pci_ioaddr3, pci_ioaddr4, pci_ioaddr5;
......@@ -391,15 +398,6 @@ setup_sct_quadro(struct IsdnCard *card)
return(0);
if (sct_alloc_io(pci_ioaddr5, 64))
return(0);
/* disable all IPAC */
writereg(pci_ioaddr5, pci_ioaddr5 + 4,
IPAC_MASK, 0xFF);
writereg(pci_ioaddr4 + 0x08, pci_ioaddr4 + 0x0c,
IPAC_MASK, 0xFF);
writereg(pci_ioaddr3 + 0x10, pci_ioaddr3 + 0x14,
IPAC_MASK, 0xFF);
writereg(pci_ioaddr2 + 0x20, pci_ioaddr2 + 0x24,
IPAC_MASK, 0xFF);
break;
case 2:
cs->hw.ax.base = pci_ioaddr4 + 0x08;
......@@ -417,8 +415,8 @@ setup_sct_quadro(struct IsdnCard *card)
return(0);
break;
}
/* For isac and hscx data path */
cs->hw.ax.data_adr = cs->hw.ax.base + 4;
writereg(cs, IPAC_MASK, 0xFF);
printk(KERN_INFO "HiSax: %s (%s) configured at 0x%.4lX, 0x%.4lX, 0x%.4lX and IRQ %d\n",
CardType[card->typ],
......@@ -430,21 +428,15 @@ setup_sct_quadro(struct IsdnCard *card)
test_and_set_bit(HW_IPAC, &cs->HW_Flags);
cs->readisac = &ReadISAC;
cs->writeisac = &WriteISAC;
cs->readisacfifo = &ReadISACfifo;
cs->writeisacfifo = &WriteISACfifo;
cs->BC_Read_Reg = &ReadHSCX;
cs->BC_Write_Reg = &WriteHSCX;
cs->BC_Send_Data = &hscx_fill_fifo;
cs->dc_hw_ops = &ipac_dc_ops;
cs->bc_hw_ops = &hscx_ops;
cs->cardmsg = &BKM_card_msg;
cs->irq_func = &bkm_interrupt_ipac;
printk(KERN_INFO "HiSax: %s (%s): IPAC Version %d\n",
CardType[card->typ],
sct_quadro_subtypes[cs->subtyp],
readreg(cs->hw.ax.base, cs->hw.ax.data_adr, IPAC_ID));
readreg(cs, IPAC_ID));
return (1);
#else
printk(KERN_ERR "HiSax: bkm_a8 only supported on PCI Systems\n");
......
drivers/isdn/hisax/callc.c
View file @ 1d0619c5
......@@ -1424,7 +1424,7 @@ capi_debug(struct Channel *chanp, capi_msg *cm)
{
char *t = tmpbuf;
t += QuickHex(t, (u_char *)cm, (cm->Length>50)? 50: cm->Length);
t += QuickHex(t, (u8 *)cm, (cm->Length>50)? 50: cm->Length);
t--;
*t= 0;
HiSax_putstatus(chanp->cs, "Ch", "%d CAPIMSG %s", chanp->chan, tmpbuf);
......
drivers/isdn/hisax/config.c
View file @ 1d0619c5
......@@ -634,10 +634,10 @@ struct IsdnCardState *hisax_get_card(int cardnr)
return NULL;
}
int HiSax_readstatus(u_char * buf, int len, int user, int id, int channel)
int HiSax_readstatus(u8 * buf, int len, int user, int id, int channel)
{
int count, cnt;
u_char *p = buf;
u8 *p = buf;
struct IsdnCardState *cs = hisax_findcard(id);
if (cs) {
......@@ -702,7 +702,7 @@ int jiftime(char *s, long mark)
return 8;
}
static u_char tmpbuf[HISAX_STATUS_BUFSIZE];
static u8 tmpbuf[HISAX_STATUS_BUFSIZE];
void VHiSax_putstatus(struct IsdnCardState *cs, char *head, char *fmt,
va_list args)
......@@ -711,7 +711,7 @@ void VHiSax_putstatus(struct IsdnCardState *cs, char *head, char *fmt,
unsigned long flags;
int count, i;
u_char *p;
u8 *p;
isdn_ctrl ic;
int len;
......@@ -1711,7 +1711,7 @@ int avm_a1_init_pcmcia(void *pcm_iob, int pcm_irq, int *busy_flag, int prot)
int __devinit hisax_init_pcmcia(void *pcm_iob, int *busy_flag,
struct IsdnCard *card)
{
u_char ids[16];
u8 ids[16];
int ret = -1;
cards[nrcards] = *card;
......@@ -2018,7 +2018,7 @@ static void hisax_bc_close(struct BCState *bcs)
static void EChannel_proc_rcv(struct hisax_d_if *d_if)
{
struct IsdnCardState *cs = d_if->cs;
u_char *ptr;
u8 *ptr;
struct sk_buff *skb;
while ((skb = skb_dequeue(&d_if->erq)) != NULL) {
......
drivers/isdn/hisax/diva.c
View file @ 1d0619c5
This diff is collapsed.
drivers/isdn/hisax/elsa.c
View file @ 1d0619c5
This diff is collapsed.
drivers/isdn/hisax/elsa_ser.c
View file @ 1d0619c5
......@@ -26,7 +26,7 @@
//#define SERIAL_DEBUG_REG 1
#ifdef SERIAL_DEBUG_REG
static u_char deb[32];
static u8 deb[32];
const char *ModemIn[] = {"RBR","IER","IIR","LCR","MCR","LSR","MSR","SCR"};
const char *ModemOut[] = {"THR","IER","FCR","LCR","MCR","LSR","MSR","SCR"};
#endif
......@@ -375,6 +375,10 @@ static inline void transmit_chars(struct IsdnCardState *cs, int *intr_done)
}
}
static struct bc_l1_ops modem_l1_ops = {
.fill_fifo = modem_fill,
};
static void rs_interrupt_elsa(int irq, struct IsdnCardState *cs)
{
......@@ -436,9 +440,9 @@ close_elsastate(struct BCState *bcs)
}
void
modem_write_cmd(struct IsdnCardState *cs, u_char *buf, int len) {
modem_write_cmd(struct IsdnCardState *cs, u8 *buf, int len) {
int count, fp;
u_char *msg = buf;
u8 *msg = buf;
unsigned long flags;
if (!len)
......@@ -609,7 +613,7 @@ setstack_elsa(struct PStack *st, struct BCState *bcs)
bcs->tx_cnt = 0;
bcs->cs->hw.elsa.bcs = bcs;
st->l1.l2l1 = modem_l2l1;
bcs->cs->BC_Send_Data = modem_fill;
bcs->cs->bc_l1_ops = &modem_l1_ops;
break;
}
st->l1.bcs = bcs;
......
drivers/isdn/hisax/enternow.h
View file @ 1d0619c5
......@@ -40,12 +40,3 @@
* den TigerJet i/o-Raum gemappt
* -> 0x01 des AMD bei hw.njet.base + 0C4 */
#define TJ_AMD_PORT 0xC0
/* ***************************************************************************************** *
* *************************************** Prototypen ************************************** *
* ***************************************************************************************** */
BYTE ReadByteAmd7930(struct IsdnCardState *cs, BYTE offset);
void WriteByteAmd7930(struct IsdnCardState *cs, BYTE offset, BYTE value);
drivers/isdn/hisax/enternow_pci.c
View file @ 1d0619c5
......@@ -80,7 +80,7 @@ const char *enternow_pci_rev = "$Revision: 1.1.2.1 $";
/* cs->readisac, macro rByteAMD */
BYTE
static BYTE
ReadByteAmd7930(struct IsdnCardState *cs, BYTE offset)
{
/* direktes Register */
......@@ -95,7 +95,7 @@ ReadByteAmd7930(struct IsdnCardState *cs, BYTE offset)
}
/* cs->writeisac, macro wByteAMD */
void
static void
WriteByteAmd7930(struct IsdnCardState *cs, BYTE offset, BYTE value)
{
/* direktes Register */
......@@ -110,6 +110,11 @@ WriteByteAmd7930(struct IsdnCardState *cs, BYTE offset, BYTE value)
}
static struct dc_hw_ops enternow_ops = {
.read_reg = ReadByteAmd7930,
.write_reg = WriteByteAmd7930,
};
void
enpci_setIrqMask(struct IsdnCardState *cs, BYTE val) {
if (!val)
......@@ -119,17 +124,6 @@ enpci_setIrqMask(struct IsdnCardState *cs, BYTE val) {
}
static BYTE dummyrr(struct IsdnCardState *cs, int chan, BYTE off)
{
return(5);
}
static void dummywr(struct IsdnCardState *cs, int chan, BYTE off, BYTE value)
{
}
/* ******************************************************************************** */
......@@ -375,15 +369,9 @@ setup_enternow_pci(struct IsdnCard *card)
}
reset_enpci(cs);
cs->hw.njet.last_is0 = 0;
/* macro rByteAMD */
cs->readisac = &ReadByteAmd7930;
/* macro wByteAMD */
cs->writeisac = &WriteByteAmd7930;
cs->dc_hw_ops = &enternow_ops;
cs->dc.amd7930.setIrqMask = &enpci_setIrqMask;
cs->BC_Read_Reg = &dummyrr;
cs->BC_Write_Reg = &dummywr;
cs->BC_Send_Data = &netjet_fill_dma;
cs->cardmsg = &enpci_card_msg;
cs->irq_func = &enpci_interrupt;
cs->irq_flags |= SA_SHIRQ;
......
drivers/isdn/hisax/gazel.c
View file @ 1d0619c5
This diff is collapsed.
drivers/isdn/hisax/hfc_2bds0.c
View file @ 1d0619c5
......@@ -23,16 +23,10 @@
#define byteout(addr,val) outb(val,addr)
#define bytein(addr) inb(addr)
static void
dummyf(struct IsdnCardState *cs, u_char * data, int size)
{
printk(KERN_WARNING "HiSax: hfcd dummy fifo called\n");
}
static inline u_char
ReadReg(struct IsdnCardState *cs, int data, u_char reg)
static inline u8
ReadReg(struct IsdnCardState *cs, int data, u8 reg)
{
register u_char ret;
register u8 ret;
if (data) {
if (cs->hw.hfcD.cip != reg) {
......@@ -50,7 +44,7 @@ ReadReg(struct IsdnCardState *cs, int data, u_char reg)
}
static inline void
WriteReg(struct IsdnCardState *cs, int data, u_char reg, u_char value)
WriteReg(struct IsdnCardState *cs, int data, u8 reg, u8 value)
{
if (cs->hw.hfcD.cip != reg) {
cs->hw.hfcD.cip = reg;
......@@ -64,16 +58,21 @@ WriteReg(struct IsdnCardState *cs, int data, u_char reg, u_char value)
#endif
}
static struct bc_hw_ops hfcs_bc_ops = {
.read_reg = ReadReg,
.write_reg = WriteReg,
};
/* Interface functions */
static u_char
readreghfcd(struct IsdnCardState *cs, u_char offset)
static inline u8
hfcs_read_reg(struct IsdnCardState *cs, u8 offset)
{
return(ReadReg(cs, HFCD_DATA, offset));
return ReadReg(cs, HFCD_DATA, offset);
}
static void
writereghfcd(struct IsdnCardState *cs, u_char offset, u_char value)
static inline void
hfcs_write_reg(struct IsdnCardState *cs, u8 offset, u8 value)
{
WriteReg(cs, HFCD_DATA, offset, value);
}
......@@ -81,12 +80,7 @@ writereghfcd(struct IsdnCardState *cs, u_char offset, u_char value)
void
set_cs_func(struct IsdnCardState *cs)
{
cs->readisac = &readreghfcd;
cs->writeisac = &writereghfcd;
cs->readisacfifo = &dummyf;
cs->writeisacfifo = &dummyf;
cs->BC_Read_Reg = &ReadReg;
cs->BC_Write_Reg = &WriteReg;
cs->bc_hw_ops = &hfcs_bc_ops;
}
static inline int
......@@ -118,9 +112,9 @@ WaitNoBusy(struct IsdnCardState *cs)
}
static int
SelFiFo(struct IsdnCardState *cs, u_char FiFo)
SelFiFo(struct IsdnCardState *cs, u8 FiFo)
{
u_char cip;
u8 cip;
if (cs->hw.hfcD.fifo == FiFo)
return(1);
......@@ -144,7 +138,7 @@ SelFiFo(struct IsdnCardState *cs, u_char FiFo)
}
cs->hw.hfcD.fifo = FiFo;
WaitNoBusy(cs);
cs->BC_Write_Reg(cs, HFCD_DATA, cip, 0);
WriteReg(cs, HFCD_DATA, cip, 0);
WaitForBusy(cs);
return(2);
}
......@@ -177,7 +171,7 @@ GetFreeFifoBytes_D(struct IsdnCardState *cs)
}
static int
ReadZReg(struct IsdnCardState *cs, u_char reg)
ReadZReg(struct IsdnCardState *cs, u8 reg)
{
int val;
......@@ -191,12 +185,12 @@ ReadZReg(struct IsdnCardState *cs, u_char reg)
static struct sk_buff
*hfc_empty_fifo(struct BCState *bcs, int count)
{
u_char *ptr;
u8 *ptr;
struct sk_buff *skb;
struct IsdnCardState *cs = bcs->cs;
int idx;
int chksum;
u_char stat, cip;
u8 stat, cip;
if ((cs->debug & L1_DEB_HSCX) && !(cs->debug & L1_DEB_HSCX_FIFO))
debugl1(cs, "hfc_empty_fifo");
......@@ -272,7 +266,7 @@ hfc_fill_fifo(struct BCState *bcs)
struct IsdnCardState *cs = bcs->cs;
int idx, fcnt;
int count;
u_char cip;
u8 cip;
if (!bcs->tx_skb)
return;
......@@ -340,7 +334,7 @@ main_rec_2bds0(struct BCState *bcs)
{
struct IsdnCardState *cs = bcs->cs;
int z1, z2, rcnt;
u_char f1, f2, cip;
u8 f1, f2, cip;
int receive, count = 5;
struct sk_buff *skb;
......@@ -548,18 +542,18 @@ int receive_dmsg(struct IsdnCardState *cs)
struct sk_buff *skb;
int idx;
int rcnt, z1, z2;
u_char stat, cip, f1, f2;
u8 stat, cip, f1, f2;
int chksum;
int count=5;
u_char *ptr;
u8 *ptr;
SelFiFo(cs, 4 | HFCD_REC);
cip = HFCD_FIFO | HFCD_F1 | HFCD_REC;
WaitNoBusy(cs);
f1 = cs->readisac(cs, cip) & 0xf;
f1 = hfcs_read_reg(cs, cip) & 0xf;
cip = HFCD_FIFO | HFCD_F2 | HFCD_REC;
WaitNoBusy(cs);
f2 = cs->readisac(cs, cip) & 0xf;
f2 = hfcs_read_reg(cs, cip) & 0xf;
while ((f1 != f2) && count--) {
z1 = ReadZReg(cs, HFCD_FIFO | HFCD_Z1 | HFCD_REC);
z2 = ReadZReg(cs, HFCD_FIFO | HFCD_Z2 | HFCD_REC);
......@@ -634,7 +628,7 @@ int receive_dmsg(struct IsdnCardState *cs)
WaitForBusy(cs);
cip = HFCD_FIFO | HFCD_F2 | HFCD_REC;
WaitNoBusy(cs);
f2 = cs->readisac(cs, cip) & 0xf;
f2 = hfcs_read_reg(cs, cip) & 0xf;
}
return(1);
}
......@@ -644,7 +638,7 @@ hfc_fill_dfifo(struct IsdnCardState *cs)
{
int idx, fcnt;
int count;
u_char cip;
u8 cip;
if (!cs->tx_skb)
return;
......@@ -716,9 +710,9 @@ struct BCState *Sel_BCS(struct IsdnCardState *cs, int channel)
}
void
hfc2bds0_interrupt(struct IsdnCardState *cs, u_char val)
hfc2bds0_interrupt(struct IsdnCardState *cs, u8 val)
{
u_char exval;
u8 exval;
struct BCState *bcs;
int count=15;
......@@ -727,7 +721,7 @@ hfc2bds0_interrupt(struct IsdnCardState *cs, u_char val)
val &= cs->hw.hfcD.int_m1;
if (val & 0x40) { /* TE state machine irq */
exval = cs->readisac(cs, HFCD_STATES) & 0xf;
exval = hfcs_read_reg(cs, HFCD_STATES) & 0xf;
if (cs->debug & L1_DEB_ISAC)
debugl1(cs, "ph_state chg %d->%d", cs->dc.hfcd.ph_state,
exval);
......@@ -804,24 +798,24 @@ HFCD_l1hw(struct PStack *st, int pr, void *arg)
xmit_pull_req_d(st);
break;
case (HW_RESET | REQUEST):
cs->writeisac(cs, HFCD_STATES, HFCD_LOAD_STATE | 3); /* HFC ST 3 */
hfcs_write_reg(cs, HFCD_STATES, HFCD_LOAD_STATE | 3); /* HFC ST 3 */
udelay(6);
cs->writeisac(cs, HFCD_STATES, 3); /* HFC ST 2 */
hfcs_write_reg(cs, HFCD_STATES, 3); /* HFC ST 2 */
cs->hw.hfcD.mst_m |= HFCD_MASTER;
cs->writeisac(cs, HFCD_MST_MODE, cs->hw.hfcD.mst_m);
cs->writeisac(cs, HFCD_STATES, HFCD_ACTIVATE | HFCD_DO_ACTION);
hfcs_write_reg(cs, HFCD_MST_MODE, cs->hw.hfcD.mst_m);
hfcs_write_reg(cs, HFCD_STATES, HFCD_ACTIVATE | HFCD_DO_ACTION);
l1_msg(cs, HW_POWERUP | CONFIRM, NULL);
break;
case (HW_ENABLE | REQUEST):
cs->writeisac(cs, HFCD_STATES, HFCD_ACTIVATE | HFCD_DO_ACTION);
hfcs_write_reg(cs, HFCD_STATES, HFCD_ACTIVATE | HFCD_DO_ACTION);
break;
case (HW_DEACTIVATE | REQUEST):
cs->hw.hfcD.mst_m &= ~HFCD_MASTER;
cs->writeisac(cs, HFCD_MST_MODE, cs->hw.hfcD.mst_m);
hfcs_write_reg(cs, HFCD_MST_MODE, cs->hw.hfcD.mst_m);
break;
case (HW_INFO3 | REQUEST):
cs->hw.hfcD.mst_m |= HFCD_MASTER;
cs->writeisac(cs, HFCD_MST_MODE, cs->hw.hfcD.mst_m);
hfcs_write_reg(cs, HFCD_MST_MODE, cs->hw.hfcD.mst_m);
break;
default:
if (cs->debug & L1_DEB_WARN)
......@@ -870,7 +864,6 @@ init2bds0(struct IsdnCardState *cs)
cs->bcs[0].hw.hfc.send = init_send_hfcd(32);
if (!cs->bcs[1].hw.hfc.send)
cs->bcs[1].hw.hfc.send = init_send_hfcd(32);
cs->BC_Send_Data = hfc_fill_fifo;
cs->DC_Send_Data = hfc_fill_dfifo;
cs->bcs[0].BC_SetStack = setstack_2b;
cs->bcs[1].BC_SetStack = setstack_2b;
......
drivers/isdn/hisax/hfc_2bds0.h
View file @ 1d0619c5
......@@ -124,5 +124,5 @@
extern void main_irq_2bds0(struct BCState *bcs);
extern void init2bds0(struct IsdnCardState *cs);
extern void release2bds0(struct IsdnCardState *cs);
extern void hfc2bds0_interrupt(struct IsdnCardState *cs, u_char val);
extern void hfc2bds0_interrupt(struct IsdnCardState *cs, u8 val);
extern void set_cs_func(struct IsdnCardState *cs);
drivers/isdn/hisax/hfc_2bs0.c
View file @ 1d0619c5
This diff is collapsed.
drivers/isdn/hisax/hfc_pci.c
View file @ 1d0619c5
......@@ -193,7 +193,7 @@ Sel_BCS(struct IsdnCardState *cs, int channel)
/* clear the desired B-channel rx fifo */
/***************************************/
static void hfcpci_clear_fifo_rx(struct IsdnCardState *cs, int fifo)
{ u_char fifo_state;
{ u8 fifo_state;
bzfifo_type *bzr;
if (fifo) {
......@@ -220,7 +220,7 @@ static void hfcpci_clear_fifo_rx(struct IsdnCardState *cs, int fifo)
/* clear the desired B-channel tx fifo */
/***************************************/
static void hfcpci_clear_fifo_tx(struct IsdnCardState *cs, int fifo)
{ u_char fifo_state;
{ u8 fifo_state;
bzfifo_type *bzt;
if (fifo) {
......@@ -247,9 +247,9 @@ static void hfcpci_clear_fifo_tx(struct IsdnCardState *cs, int fifo)
/*********************************************/
static struct sk_buff
*
hfcpci_empty_fifo(struct BCState *bcs, bzfifo_type * bz, u_char * bdata, int count)
hfcpci_empty_fifo(struct BCState *bcs, bzfifo_type * bz, u8 * bdata, int count)
{
u_char *ptr, *ptr1, new_f2;
u8 *ptr, *ptr1, new_f2;
struct sk_buff *skb;
struct IsdnCardState *cs = bcs->cs;
int total, maxlen, new_z2;
......@@ -311,7 +311,7 @@ receive_dmsg(struct IsdnCardState *cs)
int maxlen;
int rcnt, total;
int count = 5;
u_char *ptr, *ptr1;
u8 *ptr, *ptr1;
dfifo_type *df;
z_type *zp;
......@@ -369,12 +369,12 @@ receive_dmsg(struct IsdnCardState *cs)
/* check for transparent receive data and read max one threshold size if avail */
/*******************************************************************************/
int
hfcpci_empty_fifo_trans(struct BCState *bcs, bzfifo_type * bz, u_char * bdata)
hfcpci_empty_fifo_trans(struct BCState *bcs, bzfifo_type * bz, u8 * bdata)
{
unsigned short *z1r, *z2r;
int new_z2, fcnt, maxlen;
struct sk_buff *skb;
u_char *ptr, *ptr1;
u8 *ptr, *ptr1;
z1r = &bz->za[MAX_B_FRAMES].z1; /* pointer to z reg */
z2r = z1r + 1;
......@@ -428,7 +428,7 @@ main_rec_hfcpci(struct BCState *bcs)
int receive, count = 5;
struct sk_buff *skb;
bzfifo_type *bz;
u_char *bdata;
u8 *bdata;
z_type *zp;
if ((bcs->channel) && (!cs->hw.hfcpci.bswapped)) {
......@@ -490,7 +490,7 @@ hfcpci_fill_dfifo(struct IsdnCardState *cs)
int fcnt;
int count, new_z1, maxlen;
dfifo_type *df;
u_char *src, *dst, new_f1;
u8 *src, *dst, new_f1;
if (!cs->tx_skb)
return;
......@@ -562,8 +562,8 @@ hfcpci_fill_fifo(struct BCState *bcs)
int maxlen, fcnt;
int count, new_z1;
bzfifo_type *bz;
u_char *bdata;
u_char new_f1, *src, *dst;
u8 *bdata;
u8 new_f1, *src, *dst;
unsigned short *z1t, *z2t;
if (!bcs->tx_skb)
......@@ -780,11 +780,11 @@ receive_emsg(struct IsdnCardState *cs)
int rcnt;
int receive, count = 5;
bzfifo_type *bz;
u_char *bdata;
u8 *bdata;
z_type *zp;
u_char *ptr, *ptr1, new_f2;
u8 *ptr, *ptr1, new_f2;
int total, maxlen, new_z2;
u_char e_buffer[256];
u8 e_buffer[256];
bz = &((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.rxbz_b2;
bdata = ((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.rxdat_b2;
......@@ -873,10 +873,10 @@ static void
hfcpci_interrupt(int intno, void *dev_id, struct pt_regs *regs)
{
struct IsdnCardState *cs = dev_id;
u_char exval;
u8 exval;
struct BCState *bcs;
int count = 15;
u_char val, stat;
u8 val, stat;
if (!cs) {
printk(KERN_WARNING "HFC-PCI: Spurious interrupt!\n");
......@@ -1335,6 +1335,9 @@ hfcpci_bh(void *data)
DChannel_proc_xmt(cs);
}
static struct bc_l1_ops hfcpci_l1_ops = {
.fill_fifo = hfcpci_fill_fifo,
};
/********************************/
/* called for card init message */
......@@ -1347,7 +1350,7 @@ inithfcpci(struct IsdnCardState *cs)
cs->dbusytimer.data = (long) cs;
init_timer(&cs->dbusytimer);
INIT_WORK(&cs->work, hfcpci_bh, cs);
cs->BC_Send_Data = hfcpci_fill_fifo;
cs->bc_l1_ops = &hfcpci_l1_ops;
cs->DC_Send_Data = hfcpci_fill_dfifo;
cs->bcs[0].BC_SetStack = setstack_2b;
cs->bcs[1].BC_SetStack = setstack_2b;
......@@ -1473,12 +1476,6 @@ setup_hfcpci(struct IsdnCard *card)
return (0); /* no valid card type */
cs->readisac = NULL;
cs->writeisac = NULL;
cs->readisacfifo = NULL;
cs->writeisacfifo = NULL;
cs->BC_Read_Reg = NULL;
cs->BC_Write_Reg = NULL;
cs->irq_func = &hfcpci_interrupt;
cs->irq_flags |= SA_SHIRQ;
......
drivers/isdn/hisax/hfc_pci.h
View file @ 1d0619c5
......@@ -188,18 +188,18 @@ typedef struct {
} __attribute__((packed)) z_type;
typedef struct {
u_char data[D_FIFO_SIZE]; /* FIFO data space */
u_char fill1[0x20A0-D_FIFO_SIZE]; /* reserved, do not use */
u_char f1,f2; /* f pointers */
u_char fill2[0x20C0-0x20A2]; /* reserved, do not use */
u8 data[D_FIFO_SIZE]; /* FIFO data space */
u8 fill1[0x20A0-D_FIFO_SIZE]; /* reserved, do not use */
u8 f1,f2; /* f pointers */
u8 fill2[0x20C0-0x20A2]; /* reserved, do not use */
z_type za[MAX_D_FRAMES+1]; /* mask index with D_FREG_MASK for access */
u_char fill3[0x4000-0x2100]; /* align 16K */
u8 fill3[0x4000-0x2100]; /* align 16K */
} __attribute__((packed)) dfifo_type;
typedef struct {
z_type za[MAX_B_FRAMES+1]; /* only range 0x0..0x1F allowed */
u_char f1,f2; /* f pointers */
u_char fill[0x2100-0x2082]; /* alignment */
u8 f1,f2; /* f pointers */
u8 fill[0x2100-0x2082]; /* alignment */
} __attribute__((packed)) bzfifo_type;
......@@ -209,29 +209,29 @@ typedef union {
dfifo_type d_rx; /* D-receive channel */
} __attribute__((packed)) d_chan;
struct {
u_char fill1[0x200];
u_char txdat_b1[B_FIFO_SIZE];
u8 fill1[0x200];
u8 txdat_b1[B_FIFO_SIZE];
bzfifo_type txbz_b1;
bzfifo_type txbz_b2;
u_char txdat_b2[B_FIFO_SIZE];
u8 txdat_b2[B_FIFO_SIZE];
u_char fill2[D_FIFO_SIZE];
u8 fill2[D_FIFO_SIZE];
u_char rxdat_b1[B_FIFO_SIZE];
u8 rxdat_b1[B_FIFO_SIZE];
bzfifo_type rxbz_b1;
bzfifo_type rxbz_b2;
u_char rxdat_b2[B_FIFO_SIZE];
u8 rxdat_b2[B_FIFO_SIZE];
} __attribute__((packed)) b_chans;
u_char fill[32768];
u8 fill[32768];
} __attribute__((packed)) fifo_area;
//#define Write_hfc(a,b,c) (*(((u_char *)a->hw.hfcpci.pci_io)+b) = c)
//#define Read_hfc(a,b) (*(((u_char *)a->hw.hfcpci.pci_io)+b))
#define Write_hfc(a,b,c) writeb(c, ((u_char *)a->hw.hfcpci.pci_io)+b)
#define Read_hfc(a,b) readb(((u_char *)a->hw.hfcpci.pci_io)+b)
//#define Write_hfc(a,b,c) (*(((u8 *)a->hw.hfcpci.pci_io)+b) = c)
//#define Read_hfc(a,b) (*(((u8 *)a->hw.hfcpci.pci_io)+b))
#define Write_hfc(a,b,c) writeb(c, ((u8 *)a->hw.hfcpci.pci_io)+b)
#define Read_hfc(a,b) readb(((u8 *)a->hw.hfcpci.pci_io)+b)
extern void main_irq_hcpci(struct BCState *bcs);
extern void inithfcpci(struct IsdnCardState *cs);
......
drivers/isdn/hisax/hfc_sx.c
View file @ 1d0619c5
......@@ -43,11 +43,11 @@ static const char *hfcsx_revision = "$Revision: 1.9.6.3 $";
#undef CCD_DEMO_BOARD
#ifdef CCD_DEMO_BOARD
static u_char ccd_sp_irqtab[16] = {
static u8 ccd_sp_irqtab[16] = {
0,0,0,0,0,2,1,0,0,0,3,4,5,0,0,6
};
#else /* Teles 16.3c */
static u_char ccd_sp_irqtab[16] = {
static u8 ccd_sp_irqtab[16] = {
0,0,0,7,0,1,0,0,0,2,3,4,5,0,0,6
};
#endif
......@@ -60,17 +60,17 @@ static u_char ccd_sp_irqtab[16] = {
/* In/Out access to registers */
/******************************/
static inline void
Write_hfc(struct IsdnCardState *cs, u_char regnum, u_char val)
Write_hfc(struct IsdnCardState *cs, u8 regnum, u8 val)
{
byteout(cs->hw.hfcsx.base+1, regnum);
byteout(cs->hw.hfcsx.base, val);
}
static inline u_char
Read_hfc(struct IsdnCardState *cs, u_char regnum)
static inline u8
Read_hfc(struct IsdnCardState *cs, u8 regnum)
{
u_char ret;
u8 ret;
byteout(cs->hw.hfcsx.base+1, regnum);
ret = bytein(cs->hw.hfcsx.base);
......@@ -82,7 +82,7 @@ Read_hfc(struct IsdnCardState *cs, u_char regnum)
/* select a fifo and remember which one for reuse */
/**************************************************/
static void
fifo_select(struct IsdnCardState *cs, u_char fifo)
fifo_select(struct IsdnCardState *cs, u8 fifo)
{
if (fifo == cs->hw.hfcsx.last_fifo)
return; /* still valid */
......@@ -100,7 +100,7 @@ fifo_select(struct IsdnCardState *cs, u_char fifo)
/* If its a send fifo init needed markers */
/******************************************/
static void
reset_fifo(struct IsdnCardState *cs, u_char fifo)
reset_fifo(struct IsdnCardState *cs, u8 fifo)
{
fifo_select(cs, fifo); /* first select the fifo */
byteout(cs->hw.hfcsx.base+1, HFCSX_CIRM);
......@@ -116,10 +116,10 @@ reset_fifo(struct IsdnCardState *cs, u_char fifo)
/* the skb is not released in any way. */
/*************************************************************/
static int
write_fifo(struct IsdnCardState *cs, struct sk_buff *skb, u_char fifo, int trans_max)
write_fifo(struct IsdnCardState *cs, struct sk_buff *skb, u8 fifo, int trans_max)
{ unsigned short *msp;
int fifo_size, count, z1, z2;
u_char f_msk, f1, f2, *src;
u8 f_msk, f1, f2, *src;
if (skb->len <= 0) return(0);
if (fifo & 1) return(0); /* no write fifo */
......@@ -205,9 +205,9 @@ write_fifo(struct IsdnCardState *cs, struct sk_buff *skb, u_char fifo, int trans
/* the skb is not released in any way. */
/***************************************************************/
static struct sk_buff *
read_fifo(struct IsdnCardState *cs, u_char fifo, int trans_max)
read_fifo(struct IsdnCardState *cs, u8 fifo, int trans_max)
{ int fifo_size, count, z1, z2;
u_char f_msk, f1, f2, *dst;
u8 f_msk, f1, f2, *dst;
struct sk_buff *skb;
if (!(fifo & 1)) return(NULL); /* no read fifo */
......@@ -629,7 +629,7 @@ static void
receive_emsg(struct IsdnCardState *cs)
{
int count = 5;
u_char *ptr;
u8 *ptr;
struct sk_buff *skb;
do {
......@@ -664,10 +664,10 @@ static void
hfcsx_interrupt(int intno, void *dev_id, struct pt_regs *regs)
{
struct IsdnCardState *cs = dev_id;
u_char exval;
u8 exval;
struct BCState *bcs;
int count = 15;
u_char val, stat;
u8 val, stat;
if (!cs) {
printk(KERN_WARNING "HFC-SX: Spurious interrupt!\n");
......@@ -1112,6 +1112,9 @@ hfcsx_bh(void *data)
DChannel_proc_xmt(cs);
}
static struct bc_l1_ops hfcsx_l1_ops = {
.fill_fifo = hfcsx_fill_fifo,
};
/********************************/
/* called for card init message */
......@@ -1124,7 +1127,7 @@ inithfcsx(struct IsdnCardState *cs)
cs->dbusytimer.data = (long) cs;
init_timer(&cs->dbusytimer);
INIT_WORK(&cs->work, hfcsx_bh, cs);
cs->BC_Send_Data = hfcsx_fill_fifo;
cs->bc_l1_ops = &hfcsx_l1_ops;
cs->DC_Send_Data = hfcsx_fill_dfifo;
cs->bcs[0].BC_SetStack = setstack_2b;
cs->bcs[1].BC_SetStack = setstack_2b;
......@@ -1285,12 +1288,6 @@ setup_hfcsx(struct IsdnCard *card)
} else
return (0); /* no valid card type */
cs->readisac = NULL;
cs->writeisac = NULL;
cs->readisacfifo = NULL;
cs->writeisacfifo = NULL;
cs->BC_Read_Reg = NULL;
cs->BC_Write_Reg = NULL;
cs->irq_func = &hfcsx_interrupt;
cs->hw.hfcsx.timer.function = (void *) hfcsx_Timer;
......
drivers/isdn/hisax/hfcscard.c
View file @ 1d0619c5
......@@ -20,19 +20,31 @@ extern const char *CardType[];
static const char *hfcs_revision = "$Revision: 1.8.6.2 $";
static inline u8
hfcs_read_reg(struct IsdnCardState *cs, int data, u8 reg)
{
return cs->bc_hw_ops->read_reg(cs, data, reg);
}
static inline void
hfcs_write_reg(struct IsdnCardState *cs, int data, u8 reg, u8 val)
{
cs->bc_hw_ops->write_reg(cs, data, reg, val);
}
static void
hfcs_interrupt(int intno, void *dev_id, struct pt_regs *regs)
{
struct IsdnCardState *cs = dev_id;
u_char val, stat;
u8 val, stat;
if (!cs) {
printk(KERN_WARNING "HFCS: Spurious interrupt!\n");
return;
}
if ((HFCD_ANYINT | HFCD_BUSY_NBUSY) &
(stat = cs->BC_Read_Reg(cs, HFCD_DATA, HFCD_STAT))) {
val = cs->BC_Read_Reg(cs, HFCD_DATA, HFCD_INT_S1);
(stat = hfcs_read_reg(cs, HFCD_DATA, HFCD_STAT))) {
val = hfcs_read_reg(cs, HFCD_DATA, HFCD_INT_S1);
if (cs->debug & L1_DEB_ISAC)
debugl1(cs, "HFCS: stat(%02x) s1(%02x)", stat, val);
hfc2bds0_interrupt(cs, val);
......@@ -68,37 +80,37 @@ reset_hfcs(struct IsdnCardState *cs)
cs->hw.hfcD.cirm = HFCD_RESET;
if (cs->typ == ISDN_CTYPE_TELES3C)
cs->hw.hfcD.cirm |= HFCD_MEM8K;
cs->BC_Write_Reg(cs, HFCD_DATA, HFCD_CIRM, cs->hw.hfcD.cirm); /* Reset On */
hfcs_write_reg(cs, HFCD_DATA, HFCD_CIRM, cs->hw.hfcD.cirm); /* Reset On */
set_current_state(TASK_UNINTERRUPTIBLE);
schedule_timeout((30*HZ)/1000);
cs->hw.hfcD.cirm = 0;
if (cs->typ == ISDN_CTYPE_TELES3C)
cs->hw.hfcD.cirm |= HFCD_MEM8K;
cs->BC_Write_Reg(cs, HFCD_DATA, HFCD_CIRM, cs->hw.hfcD.cirm); /* Reset Off */
hfcs_write_reg(cs, HFCD_DATA, HFCD_CIRM, cs->hw.hfcD.cirm); /* Reset Off */
set_current_state(TASK_UNINTERRUPTIBLE);
schedule_timeout((10*HZ)/1000);
if (cs->typ == ISDN_CTYPE_TELES3C)
cs->hw.hfcD.cirm |= HFCD_INTB;
else if (cs->typ == ISDN_CTYPE_ACERP10)
cs->hw.hfcD.cirm |= HFCD_INTA;
cs->BC_Write_Reg(cs, HFCD_DATA, HFCD_CIRM, cs->hw.hfcD.cirm);
cs->BC_Write_Reg(cs, HFCD_DATA, HFCD_CLKDEL, 0x0e);
cs->BC_Write_Reg(cs, HFCD_DATA, HFCD_TEST, HFCD_AUTO_AWAKE); /* S/T Auto awake */
hfcs_write_reg(cs, HFCD_DATA, HFCD_CIRM, cs->hw.hfcD.cirm);
hfcs_write_reg(cs, HFCD_DATA, HFCD_CLKDEL, 0x0e);
hfcs_write_reg(cs, HFCD_DATA, HFCD_TEST, HFCD_AUTO_AWAKE); /* S/T Auto awake */
cs->hw.hfcD.ctmt = HFCD_TIM25 | HFCD_AUTO_TIMER;
cs->BC_Write_Reg(cs, HFCD_DATA, HFCD_CTMT, cs->hw.hfcD.ctmt);
hfcs_write_reg(cs, HFCD_DATA, HFCD_CTMT, cs->hw.hfcD.ctmt);
cs->hw.hfcD.int_m2 = HFCD_IRQ_ENABLE;
cs->hw.hfcD.int_m1 = HFCD_INTS_B1TRANS | HFCD_INTS_B2TRANS |
HFCD_INTS_DTRANS | HFCD_INTS_B1REC | HFCD_INTS_B2REC |
HFCD_INTS_DREC | HFCD_INTS_L1STATE;
cs->BC_Write_Reg(cs, HFCD_DATA, HFCD_INT_M1, cs->hw.hfcD.int_m1);
cs->BC_Write_Reg(cs, HFCD_DATA, HFCD_INT_M2, cs->hw.hfcD.int_m2);
cs->BC_Write_Reg(cs, HFCD_DATA, HFCD_STATES, HFCD_LOAD_STATE | 2); /* HFC ST 2 */
hfcs_write_reg(cs, HFCD_DATA, HFCD_INT_M1, cs->hw.hfcD.int_m1);
hfcs_write_reg(cs, HFCD_DATA, HFCD_INT_M2, cs->hw.hfcD.int_m2);
hfcs_write_reg(cs, HFCD_DATA, HFCD_STATES, HFCD_LOAD_STATE | 2); /* HFC ST 2 */
udelay(10);
cs->BC_Write_Reg(cs, HFCD_DATA, HFCD_STATES, 2); /* HFC ST 2 */
hfcs_write_reg(cs, HFCD_DATA, HFCD_STATES, 2); /* HFC ST 2 */
cs->hw.hfcD.mst_m = HFCD_MASTER;
cs->BC_Write_Reg(cs, HFCD_DATA, HFCD_MST_MODE, cs->hw.hfcD.mst_m); /* HFC Master */
hfcs_write_reg(cs, HFCD_DATA, HFCD_MST_MODE, cs->hw.hfcD.mst_m); /* HFC Master */
cs->hw.hfcD.sctrl = 0;
cs->BC_Write_Reg(cs, HFCD_DATA, HFCD_SCTRL, cs->hw.hfcD.sctrl);
hfcs_write_reg(cs, HFCD_DATA, HFCD_SCTRL, cs->hw.hfcD.sctrl);
}
static int
......@@ -120,8 +132,8 @@ hfcs_card_msg(struct IsdnCardState *cs, int mt, void *arg)
set_current_state(TASK_UNINTERRUPTIBLE);
schedule_timeout((80*HZ)/1000);
cs->hw.hfcD.ctmt |= HFCD_TIM800;
cs->BC_Write_Reg(cs, HFCD_DATA, HFCD_CTMT, cs->hw.hfcD.ctmt);
cs->BC_Write_Reg(cs, HFCD_DATA, HFCD_MST_MODE, cs->hw.hfcD.mst_m);
hfcs_write_reg(cs, HFCD_DATA, HFCD_CTMT, cs->hw.hfcD.ctmt);
hfcs_write_reg(cs, HFCD_DATA, HFCD_MST_MODE, cs->hw.hfcD.mst_m);
return(0);
case CARD_TEST:
return(0);
......
drivers/isdn/hisax/hisax.h
View file @ 1d0619c5
......@@ -292,14 +292,14 @@ struct Management {
#define NO_CAUSE 254
struct Param {
u_char cause;
u_char loc;
u_char diag[6];
u8 cause;
u8 loc;
u8 diag[6];
int bchannel;
int chargeinfo;
int spv; /* SPV Flag */
setup_parm setup; /* from isdnif.h numbers and Serviceindicator */
u_char moderate; /* transfer mode and rate (bearer octet 4) */
u8 moderate; /* transfer mode and rate (bearer octet 4) */
};
......@@ -314,7 +314,7 @@ struct PStack {
/* protocol specific data fields */
union
{ u_char uuuu; /* only as dummy */
{ u8 uuuu; /* only as dummy */
#ifdef CONFIG_HISAX_EURO
dss1_stk_priv dss1; /* private dss1 data */
#endif /* CONFIG_HISAX_EURO */
......@@ -338,7 +338,7 @@ struct l3_process {
/* protocol specific data fields */
union
{ u_char uuuu; /* only when euro not defined, avoiding empty union */
{ u8 uuuu; /* only when euro not defined, avoiding empty union */
#ifdef CONFIG_HISAX_EURO
dss1_proc_priv dss1; /* private dss1 data */
#endif /* CONFIG_HISAX_EURO */
......@@ -351,53 +351,53 @@ struct l3_process {
struct hscx_hw {
int hscx;
int rcvidx;
u_char *rcvbuf; /* B-Channel receive Buffer */
u_char tsaxr0;
u_char tsaxr1;
u8 *rcvbuf; /* B-Channel receive Buffer */
u8 tsaxr0;
u8 tsaxr1;
};
struct w6692B_hw {
int bchan;
int rcvidx;
u_char *rcvbuf; /* B-Channel receive Buffer */
u8 *rcvbuf; /* B-Channel receive Buffer */
};
struct isar_reg {
unsigned long Flags;
volatile u_char bstat;
volatile u_char iis;
volatile u_char cmsb;
volatile u_char clsb;
volatile u_char par[8];
volatile u8 bstat;
volatile u8 iis;
volatile u8 cmsb;
volatile u8 clsb;
volatile u8 par[8];
};
struct isar_hw {
int dpath;
int rcvidx;
int mml;
u_char state;
u_char cmd;
u_char mod;
u_char newcmd;
u_char newmod;
u8 state;
u8 cmd;
u8 mod;
u8 newcmd;
u8 newmod;
char try_mod;
struct timer_list ftimer;
u_char *rcvbuf; /* B-Channel receive Buffer */
u_char conmsg[16];
u8 *rcvbuf; /* B-Channel receive Buffer */
u8 conmsg[16];
struct isar_reg *reg;
};
struct hdlc_stat_reg {
#ifdef __BIG_ENDIAN
u_char fill __attribute__((packed));
u_char mode __attribute__((packed));
u_char xml __attribute__((packed));
u_char cmd __attribute__((packed));
u8 fill __attribute__((packed));
u8 mode __attribute__((packed));
u8 xml __attribute__((packed));
u8 cmd __attribute__((packed));
#else
u_char cmd __attribute__((packed));
u_char xml __attribute__((packed));
u_char mode __attribute__((packed));
u_char fill __attribute__((packed));
u8 cmd __attribute__((packed));
u8 xml __attribute__((packed));
u8 mode __attribute__((packed));
u8 fill __attribute__((packed));
#endif
};
......@@ -408,7 +408,7 @@ struct hdlc_hw {
} ctrl;
u_int stat;
int rcvidx;
u_char *rcvbuf; /* B-Channel receive Buffer */
u8 *rcvbuf; /* B-Channel receive Buffer */
};
struct hfcB_hw {
......@@ -425,24 +425,24 @@ struct tiger_hw {
u_int *rec;
dma_addr_t rec_dma;
int free;
u_char *rcvbuf;
u_char *sendbuf;
u_char *sp;
u8 *rcvbuf;
u8 *sendbuf;
u8 *sp;
int sendcnt;
u_int s_tot;
u_int r_bitcnt;
u_int r_tot;
u_int r_err;
u_int r_fcs;
u_char r_state;
u_char r_one;
u_char r_val;
u_char s_state;
u8 r_state;
u8 r_one;
u8 r_val;
u8 s_state;
};
struct amd7930_hw {
u_char *tx_buff;
u_char *rv_buff;
u8 *tx_buff;
u8 *rv_buff;
int rv_buff_in;
int rv_buff_out;
struct sk_buff *rv_skb;
......@@ -487,8 +487,8 @@ struct BCState {
struct sk_buff_head squeue; /* B-Channel send queue */
struct sk_buff_head cmpl_queue; /* B-Channel send complete queue */
struct PStack *st;
u_char *blog;
u_char *conmsg;
u8 *blog;
u8 *conmsg;
struct timer_list transbusy;
struct work_struct work;
unsigned long event;
......@@ -547,17 +547,17 @@ struct elsa_hw {
struct timer_list tl;
unsigned int MFlag;
struct BCState *bcs;
u_char *transbuf;
u_char *rcvbuf;
u8 *transbuf;
u8 *rcvbuf;
unsigned int transp;
unsigned int rcvp;
unsigned int transcnt;
unsigned int rcvcnt;
u_char IER;
u_char FCR;
u_char LCR;
u_char MCR;
u_char ctrl_reg;
u8 IER;
u8 FCR;
u8 LCR;
u8 MCR;
u8 ctrl_reg;
};
struct teles3_hw {
......@@ -601,7 +601,7 @@ struct diva_hw {
unsigned int hscx;
unsigned int status;
struct timer_list tl;
u_char ctrl_reg;
u8 ctrl_reg;
};
struct asus_hw {
......@@ -620,7 +620,7 @@ struct hfc_hw {
unsigned char cirm;
unsigned char ctmt;
unsigned char cip;
u_char isac_spcr;
u8 isac_spcr;
struct timer_list timer;
};
......@@ -795,25 +795,25 @@ struct te_hw {
struct arcofi_msg {
struct arcofi_msg *next;
u_char receive;
u_char len;
u_char msg[10];
u8 receive;
u8 len;
u8 msg[10];
};
struct isac_chip {
int ph_state;
u_char *mon_tx;
u_char *mon_rx;
u8 *mon_tx;
u8 *mon_rx;
int mon_txp;
int mon_txc;
int mon_rxp;
struct arcofi_msg *arcofi_list;
struct timer_list arcofitimer;
wait_queue_head_t arcofi_wait;
u_char arcofi_bc;
u_char arcofi_state;
u_char mocr;
u_char adf2;
u8 arcofi_bc;
u8 arcofi_state;
u8 mocr;
u8 adf2;
};
struct hfcd_chip {
......@@ -833,30 +833,55 @@ struct w6692_chip {
};
struct amd7930_chip {
u_char lmr1;
u_char ph_state;
u_char old_state;
u_char flg_t3;
u8 lmr1;
u8 ph_state;
u8 old_state;
u8 flg_t3;
unsigned int tx_xmtlen;
struct timer_list timer3;
void (*ph_command) (struct IsdnCardState *, u_char, char *);
void (*setIrqMask) (struct IsdnCardState *, u_char);
void (*ph_command) (struct IsdnCardState *, u8, char *);
void (*setIrqMask) (struct IsdnCardState *, u8);
};
struct icc_chip {
int ph_state;
u_char *mon_tx;
u_char *mon_rx;
u8 *mon_tx;
u8 *mon_rx;
int mon_txp;
int mon_txc;
int mon_rxp;
struct arcofi_msg *arcofi_list;
struct timer_list arcofitimer;
wait_queue_head_t arcofi_wait;
u_char arcofi_bc;
u_char arcofi_state;
u_char mocr;
u_char adf2;
u8 arcofi_bc;
u8 arcofi_state;
u8 mocr;
u8 adf2;
};
struct IsdnCardState;
/* Card specific drivers provide methods to access the
* chips to the chip drivers */
struct bc_hw_ops {
u8 (*read_reg) (struct IsdnCardState *, int, u8);
void (*write_reg) (struct IsdnCardState *, int, u8, u8);
void (*read_fifo) (struct IsdnCardState *, int, u8 *, int);
void (*write_fifo) (struct IsdnCardState *, int, u8 *, int);
};
struct dc_hw_ops {
u8 (*read_reg) (struct IsdnCardState *, u8);
void (*write_reg) (struct IsdnCardState *, u8, u8);
void (*read_fifo) (struct IsdnCardState *, u8 *, int);
void (*write_fifo) (struct IsdnCardState *, u8 *, int);
};
/* Methods provided to shared FIFO handling */
struct bc_l1_ops {
void (*fill_fifo) (struct BCState *);
};
#define HW_IOM1 0
......@@ -911,17 +936,13 @@ struct IsdnCardState {
} hw;
int myid;
isdn_if iif;
u_char *status_buf;
u_char *status_read;
u_char *status_write;
u_char *status_end;
u_char (*readisac) (struct IsdnCardState *, u_char);
void (*writeisac) (struct IsdnCardState *, u_char, u_char);
void (*readisacfifo) (struct IsdnCardState *, u_char *, int);
void (*writeisacfifo) (struct IsdnCardState *, u_char *, int);
u_char (*BC_Read_Reg) (struct IsdnCardState *, int, u_char);
void (*BC_Write_Reg) (struct IsdnCardState *, int, u_char, u_char);
void (*BC_Send_Data) (struct BCState *);
u8 *status_buf;
u8 *status_read;
u8 *status_write;
u8 *status_end;
struct dc_hw_ops *dc_hw_ops;
struct bc_hw_ops *bc_hw_ops;
struct bc_l1_ops *bc_l1_ops;
int (*cardmsg) (struct IsdnCardState *, int, void *);
void (*setstack_d) (struct PStack *, struct IsdnCardState *);
void (*DC_Send_Data) (struct IsdnCardState *);
......@@ -944,7 +965,7 @@ struct IsdnCardState {
struct amd7930_chip amd7930;
struct icc_chip icc;
} dc;
u_char *rcvbuf;
u8 *rcvbuf;
int rcvidx;
struct sk_buff *tx_skb;
int tx_cnt;
......@@ -1317,8 +1338,8 @@ void setstack_l3dc(struct PStack *st, struct Channel *chanp);
void setstack_l3bc(struct PStack *st, struct Channel *chanp);
void releasestack_isdnl3(struct PStack *st);
u_char *findie(u_char * p, int size, u_char ie, int wanted_set);
int getcallref(u_char * p);
u8 *findie(u8 * p, int size, u8 ie, int wanted_set);
int getcallref(u8 * p);
int newcallref(void);
int FsmNew(struct Fsm *fsm, struct FsmNode *fnlist, int fncount);
......@@ -1338,10 +1359,10 @@ int HiSax_writebuf_skb(int id, int chan, int ack, struct sk_buff *skb);
void HiSax_putstatus(struct IsdnCardState *cs, char *head, char *fmt, ...);
void VHiSax_putstatus(struct IsdnCardState *cs, char *head, char *fmt, va_list args);
void HiSax_reportcard(int cardnr, int sel);
int QuickHex(char *txt, u_char * p, int cnt);
void LogFrame(struct IsdnCardState *cs, u_char * p, int size);
int QuickHex(char *txt, u8 * p, int cnt);
void LogFrame(struct IsdnCardState *cs, u8 * p, int size);
void dlogframe(struct IsdnCardState *cs, struct sk_buff *skb, int dir);
void iecpy(u_char * dest, u_char * iestart, int ieoffset);
void iecpy(u8 * dest, u8 * iestart, int ieoffset);
#ifdef ISDN_CHIP_ISAC
void setstack_isac(struct PStack *st, struct IsdnCardState *cs);
#endif /* ISDN_CHIP_ISAC */
......
drivers/isdn/hisax/hisax_debug.h
View file @ 1d0619c5
......@@ -39,7 +39,7 @@ printk(KERN_DEBUG "%s: " format "\n" , __FUNCTION__ , ## arg); \
static void __attribute__((unused))
dump_packet(const char *name,const u_char *data,int pkt_len)
dump_packet(const char *name,const u8 *data,int pkt_len)
{
#define DUMP_HDR_SIZE 20
#define DUMP_TLR_SIZE 8
......
drivers/isdn/hisax/hisax_fcclassic.c
View file @ 1d0619c5
......@@ -86,8 +86,8 @@ fcclassic_write_isac_fifo(struct isac *isac, unsigned char * data, int size)
outsb(adapter->isac_fifo, data, size);
}
static u_char
fcclassic_read_hscx(struct hscx *hscx, u_char offset)
static u8
fcclassic_read_hscx(struct hscx *hscx, u8 offset)
{
struct fritz_adapter *adapter = hscx->priv;
......@@ -95,7 +95,7 @@ fcclassic_read_hscx(struct hscx *hscx, u_char offset)
}
static void
fcclassic_write_hscx(struct hscx *hscx, u_char offset, u_char value)
fcclassic_write_hscx(struct hscx *hscx, u8 offset, u8 value)
{
struct fritz_adapter *adapter = hscx->priv;
......
drivers/isdn/hisax/hisax_fcpcipnp.c
View file @ 1d0619c5
......@@ -890,6 +890,24 @@ static int __devinit fcpci_probe(struct pci_dev *pdev,
return retval;
}
static void __devexit fcpci_remove(struct pci_dev *pdev)
{
struct fritz_adapter *adapter = pci_get_drvdata(pdev);
fcpcipnp_release(adapter);
pci_disable_device(pdev);
delete_adapter(adapter);
}
static struct pci_driver fcpci_driver = {
.name = "fcpci",
.probe = fcpci_probe,
.remove = __devexit_p(fcpci_remove),
.id_table = fcpci_ids,
};
#ifdef __ISAPNP__
static int __devinit fcpnp_probe(struct pci_dev *pdev,
const struct isapnp_device_id *ent)
{
......@@ -924,15 +942,6 @@ static int __devinit fcpnp_probe(struct pci_dev *pdev,
return retval;
}
static void __devexit fcpci_remove(struct pci_dev *pdev)
{
struct fritz_adapter *adapter = pci_get_drvdata(pdev);
fcpcipnp_release(adapter);
pci_disable_device(pdev);
delete_adapter(adapter);
}
static void __devexit fcpnp_remove(struct pci_dev *pdev)
{
struct fritz_adapter *adapter = pci_get_drvdata(pdev);
......@@ -942,13 +951,6 @@ static void __devexit fcpnp_remove(struct pci_dev *pdev)
delete_adapter(adapter);
}
static struct pci_driver fcpci_driver = {
.name = "fcpci",
.probe = fcpci_probe,
.remove = __devexit_p(fcpci_remove),
.id_table = fcpci_ids,
};
static struct isapnp_driver fcpnp_driver = {
.name = "fcpnp",
.probe = fcpnp_probe,
......@@ -956,6 +958,8 @@ static struct isapnp_driver fcpnp_driver = {
.id_table = fcpnp_ids,
};
#endif
static int __init hisax_fcpcipnp_init(void)
{
int retval, pci_nr_found;
......@@ -967,7 +971,11 @@ static int __init hisax_fcpcipnp_init(void)
goto out;
pci_nr_found = retval;
#ifdef __ISAPNP__
retval = isapnp_register_driver(&fcpnp_driver);
#else
retval = 0;
#endif
if (retval < 0)
goto out_unregister_pci;
......@@ -981,7 +989,9 @@ static int __init hisax_fcpcipnp_init(void)
#if !defined(CONFIG_HOTPLUG) || defined(MODULE)
out_unregister_isapnp:
#ifdef __ISAPNP__
isapnp_unregister_driver(&fcpnp_driver);
#endif
#endif
out_unregister_pci:
pci_unregister_driver(&fcpci_driver);
......@@ -991,7 +1001,9 @@ static int __init hisax_fcpcipnp_init(void)
static void __exit hisax_fcpcipnp_exit(void)
{
#ifdef __ISAPNP__
isapnp_unregister_driver(&fcpnp_driver);
#endif
pci_unregister_driver(&fcpci_driver);
}
......
drivers/isdn/hisax/hisax_fcpcipnp.h
View file @ 1d0619c5
......@@ -12,15 +12,15 @@ enum {
struct hdlc_stat_reg {
#ifdef __BIG_ENDIAN
u_char fill __attribute__((packed));
u_char mode __attribute__((packed));
u_char xml __attribute__((packed));
u_char cmd __attribute__((packed));
u8 fill __attribute__((packed));
u8 mode __attribute__((packed));
u8 xml __attribute__((packed));
u8 cmd __attribute__((packed));
#else
u_char cmd __attribute__((packed));
u_char xml __attribute__((packed));
u_char mode __attribute__((packed));
u_char fill __attribute__((packed));
u8 cmd __attribute__((packed));
u8 xml __attribute__((packed));
u8 mode __attribute__((packed));
u8 fill __attribute__((packed));
#endif
};
......@@ -36,7 +36,7 @@ struct fritz_bcs {
} ctrl;
u_int stat;
int rcvidx;
u_char rcvbuf[HSCX_BUFMAX]; /* B-Channel receive Buffer */
u8 rcvbuf[HSCX_BUFMAX]; /* B-Channel receive Buffer */
int tx_cnt; /* B-Channel transmit counter */
struct sk_buff *tx_skb; /* B-Channel transmit Buffer */
......
drivers/isdn/hisax/hisax_hscx.c
View file @ 1d0619c5
......@@ -113,7 +113,7 @@ static void hscx_version(struct hscx *hscx)
static void hscx_empty_fifo(struct hscx *hscx, int count)
{
u_char *ptr;
u8 *ptr;
DBG(DBG_IRQ, "count %d", count);
......
drivers/isdn/hisax/hisax_hscx.h
View file @ 1d0619c5
......@@ -16,16 +16,16 @@ struct hscx {
struct hisax_b_if b_if;
int mode;
int channel;
u_char tsaxr;
u8 tsaxr;
struct sk_buff *tx_skb;
int tx_cnt;
u_char rcvbuf[HSCX_BUFMAX];
u8 rcvbuf[HSCX_BUFMAX];
int rcvidx;
u_char (*read_hscx) (struct hscx *, u_char);
void (*write_hscx) (struct hscx *, u_char, u_char);
void (*read_hscx_fifo) (struct hscx *, u_char *, int);
void (*write_hscx_fifo)(struct hscx *, u_char *, int);
u8 (*read_hscx) (struct hscx *, u8);
void (*write_hscx) (struct hscx *, u8, u8);
void (*read_hscx_fifo) (struct hscx *, u8 *, int);
void (*write_hscx_fifo)(struct hscx *, u8 *, int);
};
void hscx_init(struct hscx *hscx);
......
drivers/isdn/hisax/hisax_isac.c
View file @ 1d0619c5
......@@ -450,7 +450,7 @@ static void isac_empty_fifo(struct isac *isac, int count)
{
// this also works for isacsx, since
// CMDR(D) register works the same
u_char *ptr;
u8 *ptr;
DBG(DBG_IRQ, "count %d", count);
......@@ -474,7 +474,7 @@ static void isac_fill_fifo(struct isac *isac)
int count;
unsigned char cmd;
u_char *ptr;
u8 *ptr;
if (!isac->tx_skb)
BUG();
......
drivers/isdn/hisax/hisax_isac.h
View file @ 1d0619c5
......@@ -17,20 +17,20 @@ struct isac {
struct hisax_d_if hisax_d_if;
struct FsmInst l1m;
struct FsmTimer timer;
u_char mocr;
u_char adf2;
u8 mocr;
u8 adf2;
int type;
u_char rcvbuf[MAX_DFRAME_LEN_L1];
u8 rcvbuf[MAX_DFRAME_LEN_L1];
int rcvidx;
struct sk_buff *tx_skb;
int tx_cnt;
u_char (*read_isac) (struct isac *, u_char);
void (*write_isac) (struct isac *, u_char, u_char);
void (*read_isac_fifo) (struct isac *, u_char *, int);
void (*write_isac_fifo)(struct isac *, u_char *, int);
u8 (*read_isac) (struct isac *, u8);
void (*write_isac) (struct isac *, u8, u8);
void (*read_isac_fifo) (struct isac *, u8 *, int);
void (*write_isac_fifo)(struct isac *, u8 *, int);
};
void isac_init(struct isac *isac);
......
drivers/isdn/hisax/hscx.c
View file @ 1d0619c5
......@@ -21,13 +21,49 @@ static char *HSCXVer[] __initdata =
{"A1", "?1", "A2", "?3", "A3", "V2.1", "?6", "?7",
"?8", "?9", "?10", "?11", "?12", "?13", "?14", "???"};
static inline u8
hscx_read(struct BCState *bcs, u8 addr)
{
struct IsdnCardState *cs = bcs->cs;
u8 hscx = bcs->hw.hscx.hscx;
return cs->bc_hw_ops->read_reg(cs, hscx, addr);
}
static inline void
hscx_write(struct BCState *bcs, u8 addr, u8 val)
{
struct IsdnCardState *cs = bcs->cs;
u8 hscx = bcs->hw.hscx.hscx;
cs->bc_hw_ops->write_reg(cs, hscx, addr, val);
}
static inline void
hscx_read_fifo(struct BCState *bcs, u8 *p, int len)
{
struct IsdnCardState *cs = bcs->cs;
u8 hscx = bcs->hw.hscx.hscx;
cs->bc_hw_ops->read_fifo(cs, hscx, p, len);
}
static inline void
hscx_write_fifo(struct BCState *bcs, u8 *p, int len)
{
struct IsdnCardState *cs = bcs->cs;
u8 hscx = bcs->hw.hscx.hscx;
cs->bc_hw_ops->write_fifo(cs, hscx, p, len);
}
int __init
HscxVersion(struct IsdnCardState *cs, char *s)
{
int verA, verB;
verA = cs->BC_Read_Reg(cs, 0, HSCX_VSTR) & 0xf;
verB = cs->BC_Read_Reg(cs, 1, HSCX_VSTR) & 0xf;
verA = cs->bc_hw_ops->read_reg(cs, 0, HSCX_VSTR) & 0xf;
verB = cs->bc_hw_ops->read_reg(cs, 1, HSCX_VSTR) & 0xf;
printk(KERN_INFO "%s HSCX version A: %s B: %s\n", s,
HSCXVer[verA], HSCXVer[verB]);
if ((verA == 0) | (verA == 0xf) | (verB == 0) | (verB == 0xf))
......@@ -47,48 +83,49 @@ modehscx(struct BCState *bcs, int mode, int bc)
'A' + hscx, mode, bc);
bcs->mode = mode;
bcs->channel = bc;
cs->BC_Write_Reg(cs, hscx, HSCX_XAD1, 0xFF);
cs->BC_Write_Reg(cs, hscx, HSCX_XAD2, 0xFF);
cs->BC_Write_Reg(cs, hscx, HSCX_RAH2, 0xFF);
cs->BC_Write_Reg(cs, hscx, HSCX_XBCH, 0x0);
cs->BC_Write_Reg(cs, hscx, HSCX_RLCR, 0x0);
cs->BC_Write_Reg(cs, hscx, HSCX_CCR1,
hscx_write(bcs, HSCX_XAD1, 0xFF);
hscx_write(bcs, HSCX_XAD2, 0xFF);
hscx_write(bcs, HSCX_RAH2, 0xFF);
hscx_write(bcs, HSCX_XBCH, 0x0);
hscx_write(bcs, HSCX_RLCR, 0x0);
hscx_write(bcs, HSCX_CCR1,
test_bit(HW_IPAC, &cs->HW_Flags) ? 0x82 : 0x85);
cs->BC_Write_Reg(cs, hscx, HSCX_CCR2, 0x30);
cs->BC_Write_Reg(cs, hscx, HSCX_XCCR, 7);
cs->BC_Write_Reg(cs, hscx, HSCX_RCCR, 7);
hscx_write(bcs, HSCX_CCR2, 0x30);
hscx_write(bcs, HSCX_XCCR, 7);
hscx_write(bcs, HSCX_RCCR, 7);
/* Switch IOM 1 SSI */
if (test_bit(HW_IOM1, &cs->HW_Flags) && (hscx == 0))
bc = 1 - bc;
if (bc == 0) {
cs->BC_Write_Reg(cs, hscx, HSCX_TSAX,
hscx_write(bcs, HSCX_TSAX,
test_bit(HW_IOM1, &cs->HW_Flags) ? 0x7 : bcs->hw.hscx.tsaxr0);
cs->BC_Write_Reg(cs, hscx, HSCX_TSAR,
hscx_write(bcs, HSCX_TSAR,
test_bit(HW_IOM1, &cs->HW_Flags) ? 0x7 : bcs->hw.hscx.tsaxr0);
} else {
cs->BC_Write_Reg(cs, hscx, HSCX_TSAX, bcs->hw.hscx.tsaxr1);
cs->BC_Write_Reg(cs, hscx, HSCX_TSAR, bcs->hw.hscx.tsaxr1);
hscx_write(bcs, HSCX_TSAX, bcs->hw.hscx.tsaxr1);
hscx_write(bcs, HSCX_TSAR, bcs->hw.hscx.tsaxr1);
}
switch (mode) {
case (L1_MODE_NULL):
cs->BC_Write_Reg(cs, hscx, HSCX_TSAX, 0x1f);
cs->BC_Write_Reg(cs, hscx, HSCX_TSAR, 0x1f);
cs->BC_Write_Reg(cs, hscx, HSCX_MODE, 0x84);
break;
case (L1_MODE_TRANS):
cs->BC_Write_Reg(cs, hscx, HSCX_MODE, 0xe4);
break;
case (L1_MODE_HDLC):
cs->BC_Write_Reg(cs, hscx, HSCX_CCR1,
test_bit(HW_IPAC, &cs->HW_Flags) ? 0x8a : 0x8d);
cs->BC_Write_Reg(cs, hscx, HSCX_MODE, 0x8c);
break;
case L1_MODE_NULL:
hscx_write(bcs, HSCX_TSAX, 0x1f);
hscx_write(bcs, HSCX_TSAR, 0x1f);
hscx_write(bcs, HSCX_MODE, 0x84);
break;
case L1_MODE_TRANS:
hscx_write(bcs, HSCX_MODE, 0xe4);
break;
case L1_MODE_HDLC:
hscx_write(bcs, HSCX_CCR1,
test_bit(HW_IPAC, &cs->HW_Flags) ? 0x8a : 0x8d);
hscx_write(bcs, HSCX_MODE, 0x8c);
break;
}
if (mode)
cs->BC_Write_Reg(cs, hscx, HSCX_CMDR, 0x41);
cs->BC_Write_Reg(cs, hscx, HSCX_ISTA, 0x00);
hscx_write(bcs, HSCX_CMDR, 0x41);
hscx_write(bcs, HSCX_ISTA, 0x00);
}
void
......@@ -191,11 +228,16 @@ setstack_hscx(struct PStack *st, struct BCState *bcs)
return (0);
}
static struct bc_l1_ops hscx_l1_ops = {
.fill_fifo = hscx_fill_fifo,
};
void __init
inithscx(struct IsdnCardState *cs)
{
int val, eval;
cs->bc_l1_ops = &hscx_l1_ops;
cs->bcs[0].BC_SetStack = setstack_hscx;
cs->bcs[1].BC_SetStack = setstack_hscx;
cs->bcs[0].BC_Close = close_hscxstate;
......@@ -207,32 +249,32 @@ inithscx(struct IsdnCardState *cs)
cs->bcs[1].hw.hscx.tsaxr0 = 0x2f;
cs->bcs[1].hw.hscx.tsaxr1 = 3;
val = cs->BC_Read_Reg(cs, 1, HSCX_ISTA);
val = hscx_read(&cs->bcs[1], HSCX_ISTA);
debugl1(cs, "HSCX B ISTA %x", val);
if (val & 0x01) {
eval = cs->BC_Read_Reg(cs, 1, HSCX_EXIR);
eval = hscx_read(&cs->bcs[1], HSCX_EXIR);
debugl1(cs, "HSCX B EXIR %x", eval);
}
if (val & 0x02) {
eval = cs->BC_Read_Reg(cs, 0, HSCX_EXIR);
eval = hscx_read(&cs->bcs[0], HSCX_EXIR);
debugl1(cs, "HSCX A EXIR %x", eval);
}
val = cs->BC_Read_Reg(cs, 0, HSCX_ISTA);
val = hscx_read(&cs->bcs[0], HSCX_ISTA);
debugl1(cs, "HSCX A ISTA %x", val);
val = cs->BC_Read_Reg(cs, 1, HSCX_STAR);
val = hscx_read(&cs->bcs[1], HSCX_STAR);
debugl1(cs, "HSCX B STAR %x", val);
val = cs->BC_Read_Reg(cs, 0, HSCX_STAR);
val = hscx_read(&cs->bcs[0], HSCX_STAR);
debugl1(cs, "HSCX A STAR %x", val);
/* disable all IRQ */
cs->BC_Write_Reg(cs, 0, HSCX_MASK, 0xFF);
cs->BC_Write_Reg(cs, 1, HSCX_MASK, 0xFF);
hscx_write(&cs->bcs[0], HSCX_MASK, 0xFF);
hscx_write(&cs->bcs[1], HSCX_MASK, 0xFF);
modehscx(cs->bcs, 0, 0);
modehscx(cs->bcs + 1, 0, 0);
modehscx(&cs->bcs[0], 0, 0);
modehscx(&cs->bcs[1], 0, 0);
/* Reenable all IRQ */
cs->BC_Write_Reg(cs, 0, HSCX_MASK, 0);
cs->BC_Write_Reg(cs, 1, HSCX_MASK, 0);
hscx_write(&cs->bcs[0], HSCX_MASK, 0x0);
hscx_write(&cs->bcs[1], HSCX_MASK, 0x0);
}
void __init
......@@ -241,3 +283,5 @@ inithscxisac(struct IsdnCardState *cs)
initisac(cs);
inithscx(cs);
}
#include "hscx_irq.c"
drivers/isdn/hisax/hscx.h
View file @ 1d0619c5
......@@ -37,3 +37,5 @@
extern int HscxVersion(struct IsdnCardState *cs, char *s);
extern void modehscx(struct BCState *bcs, int mode, int bc);
extern void inithscxisac(struct IsdnCardState *cs);
extern void hscx_int_main(struct IsdnCardState *cs, u8 val);
extern void hscx_fill_fifo(struct BCState *bcs);
drivers/isdn/hisax/hscx_irq.c
View file @ 1d0619c5
This diff is collapsed.
drivers/isdn/hisax/icc.c
View file @ 1d0619c5
This diff is collapsed.
drivers/isdn/hisax/icc.h
View file @ 1d0619c5
......@@ -67,4 +67,4 @@
extern void ICCVersion(struct IsdnCardState *cs, char *s);
extern void initicc(struct IsdnCardState *cs);
extern void icc_interrupt(struct IsdnCardState *cs, u_char val);
extern void icc_interrupt(struct IsdnCardState *cs, u8 val);
drivers/isdn/hisax/ipacx.c
View file @ 1d0619c5
This diff is collapsed.
drivers/isdn/hisax/isac.c
View file @ 1d0619c5
This diff is collapsed.
drivers/isdn/hisax/isac.h
View file @ 1d0619c5
......@@ -65,4 +65,4 @@
extern void ISACVersion(struct IsdnCardState *cs, char *s);
extern void initisac(struct IsdnCardState *cs);
extern void isac_interrupt(struct IsdnCardState *cs, u_char val);
extern void isac_interrupt(struct IsdnCardState *cs, u8 val);
drivers/isdn/hisax/isar.c
View file @ 1d0619c5
This diff is collapsed.
drivers/isdn/hisax/isdnl1.c
View file @ 1d0619c5
......@@ -366,7 +366,7 @@ init_bcstate(struct IsdnCardState *cs,
#ifdef L2FRAME_DEBUG /* psa */
char *
l2cmd(u_char cmd)
l2cmd(u8 cmd)
{
switch (cmd & ~0x10) {
case 1:
......@@ -400,7 +400,7 @@ l2cmd(u_char cmd)
static char tmpdeb[32];
char *
l2frames(u_char * ptr)
l2frames(u8 * ptr)
{
switch (ptr[2] & ~0x10) {
case 1:
......@@ -432,7 +432,7 @@ l2frames(u_char * ptr)
void
Logl2Frame(struct IsdnCardState *cs, struct sk_buff *skb, char *buf, int dir)
{
u_char *ptr;
u8 *ptr;
ptr = skb->data;
......
drivers/isdn/hisax/isdnl1.h
View file @ 1d0619c5
......@@ -31,6 +31,12 @@ extern void DChannel_proc_rcv(struct IsdnCardState *cs);
extern void l1_msg(struct IsdnCardState *cs, int pr, void *arg);
extern void l1_msg_b(struct PStack *st, int pr, void *arg);
static inline void
fill_fifo_b(struct BCState *bcs)
{
bcs->cs->bc_l1_ops->fill_fifo(bcs);
}
#ifdef L2FRAME_DEBUG
extern void Logl2Frame(struct IsdnCardState *cs, struct sk_buff *skb, char *buf, int dir);
#endif
......@@ -74,7 +80,7 @@ xmit_ready_b(struct BCState *bcs)
if (bcs->tx_skb) {
bcs->count = 0;
set_bit(BC_FLG_BUSY, &bcs->Flag);
bcs->cs->BC_Send_Data(bcs);
fill_fifo_b(bcs);
} else {
clear_bit(BC_FLG_BUSY, &bcs->Flag);
sched_b_event(bcs, B_XMTBUFREADY);
......@@ -107,7 +113,7 @@ xmit_data_req_b(struct BCState *bcs, struct sk_buff *skb)
set_bit(BC_FLG_BUSY, &bcs->Flag);
bcs->tx_skb = skb;
bcs->count = 0;
bcs->cs->BC_Send_Data(bcs);
fill_fifo_b(bcs);
}
spin_unlock_irqrestore(&cs->lock, flags);
}
......@@ -153,7 +159,7 @@ xmit_pull_ind_b(struct BCState *bcs, struct sk_buff *skb)
set_bit(BC_FLG_BUSY, &bcs->Flag);
bcs->tx_skb = skb;
bcs->count = 0;
bcs->cs->BC_Send_Data(bcs);
fill_fifo_b(bcs);
}
spin_unlock_irqrestore(&cs->lock, flags);
}
......@@ -268,7 +274,7 @@ xmit_xpr_b(struct BCState *bcs)
if (bcs->tx_skb) {
/* last frame not done yet? */
if (bcs->tx_skb->len) {
bcs->cs->BC_Send_Data(bcs);
fill_fifo_b(bcs);
return;
}
xmit_complete_b(bcs);
......@@ -310,7 +316,7 @@ xmit_xdu_b(struct BCState *bcs, void (*reset_xmit)(struct BCState *bcs))
debugl1(cs, "HSCX %c EXIR XDU", 'A' + bcs->channel);
if (bcs->mode == L1_MODE_TRANS) {
cs->BC_Send_Data(bcs);
fill_fifo_b(bcs);
} else {
xmit_restart_b(bcs);
reset_xmit(bcs);
......
drivers/isdn/hisax/isdnl2.c
View file @ 1d0619c5
This diff is collapsed.
drivers/isdn/hisax/isdnl3.c
View file @ 1d0619c5
......@@ -77,11 +77,11 @@ l3m_debug(struct FsmInst *fi, char *fmt, ...)
va_end(args);
}
u_char *
findie(u_char * p, int size, u_char ie, int wanted_set)
u8 *
findie(u8 * p, int size, u8 ie, int wanted_set)
{
int l, codeset, maincodeset;
u_char *pend = p + size;
u8 *pend = p + size;
/* skip protocol discriminator, callref and message type */
p++;
......@@ -123,7 +123,7 @@ findie(u_char * p, int size, u_char ie, int wanted_set)
}
int
getcallref(u_char * p)
getcallref(u8 * p)
{
int l, cr = 0;
......
drivers/isdn/hisax/isdnl3.h
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......@@ -20,7 +20,7 @@
struct stateentry {
int state;
int primitive;
void (*rout) (struct l3_process *, u_char, void *);
void (*rout) (struct l3_process *, u8, void *);
};
#define l3_debug(st, fmt, args...) HiSax_putstatus(st->l1.hardware, "l3 ", fmt, ## args)
......
drivers/isdn/hisax/isurf.c
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drivers/isdn/hisax/ix1_micro.c
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drivers/isdn/hisax/jade.c
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drivers/isdn/hisax/jade.h
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......@@ -131,5 +131,8 @@ extern int JadeVersion(struct IsdnCardState *cs, char *s);
extern void jade_sched_event(struct BCState *bcs, int event);
extern void modejade(struct BCState *bcs, int mode, int bc);
extern void initjade(struct IsdnCardState *cs);
extern void jade_int_main(struct IsdnCardState *cs, u_char val, int jade);
extern void jade_fill_fifo(struct BCState *bcs);
#endif /* __JADE_H__ */
drivers/isdn/hisax/jade_irq.c
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drivers/isdn/hisax/l3_1tr6.c
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drivers/isdn/hisax/l3dss1.c
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drivers/isdn/hisax/l3dss1.h
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drivers/isdn/hisax/l3ni1.c
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drivers/isdn/hisax/l3ni1.h
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drivers/isdn/hisax/mic.c
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drivers/isdn/hisax/netjet.c
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drivers/isdn/hisax/netjet.h
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drivers/isdn/hisax/niccy.c
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drivers/isdn/hisax/nj_u.c
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drivers/isdn/hisax/q931.c
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drivers/isdn/hisax/rawhdlc.c
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drivers/isdn/hisax/rawhdlc.h
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drivers/isdn/hisax/s0box.c
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drivers/isdn/hisax/saphir.c
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drivers/isdn/hisax/sedlbauer.c
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drivers/isdn/hisax/sedlbauer_cs.c
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drivers/isdn/hisax/sportster.c
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drivers/isdn/hisax/st5481.h
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drivers/isdn/hisax/st5481_b.c
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drivers/isdn/hisax/st5481_usb.c
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drivers/isdn/hisax/tei.c
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drivers/isdn/hisax/teleint.c
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drivers/isdn/hisax/teles0.c
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drivers/isdn/hisax/teles3.c
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drivers/isdn/hisax/telespci.c
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drivers/isdn/hisax/w6692.c
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