Commit 1deaf754 authored by Andrew Jones's avatar Andrew Jones Committed by Anup Patel

RISC-V: KVM: Improve vector save/restore errors

kvm_riscv_vcpu_(get/set)_reg_vector() now returns ENOENT if V is not
available, EINVAL if reg type is not of VECTOR type, and any error that
might be thrown by kvm_riscv_vcpu_vreg_addr().
Signed-off-by: default avatarAndrew Jones <ajones@ventanamicro.com>
Signed-off-by: default avatarAnup Patel <anup@brainfault.org>
parent 1099c809
...@@ -91,44 +91,44 @@ void kvm_riscv_vcpu_free_vector_context(struct kvm_vcpu *vcpu) ...@@ -91,44 +91,44 @@ void kvm_riscv_vcpu_free_vector_context(struct kvm_vcpu *vcpu)
} }
#endif #endif
static void *kvm_riscv_vcpu_vreg_addr(struct kvm_vcpu *vcpu, static int kvm_riscv_vcpu_vreg_addr(struct kvm_vcpu *vcpu,
unsigned long reg_num, unsigned long reg_num,
size_t reg_size) size_t reg_size,
void **reg_val)
{ {
struct kvm_cpu_context *cntx = &vcpu->arch.guest_context; struct kvm_cpu_context *cntx = &vcpu->arch.guest_context;
void *reg_val;
size_t vlenb = riscv_v_vsize / 32; size_t vlenb = riscv_v_vsize / 32;
if (reg_num < KVM_REG_RISCV_VECTOR_REG(0)) { if (reg_num < KVM_REG_RISCV_VECTOR_REG(0)) {
if (reg_size != sizeof(unsigned long)) if (reg_size != sizeof(unsigned long))
return NULL; return -EINVAL;
switch (reg_num) { switch (reg_num) {
case KVM_REG_RISCV_VECTOR_CSR_REG(vstart): case KVM_REG_RISCV_VECTOR_CSR_REG(vstart):
reg_val = &cntx->vector.vstart; *reg_val = &cntx->vector.vstart;
break; break;
case KVM_REG_RISCV_VECTOR_CSR_REG(vl): case KVM_REG_RISCV_VECTOR_CSR_REG(vl):
reg_val = &cntx->vector.vl; *reg_val = &cntx->vector.vl;
break; break;
case KVM_REG_RISCV_VECTOR_CSR_REG(vtype): case KVM_REG_RISCV_VECTOR_CSR_REG(vtype):
reg_val = &cntx->vector.vtype; *reg_val = &cntx->vector.vtype;
break; break;
case KVM_REG_RISCV_VECTOR_CSR_REG(vcsr): case KVM_REG_RISCV_VECTOR_CSR_REG(vcsr):
reg_val = &cntx->vector.vcsr; *reg_val = &cntx->vector.vcsr;
break; break;
case KVM_REG_RISCV_VECTOR_CSR_REG(datap): case KVM_REG_RISCV_VECTOR_CSR_REG(datap):
default: default:
return NULL; return -ENOENT;
} }
} else if (reg_num <= KVM_REG_RISCV_VECTOR_REG(31)) { } else if (reg_num <= KVM_REG_RISCV_VECTOR_REG(31)) {
if (reg_size != vlenb) if (reg_size != vlenb)
return NULL; return -EINVAL;
reg_val = cntx->vector.datap *reg_val = cntx->vector.datap
+ (reg_num - KVM_REG_RISCV_VECTOR_REG(0)) * vlenb; + (reg_num - KVM_REG_RISCV_VECTOR_REG(0)) * vlenb;
} else { } else {
return NULL; return -ENOENT;
} }
return reg_val; return 0;
} }
int kvm_riscv_vcpu_get_reg_vector(struct kvm_vcpu *vcpu, int kvm_riscv_vcpu_get_reg_vector(struct kvm_vcpu *vcpu,
...@@ -141,17 +141,20 @@ int kvm_riscv_vcpu_get_reg_vector(struct kvm_vcpu *vcpu, ...@@ -141,17 +141,20 @@ int kvm_riscv_vcpu_get_reg_vector(struct kvm_vcpu *vcpu,
unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK | unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK |
KVM_REG_SIZE_MASK | KVM_REG_SIZE_MASK |
rtype); rtype);
void *reg_val = NULL;
size_t reg_size = KVM_REG_SIZE(reg->id); size_t reg_size = KVM_REG_SIZE(reg->id);
void *reg_val;
int rc;
if (rtype == KVM_REG_RISCV_VECTOR && if (rtype != KVM_REG_RISCV_VECTOR)
riscv_isa_extension_available(isa, v)) {
reg_val = kvm_riscv_vcpu_vreg_addr(vcpu, reg_num, reg_size);
}
if (!reg_val)
return -EINVAL; return -EINVAL;
if (!riscv_isa_extension_available(isa, v))
return -ENOENT;
rc = kvm_riscv_vcpu_vreg_addr(vcpu, reg_num, reg_size, &reg_val);
if (rc)
return rc;
if (copy_to_user(uaddr, reg_val, reg_size)) if (copy_to_user(uaddr, reg_val, reg_size))
return -EFAULT; return -EFAULT;
...@@ -168,17 +171,20 @@ int kvm_riscv_vcpu_set_reg_vector(struct kvm_vcpu *vcpu, ...@@ -168,17 +171,20 @@ int kvm_riscv_vcpu_set_reg_vector(struct kvm_vcpu *vcpu,
unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK | unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK |
KVM_REG_SIZE_MASK | KVM_REG_SIZE_MASK |
rtype); rtype);
void *reg_val = NULL;
size_t reg_size = KVM_REG_SIZE(reg->id); size_t reg_size = KVM_REG_SIZE(reg->id);
void *reg_val;
int rc;
if (rtype == KVM_REG_RISCV_VECTOR && if (rtype != KVM_REG_RISCV_VECTOR)
riscv_isa_extension_available(isa, v)) {
reg_val = kvm_riscv_vcpu_vreg_addr(vcpu, reg_num, reg_size);
}
if (!reg_val)
return -EINVAL; return -EINVAL;
if (!riscv_isa_extension_available(isa, v))
return -ENOENT;
rc = kvm_riscv_vcpu_vreg_addr(vcpu, reg_num, reg_size, &reg_val);
if (rc)
return rc;
if (copy_from_user(reg_val, uaddr, reg_size)) if (copy_from_user(reg_val, uaddr, reg_size))
return -EFAULT; return -EFAULT;
......
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