Commit 1e321fa9 authored by Leonid Yegoshin's avatar Leonid Yegoshin Committed by Ralf Baechle

MIPS64: Support of at least 48 bits of SEGBITS

SEGBITS is 40 bits or more, depending on CPU type.  Introduces optional
support for 48 bits of application virtual address space.  Only 16K and
64K pages are supported.

Enabling will result in a memory overhead of a small number of pages for
small applications.  For 64K pages a 3rd level of page tables is required
which has some impact during software TLB refill.

[ralf@linux-mips.org: Fixed things raised in the review of the version
posted and changed kconfig to be a bit more userfriendly.]
Signed-off-by: default avatarLeonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Cc: aleksey.makarov@auriga.com
Cc: james.hogan@imgtec.com
Cc: paul.burton@imgtec.com
Cc: david.daney@cavium.com
Cc: peterz@infradead.org
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: davidlohr@hp.com
Cc: kirill@shutemov.name
Cc: akpm@linux-foundation.org
Cc: mingo@kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/10051/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 7939469d
...@@ -2076,6 +2076,16 @@ config KVM_GUEST_TIMER_FREQ ...@@ -2076,6 +2076,16 @@ config KVM_GUEST_TIMER_FREQ
emulation when determining guest CPU Frequency. Instead, the guest's emulation when determining guest CPU Frequency. Instead, the guest's
timer frequency is specified directly. timer frequency is specified directly.
config MIPS_VA_BITS_48
bool "48 bits virtual memory"
depends on 64BIT
help
Support a maximum at least 48 bits of application virtual memory.
Default is 40 bits or less, depending on the CPU.
This option result in a small memory overhead for page tables.
This option is only supported with 16k and 64k page sizes.
If unsure, say N.
choice choice
prompt "Kernel page size" prompt "Kernel page size"
default PAGE_SIZE_4KB default PAGE_SIZE_4KB
...@@ -2083,6 +2093,7 @@ choice ...@@ -2083,6 +2093,7 @@ choice
config PAGE_SIZE_4KB config PAGE_SIZE_4KB
bool "4kB" bool "4kB"
depends on !CPU_LOONGSON2 && !CPU_LOONGSON3 depends on !CPU_LOONGSON2 && !CPU_LOONGSON3
depends on !MIPS_VA_BITS_48
help help
This option select the standard 4kB Linux page size. On some This option select the standard 4kB Linux page size. On some
R3000-family processors this is the only available page size. Using R3000-family processors this is the only available page size. Using
...@@ -2092,6 +2103,7 @@ config PAGE_SIZE_4KB ...@@ -2092,6 +2103,7 @@ config PAGE_SIZE_4KB
config PAGE_SIZE_8KB config PAGE_SIZE_8KB
bool "8kB" bool "8kB"
depends on CPU_R8000 || CPU_CAVIUM_OCTEON depends on CPU_R8000 || CPU_CAVIUM_OCTEON
depends on !MIPS_VA_BITS_48
help help
Using 8kB page size will result in higher performance kernel at Using 8kB page size will result in higher performance kernel at
the price of higher memory consumption. This option is available the price of higher memory consumption. This option is available
...@@ -2110,6 +2122,7 @@ config PAGE_SIZE_16KB ...@@ -2110,6 +2122,7 @@ config PAGE_SIZE_16KB
config PAGE_SIZE_32KB config PAGE_SIZE_32KB
bool "32kB" bool "32kB"
depends on CPU_CAVIUM_OCTEON depends on CPU_CAVIUM_OCTEON
depends on !MIPS_VA_BITS_48
help help
Using 32kB page size will result in higher performance kernel at Using 32kB page size will result in higher performance kernel at
the price of higher memory consumption. This option is available the price of higher memory consumption. This option is available
......
...@@ -17,7 +17,7 @@ ...@@ -17,7 +17,7 @@
#include <asm/cachectl.h> #include <asm/cachectl.h>
#include <asm/fixmap.h> #include <asm/fixmap.h>
#ifdef CONFIG_PAGE_SIZE_64KB #if defined(CONFIG_PAGE_SIZE_64KB) && !defined(CONFIG_MIPS_VA_BITS_48)
#include <asm-generic/pgtable-nopmd.h> #include <asm-generic/pgtable-nopmd.h>
#else #else
#include <asm-generic/pgtable-nopud.h> #include <asm-generic/pgtable-nopud.h>
...@@ -90,7 +90,11 @@ ...@@ -90,7 +90,11 @@
#define PTE_ORDER 0 #define PTE_ORDER 0
#endif #endif
#ifdef CONFIG_PAGE_SIZE_16KB #ifdef CONFIG_PAGE_SIZE_16KB
#define PGD_ORDER 0 #ifdef CONFIG_MIPS_VA_BITS_48
#define PGD_ORDER 1
#else
#define PGD_ORDER 0
#endif
#define PUD_ORDER aieeee_attempt_to_allocate_pud #define PUD_ORDER aieeee_attempt_to_allocate_pud
#define PMD_ORDER 0 #define PMD_ORDER 0
#define PTE_ORDER 0 #define PTE_ORDER 0
...@@ -104,7 +108,11 @@ ...@@ -104,7 +108,11 @@
#ifdef CONFIG_PAGE_SIZE_64KB #ifdef CONFIG_PAGE_SIZE_64KB
#define PGD_ORDER 0 #define PGD_ORDER 0
#define PUD_ORDER aieeee_attempt_to_allocate_pud #define PUD_ORDER aieeee_attempt_to_allocate_pud
#ifdef CONFIG_MIPS_VA_BITS_48
#define PMD_ORDER 0
#else
#define PMD_ORDER aieeee_attempt_to_allocate_pmd #define PMD_ORDER aieeee_attempt_to_allocate_pmd
#endif
#define PTE_ORDER 0 #define PTE_ORDER 0
#endif #endif
...@@ -114,11 +122,7 @@ ...@@ -114,11 +122,7 @@
#endif #endif
#define PTRS_PER_PTE ((PAGE_SIZE << PTE_ORDER) / sizeof(pte_t)) #define PTRS_PER_PTE ((PAGE_SIZE << PTE_ORDER) / sizeof(pte_t))
#if PGDIR_SIZE >= TASK_SIZE64 #define USER_PTRS_PER_PGD ((TASK_SIZE64 / PGDIR_SIZE)?(TASK_SIZE64 / PGDIR_SIZE):1)
#define USER_PTRS_PER_PGD (1)
#else
#define USER_PTRS_PER_PGD (TASK_SIZE64 / PGDIR_SIZE)
#endif
#define FIRST_USER_ADDRESS 0UL #define FIRST_USER_ADDRESS 0UL
/* /*
......
...@@ -63,7 +63,11 @@ extern unsigned int vced_count, vcei_count; ...@@ -63,7 +63,11 @@ extern unsigned int vced_count, vcei_count;
* 8192EB ... * 8192EB ...
*/ */
#define TASK_SIZE32 0x7fff8000UL #define TASK_SIZE32 0x7fff8000UL
#define TASK_SIZE64 0x10000000000UL #ifdef CONFIG_MIPS_VA_BITS_48
#define TASK_SIZE64 (0x1UL << ((cpu_data[0].vmbits>48)?48:cpu_data[0].vmbits))
#else
#define TASK_SIZE64 0x10000000000UL
#endif
#define TASK_SIZE (test_thread_flag(TIF_32BIT_ADDR) ? TASK_SIZE32 : TASK_SIZE64) #define TASK_SIZE (test_thread_flag(TIF_32BIT_ADDR) ? TASK_SIZE32 : TASK_SIZE64)
#define STACK_TOP_MAX TASK_SIZE64 #define STACK_TOP_MAX TASK_SIZE64
......
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