Commit 1e440c22 authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski

ARM: dts: exynos: Move fixed-clocks out of soc on Exynos3250

The three fixed-clocks (xusbxti, xxti and xtcxo) are inputs to the
Exynos3250 therefore they should not be inside the soc node.  This also
fixes DTC W=1 warning:

    arch/arm/boot/dts/exynos3250.dtsi:112.21-139.5:
        Warning (simple_bus_reg): /soc/fixed-rate-clocks: missing or empty reg/ranges property
Signed-off-by: default avatarKrzysztof Kozlowski <krzk@kernel.org>
parent 39691e77
...@@ -97,6 +97,35 @@ cpu1: cpu@1 { ...@@ -97,6 +97,35 @@ cpu1: cpu@1 {
}; };
}; };
fixed-rate-clocks {
#address-cells = <1>;
#size-cells = <0>;
xusbxti: clock@0 {
compatible = "fixed-clock";
reg = <0>;
clock-frequency = <0>;
#clock-cells = <0>;
clock-output-names = "xusbxti";
};
xxti: clock@1 {
compatible = "fixed-clock";
reg = <1>;
clock-frequency = <0>;
#clock-cells = <0>;
clock-output-names = "xxti";
};
xtcxo: clock@2 {
compatible = "fixed-clock";
reg = <2>;
clock-frequency = <0>;
#clock-cells = <0>;
clock-output-names = "xtcxo";
};
};
pmu { pmu {
compatible = "arm,cortex-a7-pmu"; compatible = "arm,cortex-a7-pmu";
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
...@@ -109,35 +138,6 @@ soc: soc { ...@@ -109,35 +138,6 @@ soc: soc {
#size-cells = <1>; #size-cells = <1>;
ranges; ranges;
fixed-rate-clocks {
#address-cells = <1>;
#size-cells = <0>;
xusbxti: clock@0 {
compatible = "fixed-clock";
reg = <0>;
clock-frequency = <0>;
#clock-cells = <0>;
clock-output-names = "xusbxti";
};
xxti: clock@1 {
compatible = "fixed-clock";
reg = <1>;
clock-frequency = <0>;
#clock-cells = <0>;
clock-output-names = "xxti";
};
xtcxo: clock@2 {
compatible = "fixed-clock";
reg = <2>;
clock-frequency = <0>;
#clock-cells = <0>;
clock-output-names = "xtcxo";
};
};
sysram@2020000 { sysram@2020000 {
compatible = "mmio-sram"; compatible = "mmio-sram";
reg = <0x02020000 0x40000>; reg = <0x02020000 0x40000>;
......
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