[PATCH] VIA8231 support for parallel port driver

This patch allows the kernel to configure port's mode without help of BIOS.
 It is needed on my machine because its firmware simply ignores the
parallel port leaving in unidirectional SPP mode.

Notes on usage:

To configure the port you need to:

- if parport_pc driver is compiled as a module: specify parport_pc
  init_mode=[spp|ps2|epp|ecp|ecpepp] in /etc/modules file (for Debian
  Linux).

- if the driver is linked statically with the kernel: specify
  parport_init_mode=[spp|ps2|epp|ecp|ecpepp] in kernel's arguments.

This patch is intended for use primarily on Pegasos machines but it will
work on any computer with VIA8231 south bridge.  In this case it will
override BIOS setting if you tell the driver to configure the port.  BIOS
setting will be honored if you omit init_mode parameter.  Technical
details:

1.  On Pegasos standard port settings (set by OpenFirmware) are: IRQ=7,
    DMA=3, base address=0x3BC, mode is unidirectional SPP.

2.  The patch changes only port mode, all other settings are preserved.
     So if you have a PC with VIA8231 and use driver to configure the port
    you'll still be able to change IRQ, DMA and base address in BIOS and
    these settings will be kept.

3.  One exclusion: if you tell the driver to turn on EPP mode (specify
    epp or ecpepp value) and if default base address is 0x3BC (this is the
    case on Pegasos) the port will be moved to 0x378.  EPP port can't have
    0x3BC as the base.

Known problems:

1.  ECP+EPP mode is strange, it doesn't work even on several PC's i
    tested with Linux.  ECP mode is detected and EPP is not.  So if you get
    the same thing, it's not my fault.  I just have no time to deal with
    it, current result is enough for me.

2.  Not all devices work on Pegasos, i tried my Genuis-HR6 parallel
    port scanner and parallel ZIP drive and both of them don't work.  ZIP
    drive is detected properly but then suddenly gets offline.  Scanner
    does not answer any command at all.  Without the patch the same thing
    happens.  Obviously Pegasos has some more problems which are not
    discovered and not fixed yet.
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

Documentation/kernel-parameters.txt

@@ -866,6 +866,16 @@ running once the system is up.
 					order they are specified on the command
 					line, starting with parport0.
 
+	parport_init_mode=
+			[HW,PPT]	Configure VIA parallel port to
+					operate in specific mode. This is
+					necessary on Pegasos computer where
+					firmware has no options for setting up
+					parallel port mode and sets it to
+					spp. Currently this function knows
+					686a and 8231 chips.
+			Format: [spp|ps2|epp|ecp|ecpepp]
+
 	pas2=		[HW,OSS]
 			Format: <io>,<irq>,<dma>,<dma16>,<sb_io>,<sb_irq>,<sb_dma>,<sb_dma16>
  

include/linux/parport_pc.h

@@ -43,6 +43,23 @@ struct parport_pc_private {
 	struct parport *port;
 };
 
+struct parport_pc_via_data
+{
+	/* ISA PnP IRQ routing register 1 */
+	u8 via_pci_parport_irq_reg;
+	/* ISA PnP DMA request routing register */
+	u8 via_pci_parport_dma_reg;
+	/* Register and value to enable SuperIO configuration access */
+	u8 via_pci_superio_config_reg;
+	u8 via_pci_superio_config_data;
+	/* SuperIO function register number */
+	u8 viacfg_function;
+	/* parallel port control register number */
+	u8 viacfg_parport_control;
+	/* Parallel port base address register */
+	u8 viacfg_parport_base;
+};
+
 static __inline__ void parport_pc_write_data(struct parport *p, unsigned char d)
 {
 #ifdef DEBUG_PARPORT

include/linux/via.h

+/* Miscellaneous definitions for VIA chipsets
+   Currently used only by drivers/parport/parport_pc.c */
+
+/* Values for SuperIO function select configuration register */
+#define VIA_FUNCTION_PARPORT_SPP     0x00
+#define VIA_FUNCTION_PARPORT_ECP     0x01
+#define VIA_FUNCTION_PARPORT_EPP     0x02
+#define VIA_FUNCTION_PARPORT_DISABLE 0x03
+#define VIA_FUNCTION_PROBE           0xFF /* Special magic value to be used in code, not to be written into chip */
+
+/* Bits for parallel port mode configuration register */
+#define VIA_PARPORT_ECPEPP 0X20
+#define VIA_PARPORT_BIDIR  0x80
+
+/* VIA configuration registers */
+#define VIA_CONFIG_INDEX 0x3F0
+#define VIA_CONFIG_DATA  0x3F1
+
+/* Mask for parallel port IRQ bits (in ISA PnP IRQ routing register 1) */
+#define VIA_IRQCONTROL_PARALLEL 0xF0
+/* Mask for parallel port DMA bits (in ISA PnP DMA routing register) */
+#define VIA_DMACONTROL_PARALLEL 0x0C