Commit 1ef3e362 authored by Linus Torvalds's avatar Linus Torvalds

Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/blackfin-2.6

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/blackfin-2.6: (74 commits)
  Blackfin serial driver: pending a unique anomaly id, tie the break flood issue to ANOMALY_05000230
  blackfin enable arbitary speed serial setting
  Blackfin arch: Remove cruft - CONFIG_DEBUG_SERIAL_EARLY_INIT and DEBUG_KERNEL_START
  Blackfin arch: fix typo in register name
  Blackfin arch: trim the Blackfin arch MAINTAINERS list
  Blackfin arch: fix bug libstdc++ calling writev with an iovec containing { NULL, 0 } fails on Blackfin
  Blackfin arch: Export strcpy - occasionally get module link failures otherwise
  Blackfin arch: the load address is not safe to point to as a workaround for ANOMALY 05000281
  Blackfin arch: show_mem can not be marked as init, since it is called during OOM condition
  Blackfin arch: flush/inv the correct range when using write back cache and fix bugs find by dmacopy
  Blackfin arch: update kgdb patch
  Blackfin arch: Comply with revised Anomaly Workarounds for BF533 05000311 and BF561 05000323
  Blackfin arch: Print out debug info, as early as possible
  Blackfin arch: Enable earlyprintk earlier - so any error after our interrupt tables are set up will print out
  Blackfin arch: fix endless loop bug when a double fault happens
  Blackfin arch: Initial patch to add earlyprintk support
  Blackfin arch: add TWIx_REGBASE and SPIx_REGBASE to specific CPU header files, use the new REGBASE for board platform resources
  Blackfin arch: modify the insX/outsX and dma_insX/dma_outsX to be compatible with other archs
  Blackfin arch: add more common defines for output sections
  Blackfin arch: cleanup IO and DMA_IO API function definitions according to other arches
  ...
parents c634920a bbf275f0
...@@ -35,6 +35,7 @@ parameter is applicable: ...@@ -35,6 +35,7 @@ parameter is applicable:
APIC APIC support is enabled. APIC APIC support is enabled.
APM Advanced Power Management support is enabled. APM Advanced Power Management support is enabled.
AX25 Appropriate AX.25 support is enabled. AX25 Appropriate AX.25 support is enabled.
BLACKFIN Blackfin architecture is enabled.
DRM Direct Rendering Management support is enabled. DRM Direct Rendering Management support is enabled.
EDD BIOS Enhanced Disk Drive Services (EDD) is enabled EDD BIOS Enhanced Disk Drive Services (EDD) is enabled
EFI EFI Partitioning (GPT) is enabled EFI EFI Partitioning (GPT) is enabled
...@@ -550,7 +551,7 @@ and is between 256 and 4096 characters. It is defined in the file ...@@ -550,7 +551,7 @@ and is between 256 and 4096 characters. It is defined in the file
dtc3181e= [HW,SCSI] dtc3181e= [HW,SCSI]
earlyprintk= [X86-32,X86-64,SH] earlyprintk= [X86-32,X86-64,SH,BLACKFIN]
earlyprintk=vga earlyprintk=vga
earlyprintk=serial[,ttySn[,baudrate]] earlyprintk=serial[,ttySn[,baudrate]]
......
...@@ -718,34 +718,8 @@ M: rpurdie@rpsys.net ...@@ -718,34 +718,8 @@ M: rpurdie@rpsys.net
S: Maintained S: Maintained
BLACKFIN ARCHITECTURE BLACKFIN ARCHITECTURE
P: Aubrey Li
M: aubrey.li@analog.com
P: Bernd Schmidt
M: bernd.schmidt@analog.com
P: Bryan Wu P: Bryan Wu
M: bryan.wu@analog.com M: bryan.wu@analog.com
P: Grace Pan
M: grace.pan@analog.com
P: Marc Hoffman
M: marc.hoffman@analog.com
P: Michael Hennerich
M: michael.hennerich@analog.com
P: Mike Frysinger
M: michael.frysinger@analog.com
P: Jerry Zeng
M: jerry.zeng@analog.com
P: Jie Zhang
M: jie.zhang@analog.com
P: Robin Getz
M: robin.getz@analog.com
P: Roy Huang
M: roy.huang@analog.com
P: Sonic Zhang
M: sonic.zhang@analog.com
P: Vivi Li
M: vivi.li@analog.com
P: Yi Li
M: yi.li@analog.com
L: uclinux-dist-devel@blackfin.uclinux.org (subscribers-only) L: uclinux-dist-devel@blackfin.uclinux.org (subscribers-only)
W: http://blackfin.uclinux.org W: http://blackfin.uclinux.org
S: Supported S: Supported
......
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...@@ -7,11 +7,10 @@ extra-y := init_task.o vmlinux.lds ...@@ -7,11 +7,10 @@ extra-y := init_task.o vmlinux.lds
obj-y := \ obj-y := \
entry.o process.o bfin_ksyms.o ptrace.o setup.o signal.o \ entry.o process.o bfin_ksyms.o ptrace.o setup.o signal.o \
sys_bfin.o time.o traps.o irqchip.o dma-mapping.o flat.o \ sys_bfin.o time.o traps.o irqchip.o dma-mapping.o flat.o \
fixed_code.o cplbinit.o cacheinit.o fixed_code.o cplbinit.o cacheinit.o reboot.o bfin_gpio.o
obj-$(CONFIG_BF53x) += bfin_gpio.o
obj-$(CONFIG_BF561) += bfin_gpio.o
obj-$(CONFIG_MODULES) += module.o obj-$(CONFIG_MODULES) += module.o
obj-$(CONFIG_BFIN_DMA_5XX) += bfin_dma_5xx.o obj-$(CONFIG_BFIN_DMA_5XX) += bfin_dma_5xx.o
obj-$(CONFIG_DUAL_CORE_TEST_MODULE) += dualcore_test.o obj-$(CONFIG_DUAL_CORE_TEST_MODULE) += dualcore_test.o
obj-$(CONFIG_KGDB) += kgdb.o obj-$(CONFIG_KGDB) += kgdb.o
obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
...@@ -73,6 +73,11 @@ static int __init blackfin_dma_init(void) ...@@ -73,6 +73,11 @@ static int __init blackfin_dma_init(void)
/* Mark MEMDMA Channel 0 as requested since we're using it internally */ /* Mark MEMDMA Channel 0 as requested since we're using it internally */
dma_ch[CH_MEM_STREAM0_DEST].chan_status = DMA_CHANNEL_REQUESTED; dma_ch[CH_MEM_STREAM0_DEST].chan_status = DMA_CHANNEL_REQUESTED;
dma_ch[CH_MEM_STREAM0_SRC].chan_status = DMA_CHANNEL_REQUESTED; dma_ch[CH_MEM_STREAM0_SRC].chan_status = DMA_CHANNEL_REQUESTED;
#if defined(CONFIG_DEB_DMA_URGENT)
bfin_write_EBIU_DDRQUE(bfin_read_EBIU_DDRQUE()
| DEB1_URGENT | DEB2_URGENT | DEB3_URGENT);
#endif
return 0; return 0;
} }
...@@ -265,10 +270,23 @@ void set_dma_next_desc_addr(unsigned int channel, unsigned long addr) ...@@ -265,10 +270,23 @@ void set_dma_next_desc_addr(unsigned int channel, unsigned long addr)
dma_ch[channel].regs->next_desc_ptr = addr; dma_ch[channel].regs->next_desc_ptr = addr;
SSYNC(); SSYNC();
pr_debug("set_dma_start_addr() : END\n"); pr_debug("set_dma_next_desc_addr() : END\n");
} }
EXPORT_SYMBOL(set_dma_next_desc_addr); EXPORT_SYMBOL(set_dma_next_desc_addr);
void set_dma_curr_desc_addr(unsigned int channel, unsigned long addr)
{
pr_debug("set_dma_curr_desc_addr() : BEGIN \n");
BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE
&& channel < MAX_BLACKFIN_DMA_CHANNEL));
dma_ch[channel].regs->curr_desc_ptr = addr;
SSYNC();
pr_debug("set_dma_curr_desc_addr() : END\n");
}
EXPORT_SYMBOL(set_dma_curr_desc_addr);
void set_dma_x_count(unsigned int channel, unsigned short x_count) void set_dma_x_count(unsigned int channel, unsigned short x_count)
{ {
BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE
...@@ -345,6 +363,16 @@ void set_dma_sg(unsigned int channel, struct dmasg *sg, int nr_sg) ...@@ -345,6 +363,16 @@ void set_dma_sg(unsigned int channel, struct dmasg *sg, int nr_sg)
} }
EXPORT_SYMBOL(set_dma_sg); EXPORT_SYMBOL(set_dma_sg);
void set_dma_curr_addr(unsigned int channel, unsigned long addr)
{
BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE
&& channel < MAX_BLACKFIN_DMA_CHANNEL));
dma_ch[channel].regs->curr_addr_ptr = addr;
SSYNC();
}
EXPORT_SYMBOL(set_dma_curr_addr);
/*------------------------------------------------------------------------------ /*------------------------------------------------------------------------------
* Get the DMA status of a specific DMA channel from the system. * Get the DMA status of a specific DMA channel from the system.
*-----------------------------------------------------------------------------*/ *-----------------------------------------------------------------------------*/
...@@ -408,6 +436,10 @@ static void *__dma_memcpy(void *dest, const void *src, size_t size) ...@@ -408,6 +436,10 @@ static void *__dma_memcpy(void *dest, const void *src, size_t size)
blackfin_dcache_flush_range((unsigned int)src, blackfin_dcache_flush_range((unsigned int)src,
(unsigned int)(src + size)); (unsigned int)(src + size));
if ((unsigned long)dest < memory_end)
blackfin_dcache_invalidate_range((unsigned int)dest,
(unsigned int)(dest + size));
bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR); bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR);
if ((unsigned long)src < (unsigned long)dest) if ((unsigned long)src < (unsigned long)dest)
...@@ -515,6 +547,8 @@ static void *__dma_memcpy(void *dest, const void *src, size_t size) ...@@ -515,6 +547,8 @@ static void *__dma_memcpy(void *dest, const void *src, size_t size)
} }
} }
SSYNC();
while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE)) while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE))
; ;
...@@ -524,9 +558,6 @@ static void *__dma_memcpy(void *dest, const void *src, size_t size) ...@@ -524,9 +558,6 @@ static void *__dma_memcpy(void *dest, const void *src, size_t size)
bfin_write_MDMA_S0_CONFIG(0); bfin_write_MDMA_S0_CONFIG(0);
bfin_write_MDMA_D0_CONFIG(0); bfin_write_MDMA_D0_CONFIG(0);
if ((unsigned long)dest < memory_end)
blackfin_dcache_invalidate_range((unsigned int)dest,
(unsigned int)(dest + size));
local_irq_restore(flags); local_irq_restore(flags);
return dest; return dest;
...@@ -555,13 +586,14 @@ void *safe_dma_memcpy(void *dest, const void *src, size_t size) ...@@ -555,13 +586,14 @@ void *safe_dma_memcpy(void *dest, const void *src, size_t size)
} }
EXPORT_SYMBOL(safe_dma_memcpy); EXPORT_SYMBOL(safe_dma_memcpy);
void dma_outsb(void __iomem *addr, const void *buf, unsigned short len) void dma_outsb(unsigned long addr, const void *buf, unsigned short len)
{ {
unsigned long flags; unsigned long flags;
local_irq_save(flags); local_irq_save(flags);
blackfin_dcache_flush_range((unsigned int)buf, (unsigned int)(buf) + len); blackfin_dcache_flush_range((unsigned int)buf,
(unsigned int)(buf) + len);
bfin_write_MDMA_D0_START_ADDR(addr); bfin_write_MDMA_D0_START_ADDR(addr);
bfin_write_MDMA_D0_X_COUNT(len); bfin_write_MDMA_D0_X_COUNT(len);
...@@ -576,6 +608,8 @@ void dma_outsb(void __iomem *addr, const void *buf, unsigned short len) ...@@ -576,6 +608,8 @@ void dma_outsb(void __iomem *addr, const void *buf, unsigned short len)
bfin_write_MDMA_S0_CONFIG(DMAEN | WDSIZE_8); bfin_write_MDMA_S0_CONFIG(DMAEN | WDSIZE_8);
bfin_write_MDMA_D0_CONFIG(WNR | DI_EN | DMAEN | WDSIZE_8); bfin_write_MDMA_D0_CONFIG(WNR | DI_EN | DMAEN | WDSIZE_8);
SSYNC();
while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE)); while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE));
bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR); bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR);
...@@ -588,10 +622,13 @@ void dma_outsb(void __iomem *addr, const void *buf, unsigned short len) ...@@ -588,10 +622,13 @@ void dma_outsb(void __iomem *addr, const void *buf, unsigned short len)
EXPORT_SYMBOL(dma_outsb); EXPORT_SYMBOL(dma_outsb);
void dma_insb(const void __iomem *addr, void *buf, unsigned short len) void dma_insb(unsigned long addr, void *buf, unsigned short len)
{ {
unsigned long flags; unsigned long flags;
blackfin_dcache_invalidate_range((unsigned int)buf,
(unsigned int)(buf) + len);
local_irq_save(flags); local_irq_save(flags);
bfin_write_MDMA_D0_START_ADDR(buf); bfin_write_MDMA_D0_START_ADDR(buf);
bfin_write_MDMA_D0_X_COUNT(len); bfin_write_MDMA_D0_X_COUNT(len);
...@@ -606,7 +643,7 @@ void dma_insb(const void __iomem *addr, void *buf, unsigned short len) ...@@ -606,7 +643,7 @@ void dma_insb(const void __iomem *addr, void *buf, unsigned short len)
bfin_write_MDMA_S0_CONFIG(DMAEN | WDSIZE_8); bfin_write_MDMA_S0_CONFIG(DMAEN | WDSIZE_8);
bfin_write_MDMA_D0_CONFIG(WNR | DI_EN | DMAEN | WDSIZE_8); bfin_write_MDMA_D0_CONFIG(WNR | DI_EN | DMAEN | WDSIZE_8);
blackfin_dcache_invalidate_range((unsigned int)buf, (unsigned int)(buf) + len); SSYNC();
while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE)); while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE));
...@@ -619,13 +656,14 @@ void dma_insb(const void __iomem *addr, void *buf, unsigned short len) ...@@ -619,13 +656,14 @@ void dma_insb(const void __iomem *addr, void *buf, unsigned short len)
} }
EXPORT_SYMBOL(dma_insb); EXPORT_SYMBOL(dma_insb);
void dma_outsw(void __iomem *addr, const void *buf, unsigned short len) void dma_outsw(unsigned long addr, const void *buf, unsigned short len)
{ {
unsigned long flags; unsigned long flags;
local_irq_save(flags); local_irq_save(flags);
blackfin_dcache_flush_range((unsigned int)buf, (unsigned int)(buf) + len); blackfin_dcache_flush_range((unsigned int)buf,
(unsigned int)(buf) + len * sizeof(short));
bfin_write_MDMA_D0_START_ADDR(addr); bfin_write_MDMA_D0_START_ADDR(addr);
bfin_write_MDMA_D0_X_COUNT(len); bfin_write_MDMA_D0_X_COUNT(len);
...@@ -640,6 +678,8 @@ void dma_outsw(void __iomem *addr, const void *buf, unsigned short len) ...@@ -640,6 +678,8 @@ void dma_outsw(void __iomem *addr, const void *buf, unsigned short len)
bfin_write_MDMA_S0_CONFIG(DMAEN | WDSIZE_16); bfin_write_MDMA_S0_CONFIG(DMAEN | WDSIZE_16);
bfin_write_MDMA_D0_CONFIG(WNR | DI_EN | DMAEN | WDSIZE_16); bfin_write_MDMA_D0_CONFIG(WNR | DI_EN | DMAEN | WDSIZE_16);
SSYNC();
while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE)); while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE));
bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR); bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR);
...@@ -651,10 +691,13 @@ void dma_outsw(void __iomem *addr, const void *buf, unsigned short len) ...@@ -651,10 +691,13 @@ void dma_outsw(void __iomem *addr, const void *buf, unsigned short len)
} }
EXPORT_SYMBOL(dma_outsw); EXPORT_SYMBOL(dma_outsw);
void dma_insw(const void __iomem *addr, void *buf, unsigned short len) void dma_insw(unsigned long addr, void *buf, unsigned short len)
{ {
unsigned long flags; unsigned long flags;
blackfin_dcache_invalidate_range((unsigned int)buf,
(unsigned int)(buf) + len * sizeof(short));
local_irq_save(flags); local_irq_save(flags);
bfin_write_MDMA_D0_START_ADDR(buf); bfin_write_MDMA_D0_START_ADDR(buf);
...@@ -670,7 +713,7 @@ void dma_insw(const void __iomem *addr, void *buf, unsigned short len) ...@@ -670,7 +713,7 @@ void dma_insw(const void __iomem *addr, void *buf, unsigned short len)
bfin_write_MDMA_S0_CONFIG(DMAEN | WDSIZE_16); bfin_write_MDMA_S0_CONFIG(DMAEN | WDSIZE_16);
bfin_write_MDMA_D0_CONFIG(WNR | DI_EN | DMAEN | WDSIZE_16); bfin_write_MDMA_D0_CONFIG(WNR | DI_EN | DMAEN | WDSIZE_16);
blackfin_dcache_invalidate_range((unsigned int)buf, (unsigned int)(buf) + len); SSYNC();
while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE)); while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE));
...@@ -683,13 +726,14 @@ void dma_insw(const void __iomem *addr, void *buf, unsigned short len) ...@@ -683,13 +726,14 @@ void dma_insw(const void __iomem *addr, void *buf, unsigned short len)
} }
EXPORT_SYMBOL(dma_insw); EXPORT_SYMBOL(dma_insw);
void dma_outsl(void __iomem *addr, const void *buf, unsigned short len) void dma_outsl(unsigned long addr, const void *buf, unsigned short len)
{ {
unsigned long flags; unsigned long flags;
local_irq_save(flags); local_irq_save(flags);
blackfin_dcache_flush_range((unsigned int)buf, (unsigned int)(buf) + len); blackfin_dcache_flush_range((unsigned int)buf,
(unsigned int)(buf) + len * sizeof(long));
bfin_write_MDMA_D0_START_ADDR(addr); bfin_write_MDMA_D0_START_ADDR(addr);
bfin_write_MDMA_D0_X_COUNT(len); bfin_write_MDMA_D0_X_COUNT(len);
...@@ -704,6 +748,8 @@ void dma_outsl(void __iomem *addr, const void *buf, unsigned short len) ...@@ -704,6 +748,8 @@ void dma_outsl(void __iomem *addr, const void *buf, unsigned short len)
bfin_write_MDMA_S0_CONFIG(DMAEN | WDSIZE_32); bfin_write_MDMA_S0_CONFIG(DMAEN | WDSIZE_32);
bfin_write_MDMA_D0_CONFIG(WNR | DI_EN | DMAEN | WDSIZE_32); bfin_write_MDMA_D0_CONFIG(WNR | DI_EN | DMAEN | WDSIZE_32);
SSYNC();
while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE)); while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE));
bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR); bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR);
...@@ -715,10 +761,13 @@ void dma_outsl(void __iomem *addr, const void *buf, unsigned short len) ...@@ -715,10 +761,13 @@ void dma_outsl(void __iomem *addr, const void *buf, unsigned short len)
} }
EXPORT_SYMBOL(dma_outsl); EXPORT_SYMBOL(dma_outsl);
void dma_insl(const void __iomem *addr, void *buf, unsigned short len) void dma_insl(unsigned long addr, void *buf, unsigned short len)
{ {
unsigned long flags; unsigned long flags;
blackfin_dcache_invalidate_range((unsigned int)buf,
(unsigned int)(buf) + len * sizeof(long));
local_irq_save(flags); local_irq_save(flags);
bfin_write_MDMA_D0_START_ADDR(buf); bfin_write_MDMA_D0_START_ADDR(buf);
...@@ -734,7 +783,7 @@ void dma_insl(const void __iomem *addr, void *buf, unsigned short len) ...@@ -734,7 +783,7 @@ void dma_insl(const void __iomem *addr, void *buf, unsigned short len)
bfin_write_MDMA_S0_CONFIG(DMAEN | WDSIZE_32); bfin_write_MDMA_S0_CONFIG(DMAEN | WDSIZE_32);
bfin_write_MDMA_D0_CONFIG(WNR | DI_EN | DMAEN | WDSIZE_32); bfin_write_MDMA_D0_CONFIG(WNR | DI_EN | DMAEN | WDSIZE_32);
blackfin_dcache_invalidate_range((unsigned int)buf, (unsigned int)(buf) + len); SSYNC();
while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE)); while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE));
......
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...@@ -60,6 +60,7 @@ EXPORT_SYMBOL(csum_partial_copy); ...@@ -60,6 +60,7 @@ EXPORT_SYMBOL(csum_partial_copy);
* their interface isn't gonna change any time soon now, so * their interface isn't gonna change any time soon now, so
* it's OK to leave it out of version control. * it's OK to leave it out of version control.
*/ */
EXPORT_SYMBOL(strcpy);
EXPORT_SYMBOL(memcpy); EXPORT_SYMBOL(memcpy);
EXPORT_SYMBOL(memset); EXPORT_SYMBOL(memset);
EXPORT_SYMBOL(memcmp); EXPORT_SYMBOL(memcmp);
......
...@@ -21,9 +21,10 @@ ...@@ -21,9 +21,10 @@
#include <asm/cacheflush.h> #include <asm/cacheflush.h>
#include <asm/blackfin.h> #include <asm/blackfin.h>
#include <asm/cplb.h>
#include <asm/cplbinit.h> #include <asm/cplbinit.h>
#if defined(CONFIG_BLKFIN_CACHE) #if defined(CONFIG_BFIN_ICACHE)
void bfin_icache_init(void) void bfin_icache_init(void)
{ {
unsigned long *table = icplb_table; unsigned long *table = icplb_table;
...@@ -44,7 +45,7 @@ void bfin_icache_init(void) ...@@ -44,7 +45,7 @@ void bfin_icache_init(void)
} }
#endif #endif
#if defined(CONFIG_BLKFIN_DCACHE) #if defined(CONFIG_BFIN_DCACHE)
void bfin_dcache_init(void) void bfin_dcache_init(void)
{ {
unsigned long *table = dcplb_table; unsigned long *table = dcplb_table;
......
...@@ -23,6 +23,7 @@ ...@@ -23,6 +23,7 @@
#include <linux/module.h> #include <linux/module.h>
#include <asm/blackfin.h> #include <asm/blackfin.h>
#include <asm/cplb.h>
#include <asm/cplbinit.h> #include <asm/cplbinit.h>
u_long icplb_table[MAX_CPLBS+1]; u_long icplb_table[MAX_CPLBS+1];
...@@ -56,7 +57,7 @@ struct s_cplb { ...@@ -56,7 +57,7 @@ struct s_cplb {
struct cplb_tab switch_d; struct cplb_tab switch_d;
}; };
#if defined(CONFIG_BLKFIN_DCACHE) || defined(CONFIG_BLKFIN_CACHE) #if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE)
static struct cplb_desc cplb_data[] = { static struct cplb_desc cplb_data[] = {
{ {
.start = 0, .start = 0,
...@@ -230,8 +231,8 @@ static void __fill_code_cplbtab(struct cplb_tab *t, int i, u32 a_start, u32 a_en ...@@ -230,8 +231,8 @@ static void __fill_code_cplbtab(struct cplb_tab *t, int i, u32 a_start, u32 a_en
cplb_data[i].psize, cplb_data[i].psize,
cplb_data[i].i_conf); cplb_data[i].i_conf);
} else { } else {
#if (defined(CONFIG_BLKFIN_CACHE) && defined(ANOMALY_05000263)) #if defined(CONFIG_BFIN_ICACHE)
if (i == SDRAM_KERN) { if (ANOMALY_05000263 && i == SDRAM_KERN) {
fill_cplbtab(t, fill_cplbtab(t,
cplb_data[i].start, cplb_data[i].start,
cplb_data[i].end, cplb_data[i].end,
......
/*
* File: arch/blackfin/kernel/early_printk.c
* Based on: arch/x86_64/kernel/early_printk.c
* Author: Robin Getz <rgetz@blackfin.uclinux.org
*
* Created: 14Aug2007
* Description: allow a console to be used for early printk
*
* Modified:
* Copyright 2004-2007 Analog Devices Inc.
*
* Bugs: Enter bugs at http://blackfin.uclinux.org/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/serial_core.h>
#include <linux/console.h>
#include <linux/string.h>
#include <asm/blackfin.h>
#include <asm/irq_handler.h>
#include <asm/early_printk.h>
#ifdef CONFIG_SERIAL_BFIN
extern struct console *bfin_earlyserial_init(unsigned int port,
unsigned int cflag);
#endif
static struct console *early_console;
/* Default console */
#define DEFAULT_PORT 0
#define DEFAULT_CFLAG CS8|B57600
/* Default console for early crashes */
#define DEFAULT_EARLY_PORT "serial,uart0,57600"
#ifdef CONFIG_SERIAL_CORE
/* What should get here is "0,57600" */
static struct console * __init earlyserial_init(char *buf)
{
int baud, bit;
char parity;
unsigned int serial_port = DEFAULT_PORT;
unsigned int cflag = DEFAULT_CFLAG;
serial_port = simple_strtoul(buf, &buf, 10);
buf++;
cflag = 0;
baud = simple_strtoul(buf, &buf, 10);
switch (baud) {
case 1200:
cflag |= B1200;
break;
case 2400:
cflag |= B2400;
break;
case 4800:
cflag |= B4800;
break;
case 9600:
cflag |= B9600;
break;
case 19200:
cflag |= B19200;
break;
case 38400:
cflag |= B38400;
break;
case 115200:
cflag |= B115200;
break;
default:
cflag |= B57600;
}
parity = buf[0];
buf++;
switch (parity) {
case 'e':
cflag |= PARENB;
break;
case 'o':
cflag |= PARODD;
break;
}
bit = simple_strtoul(buf, &buf, 10);
switch (bit) {
case 5:
cflag |= CS5;
break;
case 6:
cflag |= CS5;
break;
case 7:
cflag |= CS5;
break;
default:
cflag |= CS8;
}
#ifdef CONFIG_SERIAL_BFIN
return bfin_earlyserial_init(serial_port, cflag);
#else
return NULL;
#endif
}
#endif
int __init setup_early_printk(char *buf)
{
/* Crashing in here would be really bad, so check both the var
and the pointer before we start using it
*/
if (!buf)
return 0;
if (!*buf)
return 0;
if (early_console != NULL)
return 0;
#ifdef CONFIG_SERIAL_BFIN
/* Check for Blackfin Serial */
if (!strncmp(buf, "serial,uart", 11)) {
buf += 11;
early_console = earlyserial_init(buf);
}
#endif
#ifdef CONFIG_FB
/* TODO: add framebuffer console support */
#endif
if (likely(early_console)) {
early_console->flags |= CON_BOOT;
register_console(early_console);
printk(KERN_INFO "early printk enabled on %s%d\n",
early_console->name,
early_console->index);
}
return 0;
}
/*
* Set up a temporary Event Vector Table, so if something bad happens before
* the kernel is fully started, it doesn't vector off into somewhere we don't
* know
*/
asmlinkage void __init init_early_exception_vectors(void)
{
SSYNC();
/* cannot program in software:
* evt0 - emulation (jtag)
* evt1 - reset
*/
bfin_write_EVT2(early_trap);
bfin_write_EVT3(early_trap);
bfin_write_EVT5(early_trap);
bfin_write_EVT6(early_trap);
bfin_write_EVT7(early_trap);
bfin_write_EVT8(early_trap);
bfin_write_EVT9(early_trap);
bfin_write_EVT10(early_trap);
bfin_write_EVT11(early_trap);
bfin_write_EVT12(early_trap);
bfin_write_EVT13(early_trap);
bfin_write_EVT14(early_trap);
bfin_write_EVT15(early_trap);
CSYNC();
/* Set all the return from interupt, exception, NMI to a known place
* so if we do a RETI, RETX or RETN by mistake - we go somewhere known
* Note - don't change RETS - we are in a subroutine, or
* RETE - since it might screw up if emulator is attached
*/
asm("\tRETI = %0; RETX = %0; RETN = %0;\n"
: : "p"(early_trap));
}
asmlinkage void __init early_trap_c(struct pt_regs *fp, void *retaddr)
{
/* This can happen before the uart is initialized, so initialize
* the UART now
*/
if (likely(early_console == NULL))
setup_early_printk(DEFAULT_EARLY_PORT);
dump_bfin_regs(fp, retaddr);
dump_bfin_trace_buffer();
panic("Died early");
}
early_param("earlyprintk", setup_early_printk);
...@@ -34,6 +34,7 @@ ...@@ -34,6 +34,7 @@
#include <linux/kallsyms.h> #include <linux/kallsyms.h>
#include <linux/interrupt.h> #include <linux/interrupt.h>
#include <linux/irq.h> #include <linux/irq.h>
#include <asm/trace.h>
static unsigned long irq_err_count; static unsigned long irq_err_count;
static spinlock_t irq_controller_lock; static spinlock_t irq_controller_lock;
...@@ -97,9 +98,8 @@ int show_interrupts(struct seq_file *p, void *v) ...@@ -97,9 +98,8 @@ int show_interrupts(struct seq_file *p, void *v)
*/ */
#ifdef CONFIG_DO_IRQ_L1 #ifdef CONFIG_DO_IRQ_L1
asmlinkage void asm_do_IRQ(unsigned int irq, struct pt_regs *regs)__attribute__((l1_text)); __attribute__((l1_text))
#endif #endif
asmlinkage void asm_do_IRQ(unsigned int irq, struct pt_regs *regs) asmlinkage void asm_do_IRQ(unsigned int irq, struct pt_regs *regs)
{ {
struct pt_regs *old_regs; struct pt_regs *old_regs;
...@@ -144,4 +144,12 @@ void __init init_IRQ(void) ...@@ -144,4 +144,12 @@ void __init init_IRQ(void)
} }
init_arch_irq(); init_arch_irq();
#ifdef CONFIG_DEBUG_BFIN_HWTRACE_EXPAND
/* Now that evt_ivhw is set up, turn this on */
trace_buff_offset = 0;
bfin_write_TBUFCTL(BFIN_TRACE_ON);
printk(KERN_INFO "Hardware Trace expanded to %ik\n",
1 << CONFIG_DEBUG_BFIN_HWTRACE_EXPAND_LEN);
#endif
} }
...@@ -134,31 +134,6 @@ void cpu_idle(void) ...@@ -134,31 +134,6 @@ void cpu_idle(void)
} }
} }
void machine_restart(char *__unused)
{
#if defined(CONFIG_BLKFIN_CACHE)
bfin_write_IMEM_CONTROL(0x01);
SSYNC();
#endif
bfin_reset();
/* Dont do anything till the reset occurs */
while (1) {
SSYNC();
}
}
void machine_halt(void)
{
for (;;)
asm volatile ("idle");
}
void machine_power_off(void)
{
for (;;)
asm volatile ("idle");
}
void show_regs(struct pt_regs *regs) void show_regs(struct pt_regs *regs)
{ {
printk(KERN_NOTICE "\n"); printk(KERN_NOTICE "\n");
...@@ -420,7 +395,8 @@ void finish_atomic_sections (struct pt_regs *regs) ...@@ -420,7 +395,8 @@ void finish_atomic_sections (struct pt_regs *regs)
#if defined(CONFIG_ACCESS_CHECK) #if defined(CONFIG_ACCESS_CHECK)
int _access_ok(unsigned long addr, unsigned long size) int _access_ok(unsigned long addr, unsigned long size)
{ {
if (size == 0)
return 1;
if (addr > (addr + size)) if (addr > (addr + size))
return 0; return 0;
if (segment_eq(get_fs(), KERNEL_DS)) if (segment_eq(get_fs(), KERNEL_DS))
......
...@@ -44,6 +44,7 @@ ...@@ -44,6 +44,7 @@
#include <asm/processor.h> #include <asm/processor.h>
#include <asm/asm-offsets.h> #include <asm/asm-offsets.h>
#include <asm/dma.h> #include <asm/dma.h>
#include <asm/fixed_code.h>
#define MAX_SHARED_LIBS 3 #define MAX_SHARED_LIBS 3
#define TEXT_OFFSET 0 #define TEXT_OFFSET 0
...@@ -169,6 +170,9 @@ static inline int is_user_addr_valid(struct task_struct *child, ...@@ -169,6 +170,9 @@ static inline int is_user_addr_valid(struct task_struct *child,
&& start + len <= (unsigned long)sraml->addr + sraml->length) && start + len <= (unsigned long)sraml->addr + sraml->length)
return 0; return 0;
if (start >= FIXED_CODE_START && start + len <= FIXED_CODE_END)
return 0;
return -EIO; return -EIO;
} }
...@@ -215,9 +219,13 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) ...@@ -215,9 +219,13 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
copied = sizeof(tmp); copied = sizeof(tmp);
} else } else
#endif #endif
copied = if (addr + add >= FIXED_CODE_START
access_process_vm(child, addr + add, &tmp, && addr + add + sizeof(tmp) <= FIXED_CODE_END) {
sizeof(tmp), 0); memcpy(&tmp, (const void *)(addr + add), sizeof(tmp));
copied = sizeof(tmp);
} else
copied = access_process_vm(child, addr + add, &tmp,
sizeof(tmp), 0);
pr_debug("ptrace: copied size %d [0x%08lx]\n", copied, tmp); pr_debug("ptrace: copied size %d [0x%08lx]\n", copied, tmp);
if (copied != sizeof(tmp)) if (copied != sizeof(tmp))
break; break;
...@@ -281,9 +289,13 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) ...@@ -281,9 +289,13 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
copied = sizeof(data); copied = sizeof(data);
} else } else
#endif #endif
copied = if (addr + add >= FIXED_CODE_START
access_process_vm(child, addr + add, &data, && addr + add + sizeof(data) <= FIXED_CODE_END) {
sizeof(data), 1); memcpy((void *)(addr + add), &data, sizeof(data));
copied = sizeof(data);
} else
copied = access_process_vm(child, addr + add, &data,
sizeof(data), 1);
pr_debug("ptrace: copied size %d\n", copied); pr_debug("ptrace: copied size %d\n", copied);
if (copied != sizeof(data)) if (copied != sizeof(data))
break; break;
......
/*
* arch/blackfin/kernel/reboot.c - handle shutdown/reboot
*
* Copyright 2004-2007 Analog Devices Inc.
*
* Licensed under the GPL-2 or later.
*/
#include <linux/interrupt.h>
#include <asm/bfin-global.h>
#include <asm/reboot.h>
#include <asm/system.h>
#if defined(BF537_FAMILY) || defined(BF533_FAMILY)
#define SYSCR_VAL 0x0
#elif defined(BF561_FAMILY)
#define SYSCR_VAL 0x20
#elif defined(BF548_FAMILY)
#define SYSCR_VAL 0x10
#endif
/* A system soft reset makes external memory unusable
* so force this function into L1.
*/
__attribute__((l1_text))
void bfin_reset(void)
{
/* force BMODE and disable Core B (as needed) */
bfin_write_SYSCR(SYSCR_VAL);
/* we use asm ssync here because it's save and we save some L1 */
asm("ssync;");
while (1) {
/* initiate system soft reset with magic 0x7 */
bfin_write_SWRST(0x7);
asm("ssync;");
/* clear system soft reset */
bfin_write_SWRST(0);
asm("ssync;");
/* issue core reset */
asm("raise 1");
}
}
__attribute__((weak))
void native_machine_restart(char *cmd)
{
}
void machine_restart(char *cmd)
{
native_machine_restart(cmd);
local_irq_disable();
bfin_reset();
}
__attribute__((weak))
void native_machine_halt(void)
{
idle_with_irq_disabled();
}
void machine_halt(void)
{
native_machine_halt();
}
__attribute__((weak))
void native_machine_power_off(void)
{
idle_with_irq_disabled();
}
void machine_power_off(void)
{
native_machine_power_off();
}
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...@@ -61,7 +61,7 @@ ENTRY(_memcmp) ...@@ -61,7 +61,7 @@ ENTRY(_memcmp)
LSETUP (.Lquad_loop_s, .Lquad_loop_e) LC0=P1; LSETUP (.Lquad_loop_s, .Lquad_loop_e) LC0=P1;
.Lquad_loop_s: .Lquad_loop_s:
#ifdef ANOMALY_05000202 #if ANOMALY_05000202
R0 = [P0++]; R0 = [P0++];
R1 = [I0++]; R1 = [I0++];
#else #else
......
...@@ -98,7 +98,7 @@ ENTRY(_memcpy) ...@@ -98,7 +98,7 @@ ENTRY(_memcpy)
R0 = R1; R0 = R1;
I1 = P1; I1 = P1;
R3 = [I1++]; R3 = [I1++];
#ifdef ANOMALY_05000202 #if ANOMALY_05000202
.Lword_loops: .Lword_loops:
[P0++] = R3; [P0++] = R3;
.Lword_loope: .Lword_loope:
......
...@@ -70,7 +70,7 @@ ENTRY(_memmove) ...@@ -70,7 +70,7 @@ ENTRY(_memmove)
R1 = [I0++]; R1 = [I0++];
LSETUP (.Lquad_loops, .Lquad_loope) LC0=P1; LSETUP (.Lquad_loops, .Lquad_loope) LC0=P1;
#ifdef ANOMALY_05000202 #if ANOMALY_05000202
.Lquad_loops: .Lquad_loops:
[P0++] = R1; [P0++] = R1;
.Lquad_loope: .Lquad_loope:
...@@ -102,7 +102,7 @@ ENTRY(_memmove) ...@@ -102,7 +102,7 @@ ENTRY(_memmove)
R1 = B[P3--] (Z); R1 = B[P3--] (Z);
CC = P2 == 0; CC = P2 == 0;
IF CC JUMP .Lno_loop; IF CC JUMP .Lno_loop;
#ifdef ANOMALY_05000245 #if ANOMALY_05000245
NOP; NOP;
NOP; NOP;
#endif #endif
......
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...@@ -2,33 +2,6 @@ if (BF537 || BF534 || BF536) ...@@ -2,33 +2,6 @@ if (BF537 || BF534 || BF536)
menu "BF537 Specific Configuration" menu "BF537 Specific Configuration"
comment "PORT F/G Selection"
choice
prompt "Select BF537/6/4 default GPIO PFx PORTx"
help
Quick Hack for BF537/6/4 default GPIO PFx PORTF.
config BF537_PORT_F
bool "Select BF537/6/4 default GPIO PFx PORTF"
depends on (BF537 || BF536 || BF534)
help
Quick Hack for BF537/6/4 default GPIO PFx PORTF.
config BF537_PORT_G
bool "Select BF537/6/4 default GPIO PFx PORTG"
depends on (BF537 || BF536 || BF534)
help
Quick Hack for BF537/6/4 default GPIO PFx PORTG.
config BF537_PORT_H
bool "Select BF537/6/4 default GPIO PFx PORTH"
depends on (BF537 || BF536 || BF534)
help
Quick Hack for BF537/6/4 default GPIO PFx PORTH
Use only when Blackfin EMAC support is not required.
endchoice
comment "Interrupt Priority Assignment" comment "Interrupt Priority Assignment"
menu "Priority" menu "Priority"
......
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...@@ -2,6 +2,13 @@ if (BF54x) ...@@ -2,6 +2,13 @@ if (BF54x)
menu "BF548 Specific Configuration" menu "BF548 Specific Configuration"
config DEB_DMA_URGENT
bool "DMA has priority over core for ext. accesses"
depends on BF54x
default n
help
Treat any DEB1, DEB2 and DEB3 request as Urgent
comment "Interrupt Priority Assignment" comment "Interrupt Priority Assignment"
menu "Priority" menu "Priority"
...@@ -282,7 +289,7 @@ menu "Assignment" ...@@ -282,7 +289,7 @@ menu "Assignment"
config PINTx_REASSIGN config PINTx_REASSIGN
bool "Reprogram PINT Assignment" bool "Reprogram PINT Assignment"
default n default y
help help
The interrupt assignment registers controls the pin-to-interrupt The interrupt assignment registers controls the pin-to-interrupt
assignment in a byte-wide manner. Each option allows you to select assignment in a byte-wide manner. Each option allows you to select
...@@ -303,7 +310,7 @@ config PINT1_ASSIGN ...@@ -303,7 +310,7 @@ config PINT1_ASSIGN
config PINT2_ASSIGN config PINT2_ASSIGN
hex "PINT2_ASSIGN" hex "PINT2_ASSIGN"
depends on PINTx_REASSIGN depends on PINTx_REASSIGN
default 0x00000101 default 0x07000101
config PINT3_ASSIGN config PINT3_ASSIGN
hex "PINT3_ASSIGN" hex "PINT3_ASSIGN"
depends on PINTx_REASSIGN depends on PINTx_REASSIGN
......
...@@ -4,6 +4,6 @@ ...@@ -4,6 +4,6 @@
extra-y := head.o extra-y := head.o
obj-y := ints-priority.o dma.o gpio.o obj-y := ints-priority.o dma.o
obj-$(CONFIG_CPU_FREQ) += cpu.o obj-$(CONFIG_CPU_FREQ) += cpu.o
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...@@ -179,5 +179,6 @@ enum regnames { ...@@ -179,5 +179,6 @@ enum regnames {
#define STATDA1 0x80 #define STATDA1 0x80
extern void kgdb_print(const char *fmt, ...); extern void kgdb_print(const char *fmt, ...);
extern void init_kgdb_uart(void);
#endif #endif
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