Commit 1fe40618 authored by Arnd Bergmann's avatar Arnd Bergmann

Merge tag 'omap-cleanup-for-v3.6' of...

Merge tag 'omap-cleanup-for-v3.6' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/cleanup

From Tony Lindgren <tony@atomide.com>

Here is some more omap clean-up. The biggest changes are
hwmod, clock, and System Control Module cleanup, and the removal
of the last instance of omap_read/write usage for omap2+ with
the removal of unused USB OHCI Full Speed driver support. The
removed OHCI is only currently used for omap1 as the actively
used omap2+ boards have either MUSB or another instance of
OHCI+EHCI that's more usable.

* tag 'omap-cleanup-for-v3.6' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: OMAP2+: hwmod: remove prm_clkdm, cm_clkdm; allow hwmods to have no clockdomain
  ARM: OMAP3: Move McBSP fck clock alias to hwmod data
  ARM: OMAP2: Move McBSP fck clock alias to hwmod data for OMAP2430
  ARM: OMAP2: Move McBSP fck clock alias to hwmod data for OMAP2420
  ARM: OMAP: dsp: interface to control module functions
  ARM: OMAP2+: control: new APIs to configure boot address and mode
  ARM: OMAP2+: CLEANUP: Remove ARCH_OMAPx ifdef from struct dpll_data
  ARM: OMAP2+: hwmod: use init-time function pointer for _init_clkdm
  ARM: OMAP2+: hwmod: use init-time function pointer for hardreset
  ARM: OMAP2+: hwmod: use init-time function pointer for wait_target_ready
  ARM: OMAP4: hwmod: drop extra cpu_is check from _wait_target_disable()
  ARM: OMAP2+: hwmod: use init-time function ptrs for enable/disable module
  ARM: OMAP4: hwmod: rename _enable_module to _omap4_enable_module()
  ARM: OMAP: Make FS USB omap1 only
  ARM: OMAP2: Remove legacy USB FS support
  ARM: OMAP3: There is no FS USB controller on omap3
  ARM: OMAP: dma: Clear status registers on enable/disable irq
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents df7cb455 472fd540
......@@ -37,12 +37,12 @@
#include <plat/board-ams-delta.h>
#include <plat/keypad.h>
#include <plat/mux.h>
#include <plat/usb.h>
#include <plat/board.h>
#include <mach/hardware.h>
#include <mach/ams-delta-fiq.h>
#include <mach/camera.h>
#include <mach/usb.h>
#include "iomap.h"
#include "common.h"
......
......@@ -23,8 +23,10 @@
#include <asm/mach/map.h>
#include <plat/mux.h>
#include <plat/usb.h>
#include <plat/board.h>
#include <mach/usb.h>
#include "common.h"
/* assume no Mini-AB port */
......
......@@ -40,11 +40,11 @@
#include <plat/dma.h>
#include <plat/tc.h>
#include <plat/irda.h>
#include <plat/usb.h>
#include <plat/keypad.h>
#include <plat/flash.h>
#include <mach/hardware.h>
#include <mach/usb.h>
#include "common.h"
#include "board-h2.h"
......
......@@ -40,13 +40,13 @@
#include <plat/mux.h>
#include <plat/tc.h>
#include <plat/usb.h>
#include <plat/keypad.h>
#include <plat/dma.h>
#include <plat/flash.h>
#include <mach/hardware.h>
#include <mach/irqs.h>
#include <mach/usb.h>
#include "common.h"
#include "board-h3.h"
......
......@@ -44,10 +44,10 @@
#include <plat/omap7xx.h>
#include <plat/board.h>
#include <plat/keypad.h>
#include <plat/usb.h>
#include <plat/mmc.h>
#include <mach/irqs.h>
#include <mach/usb.h>
#include "common.h"
......
......@@ -35,11 +35,11 @@
#include <plat/flash.h>
#include <plat/fpga.h>
#include <plat/tc.h>
#include <plat/usb.h>
#include <plat/keypad.h>
#include <plat/mmc.h>
#include <mach/hardware.h>
#include <mach/usb.h>
#include "iomap.h"
#include "common.h"
......
......@@ -26,7 +26,6 @@
#include <asm/mach/map.h>
#include <plat/mux.h>
#include <plat/usb.h>
#include <plat/board.h>
#include <plat/keypad.h>
#include <plat/lcd_mipid.h>
......@@ -34,6 +33,7 @@
#include <plat/clock.h>
#include <mach/hardware.h>
#include <mach/usb.h>
#include "common.h"
......
......@@ -45,11 +45,11 @@
#include <asm/mach/map.h>
#include <plat/flash.h>
#include <plat/usb.h>
#include <plat/mux.h>
#include <plat/tc.h>
#include <mach/hardware.h>
#include <mach/usb.h>
#include "common.h"
......
......@@ -35,7 +35,6 @@
#include <plat/flash.h>
#include <plat/mux.h>
#include <plat/usb.h>
#include <plat/tc.h>
#include <plat/dma.h>
#include <plat/board.h>
......@@ -43,6 +42,7 @@
#include <plat/keypad.h>
#include <mach/hardware.h>
#include <mach/usb.h>
#include "common.h"
......
......@@ -35,7 +35,6 @@
#include <plat/led.h>
#include <plat/flash.h>
#include <plat/mux.h>
#include <plat/usb.h>
#include <plat/dma.h>
#include <plat/tc.h>
#include <plat/board.h>
......@@ -43,6 +42,7 @@
#include <plat/keypad.h>
#include <mach/hardware.h>
#include <mach/usb.h>
#include "common.h"
......
......@@ -37,7 +37,6 @@
#include <plat/flash.h>
#include <plat/mux.h>
#include <plat/usb.h>
#include <plat/dma.h>
#include <plat/tc.h>
#include <plat/board.h>
......@@ -45,6 +44,7 @@
#include <plat/keypad.h>
#include <mach/hardware.h>
#include <mach/usb.h>
#include "common.h"
......
......@@ -37,13 +37,13 @@
#include <plat/mux.h>
#include <plat/dma.h>
#include <plat/irda.h>
#include <plat/usb.h>
#include <plat/tc.h>
#include <plat/board.h>
#include <plat/keypad.h>
#include <plat/board-sx1.h>
#include <mach/hardware.h>
#include <mach/usb.h>
#include "common.h"
......
......@@ -35,9 +35,10 @@
#include <plat/flash.h>
#include <plat/mux.h>
#include <plat/tc.h>
#include <plat/usb.h>
#include <plat/board.h>
#include <mach/hardware.h>
#include <mach/usb.h>
#include "common.h"
......
......@@ -25,10 +25,11 @@
#include <plat/clock.h>
#include <plat/cpu.h>
#include <plat/clkdev_omap.h>
#include <plat/board.h>
#include <plat/sram.h> /* for omap_sram_reprogram_clock() */
#include <plat/usb.h> /* for OTG_BASE */
#include <mach/hardware.h>
#include <mach/usb.h> /* for OTG_BASE */
#include "iomap.h"
#include "clock.h"
......
/*
* FIXME correct answer depends on hmc_mode,
* as does (on omap1) any nonzero value for config->otg port number
*/
#ifdef CONFIG_USB_GADGET_OMAP
#define is_usb0_device(config) 1
#else
#define is_usb0_device(config) 0
#endif
struct omap_usb_config {
/* Configure drivers according to the connectors on your board:
* - "A" connector (rectagular)
* ... for host/OHCI use, set "register_host".
* - "B" connector (squarish) or "Mini-B"
* ... for device/gadget use, set "register_dev".
* - "Mini-AB" connector (very similar to Mini-B)
* ... for OTG use as device OR host, initialize "otg"
*/
unsigned register_host:1;
unsigned register_dev:1;
u8 otg; /* port number, 1-based: usb1 == 2 */
u8 hmc_mode;
/* implicitly true if otg: host supports remote wakeup? */
u8 rwc;
/* signaling pins used to talk to transceiver on usbN:
* 0 == usbN unused
* 2 == usb0-only, using internal transceiver
* 3 == 3 wire bidirectional
* 4 == 4 wire bidirectional
* 6 == 6 wire unidirectional (or TLL)
*/
u8 pins[3];
struct platform_device *udc_device;
struct platform_device *ohci_device;
struct platform_device *otg_device;
u32 (*usb0_init)(unsigned nwires, unsigned is_device);
u32 (*usb1_init)(unsigned nwires);
u32 (*usb2_init)(unsigned nwires, unsigned alt_pingroup);
int (*ocpi_enable)(void);
};
void omap_otg_init(struct omap_usb_config *config);
#if defined(CONFIG_USB) || defined(CONFIG_USB_MODULE)
void omap1_usb_init(struct omap_usb_config *pdata);
#else
static inline void omap1_usb_init(struct omap_usb_config *pdata)
{
}
#endif
#define OMAP1_OTG_BASE 0xfffb0400
#define OMAP1_UDC_BASE 0xfffb4000
#define OMAP1_OHCI_BASE 0xfffba000
#define OMAP2_OHCI_BASE 0x4805e000
#define OMAP2_UDC_BASE 0x4805e200
#define OMAP2_OTG_BASE 0x4805e300
#define OTG_BASE OMAP1_OTG_BASE
#define UDC_BASE OMAP1_UDC_BASE
#define OMAP_OHCI_BASE OMAP1_OHCI_BASE
/*
* OTG and transceiver registers, for OMAPs starting with ARM926
*/
#define OTG_REV (OTG_BASE + 0x00)
#define OTG_SYSCON_1 (OTG_BASE + 0x04)
# define USB2_TRX_MODE(w) (((w)>>24)&0x07)
# define USB1_TRX_MODE(w) (((w)>>20)&0x07)
# define USB0_TRX_MODE(w) (((w)>>16)&0x07)
# define OTG_IDLE_EN (1 << 15)
# define HST_IDLE_EN (1 << 14)
# define DEV_IDLE_EN (1 << 13)
# define OTG_RESET_DONE (1 << 2)
# define OTG_SOFT_RESET (1 << 1)
#define OTG_SYSCON_2 (OTG_BASE + 0x08)
# define OTG_EN (1 << 31)
# define USBX_SYNCHRO (1 << 30)
# define OTG_MST16 (1 << 29)
# define SRP_GPDATA (1 << 28)
# define SRP_GPDVBUS (1 << 27)
# define SRP_GPUVBUS(w) (((w)>>24)&0x07)
# define A_WAIT_VRISE(w) (((w)>>20)&0x07)
# define B_ASE_BRST(w) (((w)>>16)&0x07)
# define SRP_DPW (1 << 14)
# define SRP_DATA (1 << 13)
# define SRP_VBUS (1 << 12)
# define OTG_PADEN (1 << 10)
# define HMC_PADEN (1 << 9)
# define UHOST_EN (1 << 8)
# define HMC_TLLSPEED (1 << 7)
# define HMC_TLLATTACH (1 << 6)
# define OTG_HMC(w) (((w)>>0)&0x3f)
#define OTG_CTRL (OTG_BASE + 0x0c)
# define OTG_USB2_EN (1 << 29)
# define OTG_USB2_DP (1 << 28)
# define OTG_USB2_DM (1 << 27)
# define OTG_USB1_EN (1 << 26)
# define OTG_USB1_DP (1 << 25)
# define OTG_USB1_DM (1 << 24)
# define OTG_USB0_EN (1 << 23)
# define OTG_USB0_DP (1 << 22)
# define OTG_USB0_DM (1 << 21)
# define OTG_ASESSVLD (1 << 20)
# define OTG_BSESSEND (1 << 19)
# define OTG_BSESSVLD (1 << 18)
# define OTG_VBUSVLD (1 << 17)
# define OTG_ID (1 << 16)
# define OTG_DRIVER_SEL (1 << 15)
# define OTG_A_SETB_HNPEN (1 << 12)
# define OTG_A_BUSREQ (1 << 11)
# define OTG_B_HNPEN (1 << 9)
# define OTG_B_BUSREQ (1 << 8)
# define OTG_BUSDROP (1 << 7)
# define OTG_PULLDOWN (1 << 5)
# define OTG_PULLUP (1 << 4)
# define OTG_DRV_VBUS (1 << 3)
# define OTG_PD_VBUS (1 << 2)
# define OTG_PU_VBUS (1 << 1)
# define OTG_PU_ID (1 << 0)
#define OTG_IRQ_EN (OTG_BASE + 0x10) /* 16-bit */
# define DRIVER_SWITCH (1 << 15)
# define A_VBUS_ERR (1 << 13)
# define A_REQ_TMROUT (1 << 12)
# define A_SRP_DETECT (1 << 11)
# define B_HNP_FAIL (1 << 10)
# define B_SRP_TMROUT (1 << 9)
# define B_SRP_DONE (1 << 8)
# define B_SRP_STARTED (1 << 7)
# define OPRT_CHG (1 << 0)
#define OTG_IRQ_SRC (OTG_BASE + 0x14) /* 16-bit */
// same bits as in IRQ_EN
#define OTG_OUTCTRL (OTG_BASE + 0x18) /* 16-bit */
# define OTGVPD (1 << 14)
# define OTGVPU (1 << 13)
# define OTGPUID (1 << 12)
# define USB2VDR (1 << 10)
# define USB2PDEN (1 << 9)
# define USB2PUEN (1 << 8)
# define USB1VDR (1 << 6)
# define USB1PDEN (1 << 5)
# define USB1PUEN (1 << 4)
# define USB0VDR (1 << 2)
# define USB0PDEN (1 << 1)
# define USB0PUEN (1 << 0)
#define OTG_TEST (OTG_BASE + 0x20) /* 16-bit */
#define OTG_VENDOR_CODE (OTG_BASE + 0xfc) /* 16-bit */
/*-------------------------------------------------------------------------*/
/* OMAP1 */
#define USB_TRANSCEIVER_CTRL (0xfffe1000 + 0x0064)
# define CONF_USB2_UNI_R (1 << 8)
# define CONF_USB1_UNI_R (1 << 7)
# define CONF_USB_PORT0_R(x) (((x)>>4)&0x7)
# define CONF_USB0_ISOLATE_R (1 << 3)
# define CONF_USB_PWRDN_DM_R (1 << 2)
# define CONF_USB_PWRDN_DP_R (1 << 1)
......@@ -27,7 +27,8 @@
#include <asm/irq.h>
#include <plat/mux.h>
#include <plat/usb.h>
#include <mach/usb.h>
#include "common.h"
......@@ -55,6 +56,119 @@
#define INT_USB_IRQ_HGEN INT_USB_HHC_1
#define INT_USB_IRQ_OTG IH2_BASE + 8
#ifdef CONFIG_ARCH_OMAP_OTG
void __init
omap_otg_init(struct omap_usb_config *config)
{
u32 syscon;
int alt_pingroup = 0;
/* NOTE: no bus or clock setup (yet?) */
syscon = omap_readl(OTG_SYSCON_1) & 0xffff;
if (!(syscon & OTG_RESET_DONE))
pr_debug("USB resets not complete?\n");
//omap_writew(0, OTG_IRQ_EN);
/* pin muxing and transceiver pinouts */
if (config->pins[0] > 2) /* alt pingroup 2 */
alt_pingroup = 1;
syscon |= config->usb0_init(config->pins[0], is_usb0_device(config));
syscon |= config->usb1_init(config->pins[1]);
syscon |= config->usb2_init(config->pins[2], alt_pingroup);
pr_debug("OTG_SYSCON_1 = %08x\n", omap_readl(OTG_SYSCON_1));
omap_writel(syscon, OTG_SYSCON_1);
syscon = config->hmc_mode;
syscon |= USBX_SYNCHRO | (4 << 16) /* B_ASE0_BRST */;
#ifdef CONFIG_USB_OTG
if (config->otg)
syscon |= OTG_EN;
#endif
if (cpu_class_is_omap1())
pr_debug("USB_TRANSCEIVER_CTRL = %03x\n",
omap_readl(USB_TRANSCEIVER_CTRL));
pr_debug("OTG_SYSCON_2 = %08x\n", omap_readl(OTG_SYSCON_2));
omap_writel(syscon, OTG_SYSCON_2);
printk("USB: hmc %d", config->hmc_mode);
if (!alt_pingroup)
printk(", usb2 alt %d wires", config->pins[2]);
else if (config->pins[0])
printk(", usb0 %d wires%s", config->pins[0],
is_usb0_device(config) ? " (dev)" : "");
if (config->pins[1])
printk(", usb1 %d wires", config->pins[1]);
if (!alt_pingroup && config->pins[2])
printk(", usb2 %d wires", config->pins[2]);
if (config->otg)
printk(", Mini-AB on usb%d", config->otg - 1);
printk("\n");
if (cpu_class_is_omap1()) {
u16 w;
/* leave USB clocks/controllers off until needed */
w = omap_readw(ULPD_SOFT_REQ);
w &= ~SOFT_USB_CLK_REQ;
omap_writew(w, ULPD_SOFT_REQ);
w = omap_readw(ULPD_CLOCK_CTRL);
w &= ~USB_MCLK_EN;
w |= DIS_USB_PVCI_CLK;
omap_writew(w, ULPD_CLOCK_CTRL);
}
syscon = omap_readl(OTG_SYSCON_1);
syscon |= HST_IDLE_EN|DEV_IDLE_EN|OTG_IDLE_EN;
#ifdef CONFIG_USB_GADGET_OMAP
if (config->otg || config->register_dev) {
struct platform_device *udc_device = config->udc_device;
int status;
syscon &= ~DEV_IDLE_EN;
udc_device->dev.platform_data = config;
status = platform_device_register(udc_device);
if (status)
pr_debug("can't register UDC device, %d\n", status);
}
#endif
#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
if (config->otg || config->register_host) {
struct platform_device *ohci_device = config->ohci_device;
int status;
syscon &= ~HST_IDLE_EN;
ohci_device->dev.platform_data = config;
status = platform_device_register(ohci_device);
if (status)
pr_debug("can't register OHCI device, %d\n", status);
}
#endif
#ifdef CONFIG_USB_OTG
if (config->otg) {
struct platform_device *otg_device = config->otg_device;
int status;
syscon &= ~OTG_IDLE_EN;
otg_device->dev.platform_data = config;
status = platform_device_register(otg_device);
if (status)
pr_debug("can't register OTG device, %d\n", status);
}
#endif
pr_debug("OTG_SYSCON_1 = %08x\n", omap_readl(OTG_SYSCON_1));
omap_writel(syscon, OTG_SYSCON_1);
}
#else
void omap_otg_init(struct omap_usb_config *config) {}
#endif
#ifdef CONFIG_USB_GADGET_OMAP
static struct resource udc_resources[] = {
......
......@@ -64,19 +64,16 @@ config SOC_OMAP2420
depends on ARCH_OMAP2
default y
select OMAP_DM_TIMER
select ARCH_OMAP_OTG
config SOC_OMAP2430
bool "OMAP2430 support"
depends on ARCH_OMAP2
default y
select ARCH_OMAP_OTG
config SOC_OMAP3430
bool "OMAP3430 support"
depends on ARCH_OMAP3
default y
select ARCH_OMAP_OTG
config SOC_TI81XX
bool "TI81XX support"
......
......@@ -116,7 +116,6 @@ obj-$(CONFIG_ARCH_OMAP4) += powerdomains44xx_data.o
# PRCM clockdomain control
clockdomain-common += clockdomain.o
clockdomain-common += clockdomains_common_data.o
obj-$(CONFIG_ARCH_OMAP2) += $(clockdomain-common)
obj-$(CONFIG_ARCH_OMAP2) += clockdomain2xxx_3xxx.o
obj-$(CONFIG_ARCH_OMAP2) += clockdomains2xxx_3xxx_data.o
......@@ -244,9 +243,6 @@ obj-y += $(omap-flash-y) $(omap-flash-m)
omap-hsmmc-$(CONFIG_MMC_OMAP_HS) := hsmmc.o
obj-y += $(omap-hsmmc-m) $(omap-hsmmc-y)
usbfs-$(CONFIG_ARCH_OMAP_OTG) := usb-fs.o
obj-y += $(usbfs-m) $(usbfs-y)
obj-y += usb-musb.o
obj-y += omap_phy_internal.o
......
......@@ -254,16 +254,6 @@ static struct omap2_hsmmc_info mmc[] __initdata = {
{} /* Terminator */
};
static struct omap_usb_config sdp2430_usb_config __initdata = {
.otg = 1,
#ifdef CONFIG_USB_GADGET_OMAP
.hmc_mode = 0x0,
#elif defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
.hmc_mode = 0x1,
#endif
.pins[0] = 3,
};
#ifdef CONFIG_OMAP_MUX
static struct omap_board_mux board_mux[] __initdata = {
{ .reg_offset = OMAP_MUX_TERMINATOR },
......@@ -280,7 +270,6 @@ static void __init omap_2430sdp_init(void)
omap_serial_init();
omap_sdrc_init(NULL, NULL);
omap_hsmmc_init(mmc);
omap2_usbfs_init(&sdp2430_usb_config);
omap_mux_init_signal("usb0hs_stp", OMAP_PULL_ENA | OMAP_PULL_UP);
usb_musb_init(NULL);
......
......@@ -35,7 +35,6 @@
#include <asm/mach/flash.h>
#include <plat/led.h>
#include <plat/usb.h>
#include <plat/board.h>
#include "common.h"
#include <plat/gpmc.h>
......@@ -253,13 +252,6 @@ static inline void __init apollon_init_smc91x(void)
clk_put(gpmc_fck);
}
static struct omap_usb_config apollon_usb_config __initdata = {
.register_dev = 1,
.hmc_mode = 0x14, /* 0:dev 1:host1 2:disable */
.pins[0] = 6,
};
static struct panel_generic_dpi_data apollon_panel_data = {
.name = "apollon",
};
......@@ -297,15 +289,6 @@ static void __init apollon_led_init(void)
gpio_request_array(apollon_gpio_leds, ARRAY_SIZE(apollon_gpio_leds));
}
static void __init apollon_usb_init(void)
{
/* USB device */
/* DEVICE_SUSPEND */
omap_mux_init_signal("mcbsp2_clkx.gpio_12", 0);
gpio_request_one(12, GPIOF_OUT_INIT_LOW, "USB suspend");
omap2_usbfs_init(&apollon_usb_config);
}
#ifdef CONFIG_OMAP_MUX
static struct omap_board_mux board_mux[] __initdata = {
{ .reg_offset = OMAP_MUX_TERMINATOR },
......@@ -321,7 +304,6 @@ static void __init omap_apollon_init(void)
apollon_init_smc91x();
apollon_led_init();
apollon_flash_init();
apollon_usb_init();
/* REVISIT: where's the correct place */
omap_mux_init_signal("sys_nirq", OMAP_PULL_ENA | OMAP_PULL_UP);
......
......@@ -32,7 +32,6 @@
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <plat/usb.h>
#include <plat/board.h>
#include "common.h"
#include <plat/menelaus.h>
......@@ -329,17 +328,6 @@ static void __init h4_init_flash(void)
h4_flash_resource.end = base + SZ_64M - 1;
}
static struct omap_usb_config h4_usb_config __initdata = {
/* S1.10 OFF -- usb "download port"
* usb0 switched to Mini-B port and isp1105 transceiver;
* S2.POS3 = ON, S2.POS4 = OFF ... to enable battery charging
*/
.register_dev = 1,
.pins[0] = 3,
/* .hmc_mode = 0x14,*/ /* 0:dev 1:host 2:disable */
.hmc_mode = 0x00, /* 0:dev|otg 1:disable 2:disable */
};
static struct at24_platform_data m24c01 = {
.byte_len = SZ_1K / 8,
.page_size = 16,
......@@ -381,7 +369,6 @@ static void __init omap_h4_init(void)
ARRAY_SIZE(h4_i2c_board_info));
platform_add_devices(h4_devices, ARRAY_SIZE(h4_devices));
omap2_usbfs_init(&h4_usb_config);
omap_serial_init();
omap_sdrc_init(NULL, NULL);
h4_init_flash();
......
......@@ -1774,8 +1774,6 @@ static struct omap_clk omap2420_clks[] = {
CLK(NULL, "osc_ck", &osc_ck, CK_242X),
CLK(NULL, "sys_ck", &sys_ck, CK_242X),
CLK(NULL, "alt_ck", &alt_ck, CK_242X),
CLK("omap-mcbsp.1", "pad_fck", &mcbsp_clks, CK_242X),
CLK("omap-mcbsp.2", "pad_fck", &mcbsp_clks, CK_242X),
CLK(NULL, "mcbsp_clks", &mcbsp_clks, CK_242X),
/* internal analog sources */
CLK(NULL, "dpll_ck", &dpll_ck, CK_242X),
......@@ -1784,8 +1782,6 @@ static struct omap_clk omap2420_clks[] = {
/* internal prcm root sources */
CLK(NULL, "func_54m_ck", &func_54m_ck, CK_242X),
CLK(NULL, "core_ck", &core_ck, CK_242X),
CLK("omap-mcbsp.1", "prcm_fck", &func_96m_ck, CK_242X),
CLK("omap-mcbsp.2", "prcm_fck", &func_96m_ck, CK_242X),
CLK(NULL, "func_96m_ck", &func_96m_ck, CK_242X),
CLK(NULL, "func_48m_ck", &func_48m_ck, CK_242X),
CLK(NULL, "func_12m_ck", &func_12m_ck, CK_242X),
......
......@@ -1858,11 +1858,6 @@ static struct omap_clk omap2430_clks[] = {
CLK(NULL, "osc_ck", &osc_ck, CK_243X),
CLK(NULL, "sys_ck", &sys_ck, CK_243X),
CLK(NULL, "alt_ck", &alt_ck, CK_243X),
CLK("omap-mcbsp.1", "pad_fck", &mcbsp_clks, CK_243X),
CLK("omap-mcbsp.2", "pad_fck", &mcbsp_clks, CK_243X),
CLK("omap-mcbsp.3", "pad_fck", &mcbsp_clks, CK_243X),
CLK("omap-mcbsp.4", "pad_fck", &mcbsp_clks, CK_243X),
CLK("omap-mcbsp.5", "pad_fck", &mcbsp_clks, CK_243X),
CLK(NULL, "mcbsp_clks", &mcbsp_clks, CK_243X),
/* internal analog sources */
CLK(NULL, "dpll_ck", &dpll_ck, CK_243X),
......@@ -1871,11 +1866,6 @@ static struct omap_clk omap2430_clks[] = {
/* internal prcm root sources */
CLK(NULL, "func_54m_ck", &func_54m_ck, CK_243X),
CLK(NULL, "core_ck", &core_ck, CK_243X),
CLK("omap-mcbsp.1", "prcm_fck", &func_96m_ck, CK_243X),
CLK("omap-mcbsp.2", "prcm_fck", &func_96m_ck, CK_243X),
CLK("omap-mcbsp.3", "prcm_fck", &func_96m_ck, CK_243X),
CLK("omap-mcbsp.4", "prcm_fck", &func_96m_ck, CK_243X),
CLK("omap-mcbsp.5", "prcm_fck", &func_96m_ck, CK_243X),
CLK(NULL, "func_96m_ck", &func_96m_ck, CK_243X),
CLK(NULL, "func_48m_ck", &func_48m_ck, CK_243X),
CLK(NULL, "func_12m_ck", &func_12m_ck, CK_243X),
......
......@@ -3236,11 +3236,6 @@ static struct omap_clk omap3xxx_clks[] = {
CLK(NULL, "osc_sys_ck", &osc_sys_ck, CK_3XXX),
CLK(NULL, "sys_ck", &sys_ck, CK_3XXX),
CLK(NULL, "sys_altclk", &sys_altclk, CK_3XXX),
CLK("omap-mcbsp.1", "pad_fck", &mcbsp_clks, CK_3XXX),
CLK("omap-mcbsp.2", "pad_fck", &mcbsp_clks, CK_3XXX),
CLK("omap-mcbsp.3", "pad_fck", &mcbsp_clks, CK_3XXX),
CLK("omap-mcbsp.4", "pad_fck", &mcbsp_clks, CK_3XXX),
CLK("omap-mcbsp.5", "pad_fck", &mcbsp_clks, CK_3XXX),
CLK(NULL, "mcbsp_clks", &mcbsp_clks, CK_3XXX),
CLK(NULL, "sys_clkout1", &sys_clkout1, CK_3XXX),
CLK(NULL, "dpll1_ck", &dpll1_ck, CK_3XXX),
......@@ -3307,8 +3302,6 @@ static struct omap_clk omap3xxx_clks[] = {
CLK(NULL, "ts_fck", &ts_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
CLK(NULL, "usbtll_fck", &usbtll_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
CLK("usbhs_omap", "usbtll_fck", &usbtll_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
CLK("omap-mcbsp.1", "prcm_fck", &core_96m_fck, CK_3XXX),
CLK("omap-mcbsp.5", "prcm_fck", &core_96m_fck, CK_3XXX),
CLK(NULL, "core_96m_fck", &core_96m_fck, CK_3XXX),
CLK(NULL, "mmchs3_fck", &mmchs3_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
CLK(NULL, "mmchs2_fck", &mmchs2_fck, CK_3XXX),
......@@ -3413,9 +3406,6 @@ static struct omap_clk omap3xxx_clks[] = {
CLK(NULL, "omap_32ksync_ick", &omap_32ksync_ick, CK_3XXX),
CLK(NULL, "gpt12_ick", &gpt12_ick, CK_3XXX),
CLK(NULL, "gpt1_ick", &gpt1_ick, CK_3XXX),
CLK("omap-mcbsp.2", "prcm_fck", &per_96m_fck, CK_3XXX),
CLK("omap-mcbsp.3", "prcm_fck", &per_96m_fck, CK_3XXX),
CLK("omap-mcbsp.4", "prcm_fck", &per_96m_fck, CK_3XXX),
CLK(NULL, "per_96m_fck", &per_96m_fck, CK_3XXX),
CLK(NULL, "per_48m_fck", &per_48m_fck, CK_3XXX),
CLK(NULL, "uart3_fck", &uart3_fck, CK_3XXX),
......
......@@ -206,7 +206,5 @@ extern struct clkdm_ops omap4_clkdm_operations;
extern struct clkdm_dep gfx_24xx_wkdeps[];
extern struct clkdm_dep dsp_24xx_wkdeps[];
extern struct clockdomain wkup_common_clkdm;
extern struct clockdomain prm_common_clkdm;
extern struct clockdomain cm_common_clkdm;
#endif
......@@ -131,8 +131,6 @@ static struct clockdomain dss_2420_clkdm = {
static struct clockdomain *clockdomains_omap242x[] __initdata = {
&wkup_common_clkdm,
&cm_common_clkdm,
&prm_common_clkdm,
&mpu_2420_clkdm,
&iva1_2420_clkdm,
&dsp_2420_clkdm,
......
......@@ -157,8 +157,6 @@ static struct clockdomain dss_2430_clkdm = {
static struct clockdomain *clockdomains_omap243x[] __initdata = {
&wkup_common_clkdm,
&cm_common_clkdm,
&prm_common_clkdm,
&mpu_2430_clkdm,
&mdm_clkdm,
&dsp_2430_clkdm,
......
......@@ -347,8 +347,6 @@ static struct clkdm_autodep clkdm_autodeps[] = {
static struct clockdomain *clockdomains_omap3430_common[] __initdata = {
&wkup_common_clkdm,
&cm_common_clkdm,
&prm_common_clkdm,
&mpu_3xxx_clkdm,
&neon_clkdm,
&iva2_clkdm,
......
......@@ -430,8 +430,6 @@ static struct clockdomain *clockdomains_omap44xx[] __initdata = {
&l4_wkup_44xx_clkdm,
&emu_sys_44xx_clkdm,
&l3_dma_44xx_clkdm,
&prm_common_clkdm,
&cm_common_clkdm,
NULL
};
......
/*
* OMAP2+-common clockdomain data
*
* Copyright (C) 2008-2012 Texas Instruments, Inc.
* Copyright (C) 2008-2010 Nokia Corporation
*
* Paul Walmsley, Jouni Högander
*/
#include <linux/kernel.h>
#include <linux/io.h>
#include "clockdomain.h"
/* These are implicit clockdomains - they are never defined as such in TRM */
struct clockdomain prm_common_clkdm = {
.name = "prm_clkdm",
.pwrdm = { .name = "wkup_pwrdm" },
};
struct clockdomain cm_common_clkdm = {
.name = "cm_clkdm",
.pwrdm = { .name = "core_pwrdm" },
};
......@@ -241,6 +241,49 @@ void omap3_ctrl_write_boot_mode(u8 bootmode)
#endif
/**
* omap_ctrl_write_dsp_boot_addr - set boot address for a remote processor
* @bootaddr: physical address of the boot loader
*
* Set boot address for the boot loader of a supported processor
* when a power ON sequence occurs.
*/
void omap_ctrl_write_dsp_boot_addr(u32 bootaddr)
{
u32 offset = cpu_is_omap243x() ? OMAP243X_CONTROL_IVA2_BOOTADDR :
cpu_is_omap34xx() ? OMAP343X_CONTROL_IVA2_BOOTADDR :
cpu_is_omap44xx() ? OMAP4_CTRL_MODULE_CORE_DSP_BOOTADDR :
0;
if (!offset) {
pr_err("%s: unsupported omap type\n", __func__);
return;
}
omap_ctrl_writel(bootaddr, offset);
}
/**
* omap_ctrl_write_dsp_boot_mode - set boot mode for a remote processor
* @bootmode: 8-bit value to pass to some boot code
*
* Sets boot mode for the boot loader of a supported processor
* when a power ON sequence occurs.
*/
void omap_ctrl_write_dsp_boot_mode(u8 bootmode)
{
u32 offset = cpu_is_omap243x() ? OMAP243X_CONTROL_IVA2_BOOTMOD :
cpu_is_omap34xx() ? OMAP343X_CONTROL_IVA2_BOOTMOD :
0;
if (!offset) {
pr_err("%s: unsupported omap type\n", __func__);
return;
}
omap_ctrl_writel(bootmode, offset);
}
#if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_PM)
/*
* Clears the scratchpad contents in case of cold boot-
......
......@@ -397,6 +397,8 @@ extern u32 omap3_arm_context[128];
extern void omap3_control_save_context(void);
extern void omap3_control_restore_context(void);
extern void omap3_ctrl_write_boot_mode(u8 bootmode);
extern void omap_ctrl_write_dsp_boot_addr(u32 bootaddr);
extern void omap_ctrl_write_dsp_boot_mode(u8 bootmode);
extern void omap3630_ctrl_disable_rta(void);
extern int omap3_ctrl_save_padconf(void);
#else
......
......@@ -23,6 +23,7 @@
#include <asm/memblock.h>
#include "control.h"
#include "cm2xxx_3xxx.h"
#include "prm2xxx_3xxx.h"
#ifdef CONFIG_BRIDGE_DVFS
......@@ -46,6 +47,9 @@ static struct omap_dsp_platform_data omap_dsp_pdata __initdata = {
.dsp_cm_read = omap2_cm_read_mod_reg,
.dsp_cm_write = omap2_cm_write_mod_reg,
.dsp_cm_rmw_bits = omap2_cm_rmw_mod_reg_bits,
.set_bootaddr = omap_ctrl_write_dsp_boot_addr,
.set_bootmode = omap_ctrl_write_dsp_boot_mode,
};
static phys_addr_t omap_dsp_phys_mempool_base;
......
......@@ -42,6 +42,7 @@
#define OMAP4_CTRL_MODULE_CORE_STD_FUSE_OPP_DPLL_1 0x0268
#define OMAP4_CTRL_MODULE_CORE_STATUS 0x02c4
#define OMAP4_CTRL_MODULE_CORE_DEV_CONF 0x0300
#define OMAP4_CTRL_MODULE_CORE_DSP_BOOTADDR 0x0304
#define OMAP4_CTRL_MODULE_CORE_LDOVBB_IVA_VOLTAGE_CTRL 0x0314
#define OMAP4_CTRL_MODULE_CORE_LDOVBB_MPU_VOLTAGE_CTRL 0x0318
#define OMAP4_CTRL_MODULE_CORE_LDOSRAM_IVA_VOLTAGE_CTRL 0x0320
......
This diff is collapsed.
......@@ -192,6 +192,11 @@ static struct omap_hwmod_class omap2420_mcbsp_hwmod_class = {
.name = "mcbsp",
};
static struct omap_hwmod_opt_clk mcbsp_opt_clks[] = {
{ .role = "pad_fck", .clk = "mcbsp_clks" },
{ .role = "prcm_fck", .clk = "func_96m_ck" },
};
/* mcbsp1 */
static struct omap_hwmod_irq_info omap2420_mcbsp1_irqs[] = {
{ .name = "tx", .irq = 59 },
......@@ -214,6 +219,8 @@ static struct omap_hwmod omap2420_mcbsp1_hwmod = {
.idlest_idle_bit = OMAP24XX_ST_MCBSP1_SHIFT,
},
},
.opt_clks = mcbsp_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks),
};
/* mcbsp2 */
......@@ -238,6 +245,8 @@ static struct omap_hwmod omap2420_mcbsp2_hwmod = {
.idlest_idle_bit = OMAP24XX_ST_MCBSP2_SHIFT,
},
},
.opt_clks = mcbsp_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks),
};
static struct omap_hwmod_class_sysconfig omap2420_msdi_sysc = {
......@@ -585,5 +594,6 @@ static struct omap_hwmod_ocp_if *omap2420_hwmod_ocp_ifs[] __initdata = {
int __init omap2420_hwmod_init(void)
{
omap_hwmod_init();
return omap_hwmod_register_links(omap2420_hwmod_ocp_ifs);
}
......@@ -296,6 +296,11 @@ static struct omap_hwmod_class omap2430_mcbsp_hwmod_class = {
.rev = MCBSP_CONFIG_TYPE2,
};
static struct omap_hwmod_opt_clk mcbsp_opt_clks[] = {
{ .role = "pad_fck", .clk = "mcbsp_clks" },
{ .role = "prcm_fck", .clk = "func_96m_ck" },
};
/* mcbsp1 */
static struct omap_hwmod_irq_info omap2430_mcbsp1_irqs[] = {
{ .name = "tx", .irq = 59 },
......@@ -320,6 +325,8 @@ static struct omap_hwmod omap2430_mcbsp1_hwmod = {
.idlest_idle_bit = OMAP24XX_ST_MCBSP1_SHIFT,
},
},
.opt_clks = mcbsp_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks),
};
/* mcbsp2 */
......@@ -345,6 +352,8 @@ static struct omap_hwmod omap2430_mcbsp2_hwmod = {
.idlest_idle_bit = OMAP24XX_ST_MCBSP2_SHIFT,
},
},
.opt_clks = mcbsp_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks),
};
/* mcbsp3 */
......@@ -370,6 +379,8 @@ static struct omap_hwmod omap2430_mcbsp3_hwmod = {
.idlest_idle_bit = OMAP2430_ST_MCBSP3_SHIFT,
},
},
.opt_clks = mcbsp_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks),
};
/* mcbsp4 */
......@@ -401,6 +412,8 @@ static struct omap_hwmod omap2430_mcbsp4_hwmod = {
.idlest_idle_bit = OMAP2430_ST_MCBSP4_SHIFT,
},
},
.opt_clks = mcbsp_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks),
};
/* mcbsp5 */
......@@ -432,6 +445,8 @@ static struct omap_hwmod omap2430_mcbsp5_hwmod = {
.idlest_idle_bit = OMAP2430_ST_MCBSP5_SHIFT,
},
},
.opt_clks = mcbsp_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks),
};
/* MMC/SD/SDIO common */
......@@ -938,5 +953,6 @@ static struct omap_hwmod_ocp_if *omap2430_hwmod_ocp_ifs[] __initdata = {
int __init omap2430_hwmod_init(void)
{
omap_hwmod_init();
return omap_hwmod_register_links(omap2430_hwmod_ocp_ifs);
}
......@@ -1074,6 +1074,17 @@ static struct omap_hwmod_class omap3xxx_mcbsp_hwmod_class = {
.rev = MCBSP_CONFIG_TYPE3,
};
/* McBSP functional clock mapping */
static struct omap_hwmod_opt_clk mcbsp15_opt_clks[] = {
{ .role = "pad_fck", .clk = "mcbsp_clks" },
{ .role = "prcm_fck", .clk = "core_96m_fck" },
};
static struct omap_hwmod_opt_clk mcbsp234_opt_clks[] = {
{ .role = "pad_fck", .clk = "mcbsp_clks" },
{ .role = "prcm_fck", .clk = "per_96m_fck" },
};
/* mcbsp1 */
static struct omap_hwmod_irq_info omap3xxx_mcbsp1_irqs[] = {
{ .name = "common", .irq = 16 },
......@@ -1097,6 +1108,8 @@ static struct omap_hwmod omap3xxx_mcbsp1_hwmod = {
.idlest_idle_bit = OMAP3430_ST_MCBSP1_SHIFT,
},
},
.opt_clks = mcbsp15_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(mcbsp15_opt_clks),
};
/* mcbsp2 */
......@@ -1126,6 +1139,8 @@ static struct omap_hwmod omap3xxx_mcbsp2_hwmod = {
.idlest_idle_bit = OMAP3430_ST_MCBSP2_SHIFT,
},
},
.opt_clks = mcbsp234_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(mcbsp234_opt_clks),
.dev_attr = &omap34xx_mcbsp2_dev_attr,
};
......@@ -1156,6 +1171,8 @@ static struct omap_hwmod omap3xxx_mcbsp3_hwmod = {
.idlest_idle_bit = OMAP3430_ST_MCBSP3_SHIFT,
},
},
.opt_clks = mcbsp234_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(mcbsp234_opt_clks),
.dev_attr = &omap34xx_mcbsp3_dev_attr,
};
......@@ -1188,6 +1205,8 @@ static struct omap_hwmod omap3xxx_mcbsp4_hwmod = {
.idlest_idle_bit = OMAP3430_ST_MCBSP4_SHIFT,
},
},
.opt_clks = mcbsp234_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(mcbsp234_opt_clks),
};
/* mcbsp5 */
......@@ -1219,6 +1238,8 @@ static struct omap_hwmod omap3xxx_mcbsp5_hwmod = {
.idlest_idle_bit = OMAP3430_ST_MCBSP5_SHIFT,
},
},
.opt_clks = mcbsp15_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(mcbsp15_opt_clks),
};
/* 'mcbsp sidetone' class */
......@@ -3283,6 +3304,8 @@ int __init omap3xxx_hwmod_init(void)
struct omap_hwmod_ocp_if **h = NULL;
unsigned int rev;
omap_hwmod_init();
/* Register hwmod links common to all OMAP3 */
r = omap_hwmod_register_links(omap3xxx_hwmod_ocp_ifs);
if (r < 0)
......
......@@ -2544,14 +2544,12 @@ static struct omap_hwmod omap44xx_prcm_mpu_hwmod = {
static struct omap_hwmod omap44xx_cm_core_aon_hwmod = {
.name = "cm_core_aon",
.class = &omap44xx_prcm_hwmod_class,
.clkdm_name = "cm_clkdm",
};
/* cm_core */
static struct omap_hwmod omap44xx_cm_core_hwmod = {
.name = "cm_core",
.class = &omap44xx_prcm_hwmod_class,
.clkdm_name = "cm_clkdm",
};
/* prm */
......@@ -2568,7 +2566,6 @@ static struct omap_hwmod_rst_info omap44xx_prm_resets[] = {
static struct omap_hwmod omap44xx_prm_hwmod = {
.name = "prm",
.class = &omap44xx_prcm_hwmod_class,
.clkdm_name = "prm_clkdm",
.mpu_irqs = omap44xx_prm_irqs,
.rst_lines = omap44xx_prm_resets,
.rst_lines_cnt = ARRAY_SIZE(omap44xx_prm_resets),
......@@ -6148,6 +6145,7 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
int __init omap44xx_hwmod_init(void)
{
omap_hwmod_init();
return omap_hwmod_register_links(omap44xx_hwmod_ocp_ifs);
}
/*
* Platform level USB initialization for FS USB OTG controller on omap1 and 24xx
*
* Copyright (C) 2004 Texas Instruments, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/clk.h>
#include <linux/err.h>
#include <asm/irq.h>
#include <plat/usb.h>
#include <plat/board.h>
#include "control.h"
#include "mux.h"
#define INT_USB_IRQ_GEN INT_24XX_USB_IRQ_GEN
#define INT_USB_IRQ_NISO INT_24XX_USB_IRQ_NISO
#define INT_USB_IRQ_ISO INT_24XX_USB_IRQ_ISO
#define INT_USB_IRQ_HGEN INT_24XX_USB_IRQ_HGEN
#define INT_USB_IRQ_OTG INT_24XX_USB_IRQ_OTG
#if defined(CONFIG_ARCH_OMAP2)
#ifdef CONFIG_USB_GADGET_OMAP
static struct resource udc_resources[] = {
/* order is significant! */
{ /* registers */
.start = UDC_BASE,
.end = UDC_BASE + 0xff,
.flags = IORESOURCE_MEM,
}, { /* general IRQ */
.start = INT_USB_IRQ_GEN,
.flags = IORESOURCE_IRQ,
}, { /* PIO IRQ */
.start = INT_USB_IRQ_NISO,
.flags = IORESOURCE_IRQ,
}, { /* SOF IRQ */
.start = INT_USB_IRQ_ISO,
.flags = IORESOURCE_IRQ,
},
};
static u64 udc_dmamask = ~(u32)0;
static struct platform_device udc_device = {
.name = "omap_udc",
.id = -1,
.dev = {
.dma_mask = &udc_dmamask,
.coherent_dma_mask = 0xffffffff,
},
.num_resources = ARRAY_SIZE(udc_resources),
.resource = udc_resources,
};
static inline void udc_device_init(struct omap_usb_config *pdata)
{
pdata->udc_device = &udc_device;
}
#else
static inline void udc_device_init(struct omap_usb_config *pdata)
{
}
#endif
#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
/* The dmamask must be set for OHCI to work */
static u64 ohci_dmamask = ~(u32)0;
static struct resource ohci_resources[] = {
{
.start = OMAP_OHCI_BASE,
.end = OMAP_OHCI_BASE + 0xff,
.flags = IORESOURCE_MEM,
},
{
.start = INT_USB_IRQ_HGEN,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device ohci_device = {
.name = "ohci",
.id = -1,
.dev = {
.dma_mask = &ohci_dmamask,
.coherent_dma_mask = 0xffffffff,
},
.num_resources = ARRAY_SIZE(ohci_resources),
.resource = ohci_resources,
};
static inline void ohci_device_init(struct omap_usb_config *pdata)
{
pdata->ohci_device = &ohci_device;
}
#else
static inline void ohci_device_init(struct omap_usb_config *pdata)
{
}
#endif
#if defined(CONFIG_USB_OTG) && defined(CONFIG_ARCH_OMAP_OTG)
static struct resource otg_resources[] = {
/* order is significant! */
{
.start = OTG_BASE,
.end = OTG_BASE + 0xff,
.flags = IORESOURCE_MEM,
}, {
.start = INT_USB_IRQ_OTG,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device otg_device = {
.name = "omap_otg",
.id = -1,
.num_resources = ARRAY_SIZE(otg_resources),
.resource = otg_resources,
};
static inline void otg_device_init(struct omap_usb_config *pdata)
{
pdata->otg_device = &otg_device;
}
#else
static inline void otg_device_init(struct omap_usb_config *pdata)
{
}
#endif
static void omap2_usb_devconf_clear(u8 port, u32 mask)
{
u32 r;
r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
r &= ~USBTXWRMODEI(port, mask);
omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0);
}
static void omap2_usb_devconf_set(u8 port, u32 mask)
{
u32 r;
r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
r |= USBTXWRMODEI(port, mask);
omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0);
}
static void omap2_usb2_disable_5pinbitll(void)
{
u32 r;
r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
r &= ~(USBTXWRMODEI(2, USB_BIDIR_TLL) | USBT2TLL5PI);
omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0);
}
static void omap2_usb2_enable_5pinunitll(void)
{
u32 r;
r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
r |= USBTXWRMODEI(2, USB_UNIDIR_TLL) | USBT2TLL5PI;
omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0);
}
static u32 __init omap2_usb0_init(unsigned nwires, unsigned is_device)
{
u32 syscon1 = 0;
omap2_usb_devconf_clear(0, USB_BIDIR_TLL);
if (nwires == 0)
return 0;
if (is_device)
omap_mux_init_signal("usb0_puen", 0);
omap_mux_init_signal("usb0_dat", 0);
omap_mux_init_signal("usb0_txen", 0);
omap_mux_init_signal("usb0_se0", 0);
if (nwires != 3)
omap_mux_init_signal("usb0_rcv", 0);
switch (nwires) {
case 3:
syscon1 = 2;
omap2_usb_devconf_set(0, USB_BIDIR);
break;
case 4:
syscon1 = 1;
omap2_usb_devconf_set(0, USB_BIDIR);
break;
case 6:
syscon1 = 3;
omap_mux_init_signal("usb0_vp", 0);
omap_mux_init_signal("usb0_vm", 0);
omap2_usb_devconf_set(0, USB_UNIDIR);
break;
default:
printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
0, nwires);
}
return syscon1 << 16;
}
static u32 __init omap2_usb1_init(unsigned nwires)
{
u32 syscon1 = 0;
omap2_usb_devconf_clear(1, USB_BIDIR_TLL);
if (nwires == 0)
return 0;
/* NOTE: board-specific code must set up pin muxing for usb1,
* since each signal could come out on either of two balls.
*/
switch (nwires) {
case 2:
/* NOTE: board-specific code must override this setting if
* this TLL link is not using DP/DM
*/
syscon1 = 1;
omap2_usb_devconf_set(1, USB_BIDIR_TLL);
break;
case 3:
syscon1 = 2;
omap2_usb_devconf_set(1, USB_BIDIR);
break;
case 4:
syscon1 = 1;
omap2_usb_devconf_set(1, USB_BIDIR);
break;
case 6:
default:
printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
1, nwires);
}
return syscon1 << 20;
}
static u32 __init omap2_usb2_init(unsigned nwires, unsigned alt_pingroup)
{
u32 syscon1 = 0;
omap2_usb2_disable_5pinbitll();
alt_pingroup = 0;
/* NOTE omap1 erratum: must leave USB2_UNI_R set if usb0 in use */
if (alt_pingroup || nwires == 0)
return 0;
omap_mux_init_signal("usb2_dat", 0);
omap_mux_init_signal("usb2_se0", 0);
if (nwires > 2)
omap_mux_init_signal("usb2_txen", 0);
if (nwires > 3)
omap_mux_init_signal("usb2_rcv", 0);
switch (nwires) {
case 2:
/* NOTE: board-specific code must override this setting if
* this TLL link is not using DP/DM
*/
syscon1 = 1;
omap2_usb_devconf_set(2, USB_BIDIR_TLL);
break;
case 3:
syscon1 = 2;
omap2_usb_devconf_set(2, USB_BIDIR);
break;
case 4:
syscon1 = 1;
omap2_usb_devconf_set(2, USB_BIDIR);
break;
case 5:
/* NOTE: board-specific code must mux this setting depending
* on TLL link using DP/DM. Something must also
* set up OTG_SYSCON2.HMC_TLL{ATTACH,SPEED}
* 2420: hdq_sio.usb2_tllse0 or vlynq_rx0.usb2_tllse0
* 2430: hdq_sio.usb2_tllse0 or sdmmc2_dat0.usb2_tllse0
*/
syscon1 = 3;
omap2_usb2_enable_5pinunitll();
break;
case 6:
default:
printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
2, nwires);
}
return syscon1 << 24;
}
void __init omap2_usbfs_init(struct omap_usb_config *pdata)
{
struct clk *ick;
if (!cpu_is_omap24xx())
return;
ick = clk_get(NULL, "usb_l4_ick");
if (IS_ERR(ick))
return;
clk_enable(ick);
pdata->usb0_init = omap2_usb0_init;
pdata->usb1_init = omap2_usb1_init;
pdata->usb2_init = omap2_usb2_init;
udc_device_init(pdata);
ohci_device_init(pdata);
otg_device_init(pdata);
omap_otg_init(pdata);
clk_disable(ick);
clk_put(ick);
}
#endif
......@@ -4,7 +4,7 @@
# Common support
obj-y := common.o sram.o clock.o devices.o dma.o mux.o \
usb.o fb.o counter_32k.o
fb.o counter_32k.o
obj-m :=
obj-n :=
obj- :=
......
......@@ -573,22 +573,25 @@ EXPORT_SYMBOL(omap_set_dma_dest_burst_mode);
static inline void omap_enable_channel_irq(int lch)
{
u32 status;
/* Clear CSR */
if (cpu_class_is_omap1())
status = p->dma_read(CSR, lch);
else if (cpu_class_is_omap2())
p->dma_read(CSR, lch);
else
p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, lch);
/* Enable some nice interrupts. */
p->dma_write(dma_chan[lch].enabled_irqs, CICR, lch);
}
static void omap_disable_channel_irq(int lch)
static inline void omap_disable_channel_irq(int lch)
{
if (cpu_class_is_omap2())
p->dma_write(0, CICR, lch);
/* disable channel interrupts */
p->dma_write(0, CICR, lch);
/* Clear CSR */
if (cpu_class_is_omap1())
p->dma_read(CSR, lch);
else
p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, lch);
}
void omap_enable_dma_irq(int lch, u16 bits)
......@@ -632,14 +635,14 @@ static inline void disable_lnk(int lch)
l = p->dma_read(CLNK_CTRL, lch);
/* Disable interrupts */
omap_disable_channel_irq(lch);
if (cpu_class_is_omap1()) {
p->dma_write(0, CICR, lch);
/* Set the STOP_LNK bit */
l |= 1 << 14;
}
if (cpu_class_is_omap2()) {
omap_disable_channel_irq(lch);
/* Clear the ENABLE_LNK bit */
l &= ~(1 << 15);
}
......@@ -657,6 +660,9 @@ static inline void omap2_enable_irq_lch(int lch)
return;
spin_lock_irqsave(&dma_chan_lock, flags);
/* clear IRQ STATUS */
p->dma_write(1 << lch, IRQSTATUS_L0, lch);
/* Enable interrupt */
val = p->dma_read(IRQENABLE_L0, lch);
val |= 1 << lch;
p->dma_write(val, IRQENABLE_L0, lch);
......@@ -672,9 +678,12 @@ static inline void omap2_disable_irq_lch(int lch)
return;
spin_lock_irqsave(&dma_chan_lock, flags);
/* Disable interrupt */
val = p->dma_read(IRQENABLE_L0, lch);
val &= ~(1 << lch);
p->dma_write(val, IRQENABLE_L0, lch);
/* clear IRQ STATUS */
p->dma_write(1 << lch, IRQSTATUS_L0, lch);
spin_unlock_irqrestore(&dma_chan_lock, flags);
}
......@@ -745,11 +754,8 @@ int omap_request_dma(int dev_id, const char *dev_name,
}
if (cpu_class_is_omap2()) {
omap2_enable_irq_lch(free_ch);
omap_enable_channel_irq(free_ch);
/* Clear the CSR register and IRQ status register */
p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, free_ch);
p->dma_write(1 << free_ch, IRQSTATUS_L0, 0);
omap2_enable_irq_lch(free_ch);
}
*dma_ch_out = free_ch;
......@@ -768,27 +774,19 @@ void omap_free_dma(int lch)
return;
}
if (cpu_class_is_omap1()) {
/* Disable all DMA interrupts for the channel. */
p->dma_write(0, CICR, lch);
/* Make sure the DMA transfer is stopped. */
p->dma_write(0, CCR, lch);
}
if (cpu_class_is_omap2()) {
/* Disable interrupt for logical channel */
if (cpu_class_is_omap2())
omap2_disable_irq_lch(lch);
/* Clear the CSR register and IRQ status register */
p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, lch);
p->dma_write(1 << lch, IRQSTATUS_L0, lch);
/* Disable all DMA interrupts for the channel. */
omap_disable_channel_irq(lch);
/* Disable all DMA interrupts for the channel. */
p->dma_write(0, CICR, lch);
/* Make sure the DMA transfer is stopped. */
p->dma_write(0, CCR, lch);
/* Make sure the DMA transfer is stopped. */
p->dma_write(0, CCR, lch);
/* Clear registers */
if (cpu_class_is_omap2())
omap_clear_dma(lch);
}
spin_lock_irqsave(&dma_chan_lock, flags);
dma_chan[lch].dev_id = -1;
......@@ -943,8 +941,7 @@ void omap_stop_dma(int lch)
u32 l;
/* Disable all interrupts on the channel */
if (cpu_class_is_omap1())
p->dma_write(0, CICR, lch);
omap_disable_channel_irq(lch);
l = p->dma_read(CCR, lch);
if (IS_DMA_ERRATA(DMA_ERRATA_i541) &&
......
......@@ -57,44 +57,6 @@ struct omap_camera_sensor_config {
int (*power_off)(void * data);
};
struct omap_usb_config {
/* Configure drivers according to the connectors on your board:
* - "A" connector (rectagular)
* ... for host/OHCI use, set "register_host".
* - "B" connector (squarish) or "Mini-B"
* ... for device/gadget use, set "register_dev".
* - "Mini-AB" connector (very similar to Mini-B)
* ... for OTG use as device OR host, initialize "otg"
*/
unsigned register_host:1;
unsigned register_dev:1;
u8 otg; /* port number, 1-based: usb1 == 2 */
u8 hmc_mode;
/* implicitly true if otg: host supports remote wakeup? */
u8 rwc;
/* signaling pins used to talk to transceiver on usbN:
* 0 == usbN unused
* 2 == usb0-only, using internal transceiver
* 3 == 3 wire bidirectional
* 4 == 4 wire bidirectional
* 6 == 6 wire unidirectional (or TLL)
*/
u8 pins[3];
struct platform_device *udc_device;
struct platform_device *ohci_device;
struct platform_device *otg_device;
u32 (*usb0_init)(unsigned nwires, unsigned is_device);
u32 (*usb1_init)(unsigned nwires);
u32 (*usb2_init)(unsigned nwires, unsigned alt_pingroup);
int (*ocpi_enable)(void);
};
struct omap_lcd_config {
char panel_name[16];
char ctrl_name[16];
......
......@@ -156,7 +156,6 @@ struct dpll_data {
u8 min_divider;
u16 max_divider;
u8 modes;
#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
void __iomem *autoidle_reg;
void __iomem *idlest_reg;
u32 autoidle_mask;
......@@ -167,7 +166,6 @@ struct dpll_data {
u8 auto_recal_bit;
u8 recal_en_bit;
u8 recal_st_bit;
# endif
u8 flags;
};
......
......@@ -18,6 +18,9 @@ struct omap_dsp_platform_data {
u32 (*dsp_cm_read)(s16 , u16);
u32 (*dsp_cm_rmw_bits)(u32, u32, s16, s16);
void (*set_bootaddr)(u32);
void (*set_bootmode)(u8);
phys_addr_t phys_mempool_base;
phys_addr_t phys_mempool_size;
};
......
......@@ -629,6 +629,8 @@ int omap_hwmod_no_setup_reset(struct omap_hwmod *oh);
int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx);
extern void __init omap_hwmod_init(void);
/*
* Chip variant-specific hwmod init routines - XXX should be converted
* to use initcalls once the initial boot ordering is straightened out
......
......@@ -44,6 +44,8 @@ struct usbhs_omap_board_data {
struct regulator *regulator[OMAP3_HS_USB_PORTS];
};
#ifdef CONFIG_ARCH_OMAP2PLUS
struct ehci_hcd_omap_platform_data {
enum usbhs_omap_port_mode port_mode[OMAP3_HS_USB_PORTS];
int reset_gpio_port[OMAP3_HS_USB_PORTS];
......@@ -64,26 +66,6 @@ struct usbhs_omap_platform_data {
};
/*-------------------------------------------------------------------------*/
#define OMAP1_OTG_BASE 0xfffb0400
#define OMAP1_UDC_BASE 0xfffb4000
#define OMAP1_OHCI_BASE 0xfffba000
#define OMAP2_OHCI_BASE 0x4805e000
#define OMAP2_UDC_BASE 0x4805e200
#define OMAP2_OTG_BASE 0x4805e300
#ifdef CONFIG_ARCH_OMAP1
#define OTG_BASE OMAP1_OTG_BASE
#define UDC_BASE OMAP1_UDC_BASE
#define OMAP_OHCI_BASE OMAP1_OHCI_BASE
#else
#define OTG_BASE OMAP2_OTG_BASE
#define UDC_BASE OMAP2_UDC_BASE
#define OMAP_OHCI_BASE OMAP2_OHCI_BASE
struct omap_musb_board_data {
u8 interface_type;
u8 mode;
......@@ -107,44 +89,6 @@ extern int omap4430_phy_init(struct device *dev);
extern int omap4430_phy_exit(struct device *dev);
extern int omap4430_phy_suspend(struct device *dev, int suspend);
/*
* NOTE: Please update omap USB drivers to use ioremap + read/write
*/
#define OMAP2_L4_IO_OFFSET 0xb2000000
#define OMAP2_L4_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L4_IO_OFFSET)
static inline u8 omap_readb(u32 pa)
{
return __raw_readb(OMAP2_L4_IO_ADDRESS(pa));
}
static inline u16 omap_readw(u32 pa)
{
return __raw_readw(OMAP2_L4_IO_ADDRESS(pa));
}
static inline u32 omap_readl(u32 pa)
{
return __raw_readl(OMAP2_L4_IO_ADDRESS(pa));
}
static inline void omap_writeb(u8 v, u32 pa)
{
__raw_writeb(v, OMAP2_L4_IO_ADDRESS(pa));
}
static inline void omap_writew(u16 v, u32 pa)
{
__raw_writew(v, OMAP2_L4_IO_ADDRESS(pa));
}
static inline void omap_writel(u32 v, u32 pa)
{
__raw_writel(v, OMAP2_L4_IO_ADDRESS(pa));
}
#endif
extern void am35x_musb_reset(void);
......@@ -153,142 +97,6 @@ extern void am35x_musb_clear_irq(void);
extern void am35x_set_mode(u8 musb_mode);
extern void ti81xx_musb_phy_power(u8 on);
/*
* FIXME correct answer depends on hmc_mode,
* as does (on omap1) any nonzero value for config->otg port number
*/
#ifdef CONFIG_USB_GADGET_OMAP
#define is_usb0_device(config) 1
#else
#define is_usb0_device(config) 0
#endif
void omap_otg_init(struct omap_usb_config *config);
#if defined(CONFIG_USB) || defined(CONFIG_USB_MODULE)
void omap1_usb_init(struct omap_usb_config *pdata);
#else
static inline void omap1_usb_init(struct omap_usb_config *pdata)
{
}
#endif
#if defined(CONFIG_ARCH_OMAP_OTG) || defined(CONFIG_ARCH_OMAP_OTG_MODULE)
void omap2_usbfs_init(struct omap_usb_config *pdata);
#else
static inline void omap2_usbfs_init(struct omap_usb_config *pdata)
{
}
#endif
/*-------------------------------------------------------------------------*/
/*
* OTG and transceiver registers, for OMAPs starting with ARM926
*/
#define OTG_REV (OTG_BASE + 0x00)
#define OTG_SYSCON_1 (OTG_BASE + 0x04)
# define USB2_TRX_MODE(w) (((w)>>24)&0x07)
# define USB1_TRX_MODE(w) (((w)>>20)&0x07)
# define USB0_TRX_MODE(w) (((w)>>16)&0x07)
# define OTG_IDLE_EN (1 << 15)
# define HST_IDLE_EN (1 << 14)
# define DEV_IDLE_EN (1 << 13)
# define OTG_RESET_DONE (1 << 2)
# define OTG_SOFT_RESET (1 << 1)
#define OTG_SYSCON_2 (OTG_BASE + 0x08)
# define OTG_EN (1 << 31)
# define USBX_SYNCHRO (1 << 30)
# define OTG_MST16 (1 << 29)
# define SRP_GPDATA (1 << 28)
# define SRP_GPDVBUS (1 << 27)
# define SRP_GPUVBUS(w) (((w)>>24)&0x07)
# define A_WAIT_VRISE(w) (((w)>>20)&0x07)
# define B_ASE_BRST(w) (((w)>>16)&0x07)
# define SRP_DPW (1 << 14)
# define SRP_DATA (1 << 13)
# define SRP_VBUS (1 << 12)
# define OTG_PADEN (1 << 10)
# define HMC_PADEN (1 << 9)
# define UHOST_EN (1 << 8)
# define HMC_TLLSPEED (1 << 7)
# define HMC_TLLATTACH (1 << 6)
# define OTG_HMC(w) (((w)>>0)&0x3f)
#define OTG_CTRL (OTG_BASE + 0x0c)
# define OTG_USB2_EN (1 << 29)
# define OTG_USB2_DP (1 << 28)
# define OTG_USB2_DM (1 << 27)
# define OTG_USB1_EN (1 << 26)
# define OTG_USB1_DP (1 << 25)
# define OTG_USB1_DM (1 << 24)
# define OTG_USB0_EN (1 << 23)
# define OTG_USB0_DP (1 << 22)
# define OTG_USB0_DM (1 << 21)
# define OTG_ASESSVLD (1 << 20)
# define OTG_BSESSEND (1 << 19)
# define OTG_BSESSVLD (1 << 18)
# define OTG_VBUSVLD (1 << 17)
# define OTG_ID (1 << 16)
# define OTG_DRIVER_SEL (1 << 15)
# define OTG_A_SETB_HNPEN (1 << 12)
# define OTG_A_BUSREQ (1 << 11)
# define OTG_B_HNPEN (1 << 9)
# define OTG_B_BUSREQ (1 << 8)
# define OTG_BUSDROP (1 << 7)
# define OTG_PULLDOWN (1 << 5)
# define OTG_PULLUP (1 << 4)
# define OTG_DRV_VBUS (1 << 3)
# define OTG_PD_VBUS (1 << 2)
# define OTG_PU_VBUS (1 << 1)
# define OTG_PU_ID (1 << 0)
#define OTG_IRQ_EN (OTG_BASE + 0x10) /* 16-bit */
# define DRIVER_SWITCH (1 << 15)
# define A_VBUS_ERR (1 << 13)
# define A_REQ_TMROUT (1 << 12)
# define A_SRP_DETECT (1 << 11)
# define B_HNP_FAIL (1 << 10)
# define B_SRP_TMROUT (1 << 9)
# define B_SRP_DONE (1 << 8)
# define B_SRP_STARTED (1 << 7)
# define OPRT_CHG (1 << 0)
#define OTG_IRQ_SRC (OTG_BASE + 0x14) /* 16-bit */
// same bits as in IRQ_EN
#define OTG_OUTCTRL (OTG_BASE + 0x18) /* 16-bit */
# define OTGVPD (1 << 14)
# define OTGVPU (1 << 13)
# define OTGPUID (1 << 12)
# define USB2VDR (1 << 10)
# define USB2PDEN (1 << 9)
# define USB2PUEN (1 << 8)
# define USB1VDR (1 << 6)
# define USB1PDEN (1 << 5)
# define USB1PUEN (1 << 4)
# define USB0VDR (1 << 2)
# define USB0PDEN (1 << 1)
# define USB0PUEN (1 << 0)
#define OTG_TEST (OTG_BASE + 0x20) /* 16-bit */
#define OTG_VENDOR_CODE (OTG_BASE + 0xfc) /* 16-bit */
/*-------------------------------------------------------------------------*/
/* OMAP1 */
#define USB_TRANSCEIVER_CTRL (0xfffe1000 + 0x0064)
# define CONF_USB2_UNI_R (1 << 8)
# define CONF_USB1_UNI_R (1 << 7)
# define CONF_USB_PORT0_R(x) (((x)>>4)&0x7)
# define CONF_USB0_ISOLATE_R (1 << 3)
# define CONF_USB_PWRDN_DM_R (1 << 2)
# define CONF_USB_PWRDN_DP_R (1 << 1)
/* OMAP2 */
# define USB_UNIDIR 0x0
# define USB_UNIDIR_TLL 0x1
# define USB_BIDIR 0x2
# define USB_BIDIR_TLL 0x3
# define USBTXWRMODEI(port, x) ((x) << (22 - (port * 2)))
# define USBT2TLL5PI (1 << 17)
# define USB0PUENACTLOI (1 << 16)
# define USBSTANDBYCTRL (1 << 15)
/* AM35x */
/* USB 2.0 PHY Control */
#define CONF2_PHY_GPIOMODE (1 << 23)
......
/*
* arch/arm/plat-omap/usb.c -- platform level USB initialization
*
* Copyright (C) 2004 Texas Instruments, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#undef DEBUG
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/io.h>
#include <plat/usb.h>
#include <plat/board.h>
#include <mach/hardware.h>
#ifdef CONFIG_ARCH_OMAP_OTG
void __init
omap_otg_init(struct omap_usb_config *config)
{
u32 syscon;
int alt_pingroup = 0;
/* NOTE: no bus or clock setup (yet?) */
syscon = omap_readl(OTG_SYSCON_1) & 0xffff;
if (!(syscon & OTG_RESET_DONE))
pr_debug("USB resets not complete?\n");
//omap_writew(0, OTG_IRQ_EN);
/* pin muxing and transceiver pinouts */
if (config->pins[0] > 2) /* alt pingroup 2 */
alt_pingroup = 1;
syscon |= config->usb0_init(config->pins[0], is_usb0_device(config));
syscon |= config->usb1_init(config->pins[1]);
syscon |= config->usb2_init(config->pins[2], alt_pingroup);
pr_debug("OTG_SYSCON_1 = %08x\n", omap_readl(OTG_SYSCON_1));
omap_writel(syscon, OTG_SYSCON_1);
syscon = config->hmc_mode;
syscon |= USBX_SYNCHRO | (4 << 16) /* B_ASE0_BRST */;
#ifdef CONFIG_USB_OTG
if (config->otg)
syscon |= OTG_EN;
#endif
if (cpu_class_is_omap1())
pr_debug("USB_TRANSCEIVER_CTRL = %03x\n",
omap_readl(USB_TRANSCEIVER_CTRL));
pr_debug("OTG_SYSCON_2 = %08x\n", omap_readl(OTG_SYSCON_2));
omap_writel(syscon, OTG_SYSCON_2);
printk("USB: hmc %d", config->hmc_mode);
if (!alt_pingroup)
printk(", usb2 alt %d wires", config->pins[2]);
else if (config->pins[0])
printk(", usb0 %d wires%s", config->pins[0],
is_usb0_device(config) ? " (dev)" : "");
if (config->pins[1])
printk(", usb1 %d wires", config->pins[1]);
if (!alt_pingroup && config->pins[2])
printk(", usb2 %d wires", config->pins[2]);
if (config->otg)
printk(", Mini-AB on usb%d", config->otg - 1);
printk("\n");
if (cpu_class_is_omap1()) {
u16 w;
/* leave USB clocks/controllers off until needed */
w = omap_readw(ULPD_SOFT_REQ);
w &= ~SOFT_USB_CLK_REQ;
omap_writew(w, ULPD_SOFT_REQ);
w = omap_readw(ULPD_CLOCK_CTRL);
w &= ~USB_MCLK_EN;
w |= DIS_USB_PVCI_CLK;
omap_writew(w, ULPD_CLOCK_CTRL);
}
syscon = omap_readl(OTG_SYSCON_1);
syscon |= HST_IDLE_EN|DEV_IDLE_EN|OTG_IDLE_EN;
#ifdef CONFIG_USB_GADGET_OMAP
if (config->otg || config->register_dev) {
struct platform_device *udc_device = config->udc_device;
int status;
syscon &= ~DEV_IDLE_EN;
udc_device->dev.platform_data = config;
status = platform_device_register(udc_device);
if (status)
pr_debug("can't register UDC device, %d\n", status);
}
#endif
#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
if (config->otg || config->register_host) {
struct platform_device *ohci_device = config->ohci_device;
int status;
syscon &= ~HST_IDLE_EN;
ohci_device->dev.platform_data = config;
status = platform_device_register(ohci_device);
if (status)
pr_debug("can't register OHCI device, %d\n", status);
}
#endif
#ifdef CONFIG_USB_OTG
if (config->otg) {
struct platform_device *otg_device = config->otg_device;
int status;
syscon &= ~OTG_IDLE_EN;
otg_device->dev.platform_data = config;
status = platform_device_register(otg_device);
if (status)
pr_debug("can't register OTG device, %d\n", status);
}
#endif
pr_debug("OTG_SYSCON_1 = %08x\n", omap_readl(OTG_SYSCON_1));
omap_writel(syscon, OTG_SYSCON_1);
}
#else
void omap_otg_init(struct omap_usb_config *config) {}
#endif
......@@ -185,7 +185,7 @@ config USB_FUSB300
config USB_OMAP
tristate "OMAP USB Device Controller"
depends on ARCH_OMAP
depends on ARCH_OMAP1
select ISP1301_OMAP if MACH_OMAP_H2 || MACH_OMAP_H3 || MACH_OMAP_H4_OTG
select USB_OTG_UTILS if ARCH_OMAP
help
......
......@@ -44,7 +44,8 @@
#include <asm/mach-types.h>
#include <plat/dma.h>
#include <plat/usb.h>
#include <mach/usb.h>
#include "omap_udc.h"
......
......@@ -308,7 +308,7 @@ config USB_OHCI_HCD
config USB_OHCI_HCD_OMAP1
bool "OHCI support for OMAP1/2 chips"
depends on USB_OHCI_HCD && (ARCH_OMAP1 || ARCH_OMAP2)
depends on USB_OHCI_HCD && ARCH_OMAP1
default y
---help---
Enables support for the OHCI controller on OMAP1/2 chips.
......
......@@ -20,14 +20,15 @@
#include <linux/clk.h>
#include <linux/gpio.h>
#include <mach/hardware.h>
#include <asm/io.h>
#include <asm/mach-types.h>
#include <plat/mux.h>
#include <mach/irqs.h>
#include <plat/fpga.h>
#include <plat/usb.h>
#include <mach/hardware.h>
#include <mach/irqs.h>
#include <mach/usb.h>
/* OMAP-1510 OHCI has its own MMU for DMA */
......
......@@ -36,9 +36,9 @@
#include <asm/irq.h>
#include <asm/mach-types.h>
#include <plat/usb.h>
#include <plat/mux.h>
#include <mach/usb.h>
#ifndef DEBUG
#undef VERBOSE
......
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