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Commit 211daf9d authored by Mike Frysinger's avatar Mike Frysinger Committed by Bryan Wu
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Blackfin arch: rename MAX_BLACKFIN_DMA_CHANNEL to MAX_DMA_CHANNELS to match everyone else 

Signed-off-by: default avatarMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: default avatarBryan Wu <cooloney@kernel.org>
parent 3e706cfc
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Showing with 23 additions and 23 deletions
arch/blackfin/include/asm/dma.h
View file @ 211daf9d
......@@ -201,6 +201,6 @@ void *dma_memcpy(void *dest, const void *src, size_t count);
void *safe_dma_memcpy(void *dest, const void *src, size_t count);
extern int channel2irq(unsigned int channel);
extern struct dma_register *dma_io_base_addr[MAX_BLACKFIN_DMA_CHANNEL];
extern struct dma_register *dma_io_base_addr[MAX_DMA_CHANNELS];
#endif
arch/blackfin/kernel/bfin_dma_5xx.c
View file @ 211daf9d
......@@ -44,7 +44,7 @@
* Global Variables
***************************************************************************/
static struct dma_channel dma_ch[MAX_BLACKFIN_DMA_CHANNEL];
static struct dma_channel dma_ch[MAX_DMA_CHANNELS];
/*------------------------------------------------------------------------------
* Set the Buffer Clear bit in the Configuration register of specific DMA
......@@ -63,7 +63,7 @@ static int __init blackfin_dma_init(void)
printk(KERN_INFO "Blackfin DMA Controller\n");
for (i = 0; i < MAX_BLACKFIN_DMA_CHANNEL; i++) {
for (i = 0; i < MAX_DMA_CHANNELS; i++) {
dma_ch[i].chan_status = DMA_CHANNEL_FREE;
dma_ch[i].regs = dma_io_base_addr[i];
mutex_init(&(dma_ch[i].dmalock));
......@@ -87,7 +87,7 @@ static int proc_dma_show(struct seq_file *m, void *v)
{
int i;
for (i = 0 ; i < MAX_BLACKFIN_DMA_CHANNEL; ++i)
for (i = 0 ; i < MAX_DMA_CHANNELS; ++i)
if (dma_ch[i].chan_status != DMA_CHANNEL_FREE)
seq_printf(m, "%2d: %s\n", i, dma_ch[i].device_id);
......@@ -175,7 +175,7 @@ EXPORT_SYMBOL(request_dma);
int set_dma_callback(unsigned int channel, dma_interrupt_t callback, void *data)
{
BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE
&& channel < MAX_BLACKFIN_DMA_CHANNEL));
&& channel < MAX_DMA_CHANNELS));
if (callback != NULL) {
int ret_val;
......@@ -200,7 +200,7 @@ void free_dma(unsigned int channel)
{
pr_debug("freedma() : BEGIN \n");
BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE
&& channel < MAX_BLACKFIN_DMA_CHANNEL));
&& channel < MAX_DMA_CHANNELS));
/* Halt the DMA */
disable_dma(channel);
......@@ -418,7 +418,7 @@ int blackfin_dma_suspend(void)
#ifdef CONFIG_BF561 /* IMDMA channels doesn't have a PERIPHERAL_MAP */
for (i = 0; i <= CH_MEM_STREAM3_SRC; i++) {
#else
for (i = 0; i < MAX_BLACKFIN_DMA_CHANNEL; i++) {
for (i = 0; i < MAX_DMA_CHANNELS; i++) {
#endif
if (dma_ch[i].chan_status == DMA_CHANNEL_ENABLED) {
printk(KERN_ERR "DMA Channel %d failed to suspend\n", i);
......@@ -438,7 +438,7 @@ void blackfin_dma_resume(void)
#ifdef CONFIG_BF561 /* IMDMA channels doesn't have a PERIPHERAL_MAP */
for (i = 0; i <= CH_MEM_STREAM3_SRC; i++)
#else
for (i = 0; i < MAX_BLACKFIN_DMA_CHANNEL; i++)
for (i = 0; i < MAX_DMA_CHANNELS; i++)
#endif
dma_ch[i].regs->peripheral_map = dma_ch[i].saved_peripheral_map;
}
......
arch/blackfin/mach-bf518/dma.c
View file @ 211daf9d
......@@ -31,7 +31,7 @@
#include <asm/blackfin.h>
#include <asm/dma.h>
struct dma_register *dma_io_base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
struct dma_register *dma_io_base_addr[MAX_DMA_CHANNELS] = {
(struct dma_register *) DMA0_NEXT_DESC_PTR,
(struct dma_register *) DMA1_NEXT_DESC_PTR,
(struct dma_register *) DMA2_NEXT_DESC_PTR,
......
arch/blackfin/mach-bf518/include/mach/dma.h
View file @ 211daf9d
......@@ -32,7 +32,7 @@
#ifndef _MACH_DMA_H_
#define _MACH_DMA_H_
#define MAX_BLACKFIN_DMA_CHANNEL 16
#define MAX_DMA_CHANNELS 16
#define CH_PPI 0 /* PPI receive/transmit */
#define CH_EMAC_RX 1 /* Ethernet MAC receive */
......
arch/blackfin/mach-bf527/dma.c
View file @ 211daf9d
......@@ -31,7 +31,7 @@
#include <asm/blackfin.h>
#include <asm/dma.h>
struct dma_register *dma_io_base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
struct dma_register *dma_io_base_addr[MAX_DMA_CHANNELS] = {
(struct dma_register *) DMA0_NEXT_DESC_PTR,
(struct dma_register *) DMA1_NEXT_DESC_PTR,
(struct dma_register *) DMA2_NEXT_DESC_PTR,
......
arch/blackfin/mach-bf527/include/mach/dma.h
View file @ 211daf9d
......@@ -32,7 +32,7 @@
#ifndef _MACH_DMA_H_
#define _MACH_DMA_H_
#define MAX_BLACKFIN_DMA_CHANNEL 16
#define MAX_DMA_CHANNELS 16
#define CH_PPI 0 /* PPI receive/transmit or NFC */
#define CH_EMAC_RX 1 /* Ethernet MAC receive or HOSTDP */
......
arch/blackfin/mach-bf533/dma.c
View file @ 211daf9d
......@@ -31,7 +31,7 @@
#include <asm/blackfin.h>
#include <asm/dma.h>
struct dma_register *dma_io_base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
struct dma_register *dma_io_base_addr[MAX_DMA_CHANNELS] = {
(struct dma_register *) DMA0_NEXT_DESC_PTR,
(struct dma_register *) DMA1_NEXT_DESC_PTR,
(struct dma_register *) DMA2_NEXT_DESC_PTR,
......
arch/blackfin/mach-bf533/include/mach/dma.h
View file @ 211daf9d
......@@ -36,7 +36,7 @@
#ifndef _MACH_DMA_H_
#define _MACH_DMA_H_
#define MAX_BLACKFIN_DMA_CHANNEL 12
#define MAX_DMA_CHANNELS 12
#define CH_PPI 0
#define CH_SPORT0_RX 1
......
arch/blackfin/mach-bf537/dma.c
View file @ 211daf9d
......@@ -31,7 +31,7 @@
#include <asm/blackfin.h>
#include <asm/dma.h>
struct dma_register *dma_io_base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
struct dma_register *dma_io_base_addr[MAX_DMA_CHANNELS] = {
(struct dma_register *) DMA0_NEXT_DESC_PTR,
(struct dma_register *) DMA1_NEXT_DESC_PTR,
(struct dma_register *) DMA2_NEXT_DESC_PTR,
......
arch/blackfin/mach-bf537/include/mach/dma.h
View file @ 211daf9d
......@@ -32,7 +32,7 @@
#ifndef _MACH_DMA_H_
#define _MACH_DMA_H_
#define MAX_BLACKFIN_DMA_CHANNEL 16
#define MAX_DMA_CHANNELS 16
#define CH_PPI 0
#define CH_EMAC_RX 1
......
arch/blackfin/mach-bf538/dma.c
View file @ 211daf9d
......@@ -31,7 +31,7 @@
#include <asm/blackfin.h>
#include <asm/dma.h>
struct dma_register *dma_io_base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
struct dma_register *dma_io_base_addr[MAX_DMA_CHANNELS] = {
(struct dma_register *) DMA0_NEXT_DESC_PTR,
(struct dma_register *) DMA1_NEXT_DESC_PTR,
(struct dma_register *) DMA2_NEXT_DESC_PTR,
......
arch/blackfin/mach-bf538/include/mach/dma.h
View file @ 211daf9d
......@@ -60,6 +60,6 @@
#define CH_MEM_STREAM3_DEST 26
#define CH_MEM_STREAM3_SRC 27
#define MAX_BLACKFIN_DMA_CHANNEL 28
#define MAX_DMA_CHANNELS 28
#endif
arch/blackfin/mach-bf548/dma.c
View file @ 211daf9d
......@@ -32,7 +32,7 @@
#include <asm/blackfin.h>
#include <asm/dma.h>
struct dma_register *dma_io_base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
struct dma_register *dma_io_base_addr[MAX_DMA_CHANNELS] = {
(struct dma_register *) DMA0_NEXT_DESC_PTR,
(struct dma_register *) DMA1_NEXT_DESC_PTR,
(struct dma_register *) DMA2_NEXT_DESC_PTR,
......
arch/blackfin/mach-bf548/include/mach/dma.h
View file @ 211daf9d
......@@ -71,6 +71,6 @@
#define CH_MEM_STREAM3_DEST 30
#define CH_MEM_STREAM3_SRC 31
#define MAX_BLACKFIN_DMA_CHANNEL 32
#define MAX_DMA_CHANNELS 32
#endif
arch/blackfin/mach-bf561/dma.c
View file @ 211daf9d
......@@ -31,7 +31,7 @@
#include <asm/blackfin.h>
#include <asm/dma.h>
struct dma_register *dma_io_base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
struct dma_register *dma_io_base_addr[MAX_DMA_CHANNELS] = {
(struct dma_register *) DMA1_0_NEXT_DESC_PTR,
(struct dma_register *) DMA1_1_NEXT_DESC_PTR,
(struct dma_register *) DMA1_2_NEXT_DESC_PTR,
......
arch/blackfin/mach-bf561/include/mach/dma.h
View file @ 211daf9d
......@@ -7,7 +7,7 @@
#ifndef _MACH_DMA_H_
#define _MACH_DMA_H_
#define MAX_BLACKFIN_DMA_CHANNEL 36
#define MAX_DMA_CHANNELS 36
#define CH_PPI0 0
#define CH_PPI (CH_PPI0)
......
arch/blackfin/mach-common/clocks-init.c
View file @ 211daf9d
......@@ -32,7 +32,7 @@ void init_clocks(void)
* For example, any automatic DMAs left by U-Boot for splash screens.
*/
size_t i;
for (i = 0; i < MAX_BLACKFIN_DMA_CHANNEL; ++i) {
for (i = 0; i < MAX_DMA_CHANNELS; ++i) {
struct dma_register *dma = dma_io_base_addr[i];
dma->cfg = 0;
}
......
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