Commit 212a6aee authored by Dmitry Osipenko's avatar Dmitry Osipenko Committed by Thierry Reding

arm64: tegra: Add new USB PHY properties on Tegra132

Add new properties to USB PHYs needed for enabling USB OTG mode.
Signed-off-by: default avatarDmitry Osipenko <digetx@gmail.com>
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent 70ad4886
...@@ -1123,6 +1123,7 @@ phy1: usb-phy@7d000000 { ...@@ -1123,6 +1123,7 @@ phy1: usb-phy@7d000000 {
compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy"; compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy";
reg = <0x0 0x7d000000 0x0 0x4000>, reg = <0x0 0x7d000000 0x0 0x4000>,
<0x0 0x7d000000 0x0 0x4000>; <0x0 0x7d000000 0x0 0x4000>;
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
phy_type = "utmi"; phy_type = "utmi";
clocks = <&tegra_car TEGRA124_CLK_USBD>, clocks = <&tegra_car TEGRA124_CLK_USBD>,
<&tegra_car TEGRA124_CLK_PLL_U>, <&tegra_car TEGRA124_CLK_PLL_U>,
...@@ -1142,6 +1143,7 @@ phy1: usb-phy@7d000000 { ...@@ -1142,6 +1143,7 @@ phy1: usb-phy@7d000000 {
nvidia,hsdiscon-level = <5>; nvidia,hsdiscon-level = <5>;
nvidia,xcvr-hsslew = <12>; nvidia,xcvr-hsslew = <12>;
nvidia,has-utmi-pad-registers; nvidia,has-utmi-pad-registers;
nvidia,pmc = <&tegra_pmc 0>;
status = "disabled"; status = "disabled";
}; };
...@@ -1162,6 +1164,7 @@ phy2: usb-phy@7d004000 { ...@@ -1162,6 +1164,7 @@ phy2: usb-phy@7d004000 {
compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy"; compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy";
reg = <0x0 0x7d004000 0x0 0x4000>, reg = <0x0 0x7d004000 0x0 0x4000>,
<0x0 0x7d000000 0x0 0x4000>; <0x0 0x7d000000 0x0 0x4000>;
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
phy_type = "utmi"; phy_type = "utmi";
clocks = <&tegra_car TEGRA124_CLK_USB2>, clocks = <&tegra_car TEGRA124_CLK_USB2>,
<&tegra_car TEGRA124_CLK_PLL_U>, <&tegra_car TEGRA124_CLK_PLL_U>,
...@@ -1180,6 +1183,7 @@ phy2: usb-phy@7d004000 { ...@@ -1180,6 +1183,7 @@ phy2: usb-phy@7d004000 {
nvidia,hssquelch-level = <2>; nvidia,hssquelch-level = <2>;
nvidia,hsdiscon-level = <5>; nvidia,hsdiscon-level = <5>;
nvidia,xcvr-hsslew = <12>; nvidia,xcvr-hsslew = <12>;
nvidia,pmc = <&tegra_pmc 1>;
status = "disabled"; status = "disabled";
}; };
...@@ -1200,6 +1204,7 @@ phy3: usb-phy@7d008000 { ...@@ -1200,6 +1204,7 @@ phy3: usb-phy@7d008000 {
compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy"; compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy";
reg = <0x0 0x7d008000 0x0 0x4000>, reg = <0x0 0x7d008000 0x0 0x4000>,
<0x0 0x7d000000 0x0 0x4000>; <0x0 0x7d000000 0x0 0x4000>;
interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
phy_type = "utmi"; phy_type = "utmi";
clocks = <&tegra_car TEGRA124_CLK_USB3>, clocks = <&tegra_car TEGRA124_CLK_USB3>,
<&tegra_car TEGRA124_CLK_PLL_U>, <&tegra_car TEGRA124_CLK_PLL_U>,
...@@ -1218,6 +1223,7 @@ phy3: usb-phy@7d008000 { ...@@ -1218,6 +1223,7 @@ phy3: usb-phy@7d008000 {
nvidia,hssquelch-level = <2>; nvidia,hssquelch-level = <2>;
nvidia,hsdiscon-level = <5>; nvidia,hsdiscon-level = <5>;
nvidia,xcvr-hsslew = <12>; nvidia,xcvr-hsslew = <12>;
nvidia,pmc = <&tegra_pmc 2>;
status = "disabled"; status = "disabled";
}; };
......
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