Commit 212b0212 authored by Suresh Siddha's avatar Suresh Siddha Committed by H. Peter Anvin

x86, fpu: enable eagerfpu by default for xsaveopt

xsaveopt/xrstor support optimized state save/restore by tracking the
INIT state and MODIFIED state during context-switch.

Enable eagerfpu by default for processors supporting xsaveopt.
Can be disabled by passing "eagerfpu=off" boot parameter.
Signed-off-by: default avatarSuresh Siddha <suresh.b.siddha@intel.com>
Link: http://lkml.kernel.org/r/1347300665-6209-3-git-send-email-suresh.b.siddha@intel.comSigned-off-by: default avatarH. Peter Anvin <hpa@linux.intel.com>
parent 5d2bd700
...@@ -1834,7 +1834,7 @@ bytes respectively. Such letter suffixes can also be entirely omitted. ...@@ -1834,7 +1834,7 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
enabling legacy floating-point and sse state. enabling legacy floating-point and sse state.
eagerfpu= [X86] eagerfpu= [X86]
on enable eager fpu restore on enable eager fpu restore (default for xsaveopt)
off disable eager fpu restore off disable eager fpu restore
nohlt [BUGS=ARM,SH] Tells the kernel that the sleep(SH) or nohlt [BUGS=ARM,SH] Tells the kernel that the sleep(SH) or
......
...@@ -300,6 +300,7 @@ extern const char * const x86_power_flags[32]; ...@@ -300,6 +300,7 @@ extern const char * const x86_power_flags[32];
#define cpu_has_xmm4_2 boot_cpu_has(X86_FEATURE_XMM4_2) #define cpu_has_xmm4_2 boot_cpu_has(X86_FEATURE_XMM4_2)
#define cpu_has_x2apic boot_cpu_has(X86_FEATURE_X2APIC) #define cpu_has_x2apic boot_cpu_has(X86_FEATURE_X2APIC)
#define cpu_has_xsave boot_cpu_has(X86_FEATURE_XSAVE) #define cpu_has_xsave boot_cpu_has(X86_FEATURE_XSAVE)
#define cpu_has_xsaveopt boot_cpu_has(X86_FEATURE_XSAVEOPT)
#define cpu_has_osxsave boot_cpu_has(X86_FEATURE_OSXSAVE) #define cpu_has_osxsave boot_cpu_has(X86_FEATURE_OSXSAVE)
#define cpu_has_hypervisor boot_cpu_has(X86_FEATURE_HYPERVISOR) #define cpu_has_hypervisor boot_cpu_has(X86_FEATURE_HYPERVISOR)
#define cpu_has_pclmulqdq boot_cpu_has(X86_FEATURE_PCLMULQDQ) #define cpu_has_pclmulqdq boot_cpu_has(X86_FEATURE_PCLMULQDQ)
......
...@@ -557,6 +557,9 @@ static void __init xstate_enable_boot_cpu(void) ...@@ -557,6 +557,9 @@ static void __init xstate_enable_boot_cpu(void)
prepare_fx_sw_frame(); prepare_fx_sw_frame();
setup_init_fpu_buf(); setup_init_fpu_buf();
if (cpu_has_xsaveopt && !disable_eagerfpu)
setup_force_cpu_cap(X86_FEATURE_EAGER_FPU);
pr_info("enabled xstate_bv 0x%llx, cntxt size 0x%x\n", pr_info("enabled xstate_bv 0x%llx, cntxt size 0x%x\n",
pcntxt_mask, xstate_size); pcntxt_mask, xstate_size);
} }
......
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