Commit 21a0502d authored by Maxim Mikityanskiy's avatar Maxim Mikityanskiy Committed by Jakub Kicinski

net/mlx5e: Use the aligned max TX MPWQE size

TX MPWQE size is limited to the cacheline-aligned maximum. Use the same
value for the stop room and the capability check.
Signed-off-by: default avatarMaxim Mikityanskiy <maximmi@nvidia.com>
Reviewed-by: default avatarTariq Toukan <tariqt@nvidia.com>
Reviewed-by: default avatarSaeed Mahameed <saeedm@nvidia.com>
Signed-off-by: default avatarSaeed Mahameed <saeedm@nvidia.com>
Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent e3c4c496
...@@ -209,11 +209,11 @@ u16 mlx5e_calc_sq_stop_room(struct mlx5_core_dev *mdev, struct mlx5e_params *par ...@@ -209,11 +209,11 @@ u16 mlx5e_calc_sq_stop_room(struct mlx5_core_dev *mdev, struct mlx5e_params *par
stop_room = mlx5e_ktls_get_stop_room(mdev, params); stop_room = mlx5e_ktls_get_stop_room(mdev, params);
stop_room += mlx5e_stop_room_for_max_wqe(mdev); stop_room += mlx5e_stop_room_for_max_wqe(mdev);
if (is_mpwqe) if (is_mpwqe)
/* A MPWQE can take up to the maximum-sized WQE + all the normal /* A MPWQE can take up to the maximum cacheline-aligned WQE +
* stop room can be taken if a new packet breaks the active * all the normal stop room can be taken if a new packet breaks
* MPWQE session and allocates its WQEs right away. * the active MPWQE session and allocates its WQEs right away.
*/ */
stop_room += mlx5e_stop_room_for_max_wqe(mdev); stop_room += mlx5e_stop_room_for_mpwqe(mdev);
return stop_room; return stop_room;
} }
......
...@@ -439,6 +439,13 @@ static inline u16 mlx5e_stop_room_for_max_wqe(struct mlx5_core_dev *mdev) ...@@ -439,6 +439,13 @@ static inline u16 mlx5e_stop_room_for_max_wqe(struct mlx5_core_dev *mdev)
return MLX5E_STOP_ROOM(mlx5e_get_max_sq_wqebbs(mdev)); return MLX5E_STOP_ROOM(mlx5e_get_max_sq_wqebbs(mdev));
} }
static inline u16 mlx5e_stop_room_for_mpwqe(struct mlx5_core_dev *mdev)
{
u8 mpwqe_wqebbs = mlx5e_get_max_sq_aligned_wqebbs(mdev);
return mlx5e_stop_room_for_wqe(mdev, mpwqe_wqebbs);
}
static inline bool mlx5e_icosq_can_post_wqe(struct mlx5e_icosq *sq, u16 wqe_size) static inline bool mlx5e_icosq_can_post_wqe(struct mlx5e_icosq *sq, u16 wqe_size)
{ {
u16 room = sq->reserved_room; u16 room = sq->reserved_room;
......
...@@ -75,7 +75,7 @@ bool mlx5e_check_fragmented_striding_rq_cap(struct mlx5_core_dev *mdev) ...@@ -75,7 +75,7 @@ bool mlx5e_check_fragmented_striding_rq_cap(struct mlx5_core_dev *mdev)
striding_rq_umr = MLX5_CAP_GEN(mdev, striding_rq) && MLX5_CAP_GEN(mdev, umr_ptr_rlky) && striding_rq_umr = MLX5_CAP_GEN(mdev, striding_rq) && MLX5_CAP_GEN(mdev, umr_ptr_rlky) &&
MLX5_CAP_ETH(mdev, reg_umr_sq); MLX5_CAP_ETH(mdev, reg_umr_sq);
max_wqe_sz_cap = mlx5e_get_max_sq_wqebbs(mdev) * MLX5_SEND_WQE_BB; max_wqe_sz_cap = mlx5e_get_max_sq_aligned_wqebbs(mdev) * MLX5_SEND_WQE_BB;
inline_umr = max_wqe_sz_cap >= MLX5E_UMR_WQE_INLINE_SZ; inline_umr = max_wqe_sz_cap >= MLX5E_UMR_WQE_INLINE_SZ;
if (!striding_rq_umr) if (!striding_rq_umr)
return false; return false;
...@@ -1155,7 +1155,8 @@ static int mlx5e_alloc_xdpsq(struct mlx5e_channel *c, ...@@ -1155,7 +1155,8 @@ static int mlx5e_alloc_xdpsq(struct mlx5e_channel *c,
is_redirect ? is_redirect ?
&c->priv->channel_stats[c->ix]->xdpsq : &c->priv->channel_stats[c->ix]->xdpsq :
&c->priv->channel_stats[c->ix]->rq_xdpsq; &c->priv->channel_stats[c->ix]->rq_xdpsq;
sq->stop_room = mlx5e_stop_room_for_max_wqe(mdev); sq->stop_room = param->is_mpw ? mlx5e_stop_room_for_mpwqe(mdev) :
mlx5e_stop_room_for_max_wqe(mdev);
sq->max_sq_mpw_wqebbs = mlx5e_get_max_sq_aligned_wqebbs(mdev); sq->max_sq_mpw_wqebbs = mlx5e_get_max_sq_aligned_wqebbs(mdev);
param->wq.db_numa_node = cpu_to_node(c->cpu); param->wq.db_numa_node = cpu_to_node(c->cpu);
......
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