Commit 2224fc9e authored by Cathy Zhang's avatar Cathy Zhang Committed by Paolo Bonzini

KVM: x86: Expose AVX512_FP16 for supported CPUID

AVX512_FP16 is supported by Intel processors, like Sapphire Rapids.
It could gain better performance for it's faster compared to FP32
if the precision or magnitude requirements are met. It's availability
is indicated by CPUID.(EAX=7,ECX=0):EDX[bit 23].

Expose it in KVM supported CPUID, then guest could make use of it; no
new registers are used, only new instructions.
Signed-off-by: default avatarCathy Zhang <cathy.zhang@intel.com>
Signed-off-by: default avatarKyung Min Park <kyung.min.park@intel.com>
Acked-by: default avatarDave Hansen <dave.hansen@intel.com>
Reviewed-by: default avatarTony Luck <tony.luck@intel.com>
Message-Id: <20201208033441.28207-3-kyung.min.park@intel.com>
Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
parent e1b35da5
...@@ -419,7 +419,7 @@ void kvm_set_cpu_caps(void) ...@@ -419,7 +419,7 @@ void kvm_set_cpu_caps(void)
F(AVX512_4VNNIW) | F(AVX512_4FMAPS) | F(SPEC_CTRL) | F(AVX512_4VNNIW) | F(AVX512_4FMAPS) | F(SPEC_CTRL) |
F(SPEC_CTRL_SSBD) | F(ARCH_CAPABILITIES) | F(INTEL_STIBP) | F(SPEC_CTRL_SSBD) | F(ARCH_CAPABILITIES) | F(INTEL_STIBP) |
F(MD_CLEAR) | F(AVX512_VP2INTERSECT) | F(FSRM) | F(MD_CLEAR) | F(AVX512_VP2INTERSECT) | F(FSRM) |
F(SERIALIZE) | F(TSXLDTRK) F(SERIALIZE) | F(TSXLDTRK) | F(AVX512_FP16)
); );
/* TSC_ADJUST and ARCH_CAPABILITIES are emulated in software. */ /* TSC_ADJUST and ARCH_CAPABILITIES are emulated in software. */
......
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