Commit 23878715 authored by Chancel Liu's avatar Chancel Liu Committed by Mark Brown

ASoC: fsl_sai: Fix pins setting for i.MX8QM platform

SAI on i.MX8QM platform supports the data lines up to 4. So the pins
setting should be corrected to 4.

Fixes: eba0f007 ("ASoC: fsl_sai: Enable combine mode soft")
Signed-off-by: default avatarChancel Liu <chancel.liu@nxp.com>
Acked-by: default avatarShengjiu Wang <shengjiu.wang@gmail.com>
Reviewed-by: default avatarIuliana Prodan <iuliana.prodan@nxp.com>
Link: https://lore.kernel.org/r/20230418094259.4150771-1-chancel.liu@nxp.comSigned-off-by: default avatarMark Brown <broonie@kernel.org>
parent 352e1eb1
......@@ -1546,7 +1546,7 @@ static const struct fsl_sai_soc_data fsl_sai_imx8qm_data = {
.use_imx_pcm = true,
.use_edma = true,
.fifo_depth = 64,
.pins = 1,
.pins = 4,
.reg_offset = 0,
.mclk0_is_mclk1 = false,
.flags = 0,
......
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