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Commit 23c73b24 authored by Dave Airlie's avatar Dave Airlie
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Merge branch 'drm-next-3.15' of git://people.freedesktop.org/~deathsimple/linux into drm-next 

this is the third pull request for 3.15 radeon changes. Highlights this time:
- More DP work from Alex, especially making use of the new DP aux helpers
- Marek's 1D and linear tiling fixes for CIK

* 'drm-next-3.15' of git://people.freedesktop.org/~deathsimple/linux:
  drm/radeon: set PIPE_CONFIG for 1D and linear tiling modes on CIK
  drm/radeon: use drm_dp_dpcd_read_link_status()
  drm/radeon: use the new drm helpers for dp aux
  drm/dp: make aux retries less chatty
  drm/radeon: clarify special handling in i2c over aux
  drm/radeon/atom: rework encoder enable/disable sequence
  drm/radeon/dp: move sink power control to a separate function
  drm/radeon/dp: use i2c_get_adapdata rather than casting
parents 63ac07cd 020ff546
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Showing with 202 additions and 203 deletions
drivers/gpu/drm/drm_dp_helper.c
View file @ 23c73b24
...@@ -402,7 +402,7 @@ static int drm_dp_dpcd_access(struct drm_dp_aux *aux, u8 request, ...@@ -402,7 +402,7 @@ static int drm_dp_dpcd_access(struct drm_dp_aux *aux, u8 request,
} }
} }
DRM_ERROR("too many retries, giving up\n"); DRM_DEBUG_KMS("too many retries, giving up\n");
return -EIO; return -EIO;
} }
...@@ -656,7 +656,7 @@ static int drm_dp_i2c_do_msg(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg) ...@@ -656,7 +656,7 @@ static int drm_dp_i2c_do_msg(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
} }
} }
DRM_ERROR("too many retries, giving up\n"); DRM_DEBUG_KMS("too many retries, giving up\n");
return -EREMOTEIO; return -EREMOTEIO;
} }
......
drivers/gpu/drm/radeon/atombios_dp.c
View file @ 23c73b24
This diff is collapsed.
drivers/gpu/drm/radeon/atombios_encoders.c
View file @ 23c73b24
...@@ -1633,10 +1633,16 @@ radeon_atom_encoder_dpms_dig(struct drm_encoder *encoder, int mode) ...@@ -1633,10 +1633,16 @@ radeon_atom_encoder_dpms_dig(struct drm_encoder *encoder, int mode)
struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
struct radeon_connector *radeon_connector = NULL; struct radeon_connector *radeon_connector = NULL;
struct radeon_connector_atom_dig *radeon_dig_connector = NULL; struct radeon_connector_atom_dig *radeon_dig_connector = NULL;
bool travis_quirk = false;
if (connector) { if (connector) {
radeon_connector = to_radeon_connector(connector); radeon_connector = to_radeon_connector(connector);
radeon_dig_connector = radeon_connector->con_priv; radeon_dig_connector = radeon_connector->con_priv;
if ((radeon_connector_encoder_get_dp_bridge_encoder_id(connector) ==
ENCODER_OBJECT_ID_TRAVIS) &&
(radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) &&
!ASIC_IS_DCE5(rdev))
travis_quirk = true;
} }
switch (mode) { switch (mode) {
...@@ -1657,17 +1663,13 @@ radeon_atom_encoder_dpms_dig(struct drm_encoder *encoder, int mode) ...@@ -1657,17 +1663,13 @@ radeon_atom_encoder_dpms_dig(struct drm_encoder *encoder, int mode)
atombios_external_encoder_setup(encoder, ext_encoder, atombios_external_encoder_setup(encoder, ext_encoder,
EXTERNAL_ENCODER_ACTION_V3_ENCODER_SETUP); EXTERNAL_ENCODER_ACTION_V3_ENCODER_SETUP);
} }
atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE, 0, 0);
} else if (ASIC_IS_DCE4(rdev)) { } else if (ASIC_IS_DCE4(rdev)) {
/* setup and enable the encoder */ /* setup and enable the encoder */
atombios_dig_encoder_setup(encoder, ATOM_ENCODER_CMD_SETUP, 0); atombios_dig_encoder_setup(encoder, ATOM_ENCODER_CMD_SETUP, 0);
/* enable the transmitter */
atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE, 0, 0);
} else { } else {
/* setup and enable the encoder and transmitter */ /* setup and enable the encoder and transmitter */
atombios_dig_encoder_setup(encoder, ATOM_ENABLE, 0); atombios_dig_encoder_setup(encoder, ATOM_ENABLE, 0);
atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_SETUP, 0, 0); atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_SETUP, 0, 0);
atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE, 0, 0);
} }
if (ENCODER_MODE_IS_DP(atombios_get_encoder_mode(encoder)) && connector) { if (ENCODER_MODE_IS_DP(atombios_get_encoder_mode(encoder)) && connector) {
if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) { if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) {
...@@ -1675,68 +1677,56 @@ radeon_atom_encoder_dpms_dig(struct drm_encoder *encoder, int mode) ...@@ -1675,68 +1677,56 @@ radeon_atom_encoder_dpms_dig(struct drm_encoder *encoder, int mode)
ATOM_TRANSMITTER_ACTION_POWER_ON); ATOM_TRANSMITTER_ACTION_POWER_ON);
radeon_dig_connector->edp_on = true; radeon_dig_connector->edp_on = true;
} }
}
/* enable the transmitter */
atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE, 0, 0);
if (ENCODER_MODE_IS_DP(atombios_get_encoder_mode(encoder)) && connector) {
/* DP_SET_POWER_D0 is set in radeon_dp_link_train */
radeon_dp_link_train(encoder, connector); radeon_dp_link_train(encoder, connector);
if (ASIC_IS_DCE4(rdev)) if (ASIC_IS_DCE4(rdev))
atombios_dig_encoder_setup(encoder, ATOM_ENCODER_CMD_DP_VIDEO_ON, 0); atombios_dig_encoder_setup(encoder, ATOM_ENCODER_CMD_DP_VIDEO_ON, 0);
} }
if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT))
atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_LCD_BLON, 0, 0); atombios_dig_transmitter_setup(encoder,
ATOM_TRANSMITTER_ACTION_LCD_BLON, 0, 0);
if (ext_encoder)
atombios_external_encoder_setup(encoder, ext_encoder, ATOM_ENABLE);
break; break;
case DRM_MODE_DPMS_STANDBY: case DRM_MODE_DPMS_STANDBY:
case DRM_MODE_DPMS_SUSPEND: case DRM_MODE_DPMS_SUSPEND:
case DRM_MODE_DPMS_OFF: case DRM_MODE_DPMS_OFF:
if (ASIC_IS_DCE4(rdev)) {
if (ENCODER_MODE_IS_DP(atombios_get_encoder_mode(encoder)) && connector)
atombios_dig_encoder_setup(encoder, ATOM_ENCODER_CMD_DP_VIDEO_OFF, 0);
}
if (ext_encoder)
atombios_external_encoder_setup(encoder, ext_encoder, ATOM_DISABLE);
if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT))
atombios_dig_transmitter_setup(encoder,
ATOM_TRANSMITTER_ACTION_LCD_BLOFF, 0, 0);
if (ENCODER_MODE_IS_DP(atombios_get_encoder_mode(encoder)) &&
connector && !travis_quirk)
radeon_dp_set_rx_power_state(connector, DP_SET_POWER_D3);
if (ASIC_IS_DCE4(rdev)) { if (ASIC_IS_DCE4(rdev)) {
/* disable the transmitter */ /* disable the transmitter */
atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_DISABLE, 0, 0); atombios_dig_transmitter_setup(encoder,
ATOM_TRANSMITTER_ACTION_DISABLE, 0, 0);
} else { } else {
/* disable the encoder and transmitter */ /* disable the encoder and transmitter */
atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_DISABLE, 0, 0); atombios_dig_transmitter_setup(encoder,
ATOM_TRANSMITTER_ACTION_DISABLE, 0, 0);
atombios_dig_encoder_setup(encoder, ATOM_DISABLE, 0); atombios_dig_encoder_setup(encoder, ATOM_DISABLE, 0);
} }
if (ENCODER_MODE_IS_DP(atombios_get_encoder_mode(encoder)) && connector) { if (ENCODER_MODE_IS_DP(atombios_get_encoder_mode(encoder)) && connector) {
if (ASIC_IS_DCE4(rdev)) if (travis_quirk)
atombios_dig_encoder_setup(encoder, ATOM_ENCODER_CMD_DP_VIDEO_OFF, 0); radeon_dp_set_rx_power_state(connector, DP_SET_POWER_D3);
if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) { if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) {
atombios_set_edp_panel_power(connector, atombios_set_edp_panel_power(connector,
ATOM_TRANSMITTER_ACTION_POWER_OFF); ATOM_TRANSMITTER_ACTION_POWER_OFF);
radeon_dig_connector->edp_on = false; radeon_dig_connector->edp_on = false;
} }
} }
if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT))
atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_LCD_BLOFF, 0, 0);
break;
}
}
static void
radeon_atom_encoder_dpms_ext(struct drm_encoder *encoder,
struct drm_encoder *ext_encoder,
int mode)
{
struct drm_device *dev = encoder->dev;
struct radeon_device *rdev = dev->dev_private;
switch (mode) {
case DRM_MODE_DPMS_ON:
default:
if (ASIC_IS_DCE41(rdev) || ASIC_IS_DCE61(rdev)) {
atombios_external_encoder_setup(encoder, ext_encoder,
EXTERNAL_ENCODER_ACTION_V3_ENABLE_OUTPUT);
atombios_external_encoder_setup(encoder, ext_encoder,
EXTERNAL_ENCODER_ACTION_V3_ENCODER_BLANKING_OFF);
} else
atombios_external_encoder_setup(encoder, ext_encoder, ATOM_ENABLE);
break;
case DRM_MODE_DPMS_STANDBY:
case DRM_MODE_DPMS_SUSPEND:
case DRM_MODE_DPMS_OFF:
if (ASIC_IS_DCE41(rdev) || ASIC_IS_DCE61(rdev)) {
atombios_external_encoder_setup(encoder, ext_encoder,
EXTERNAL_ENCODER_ACTION_V3_ENCODER_BLANKING);
atombios_external_encoder_setup(encoder, ext_encoder,
EXTERNAL_ENCODER_ACTION_V3_DISABLE_OUTPUT);
} else
atombios_external_encoder_setup(encoder, ext_encoder, ATOM_DISABLE);
break; break;
} }
} }
...@@ -1747,7 +1737,6 @@ radeon_atom_encoder_dpms(struct drm_encoder *encoder, int mode) ...@@ -1747,7 +1737,6 @@ radeon_atom_encoder_dpms(struct drm_encoder *encoder, int mode)
struct drm_device *dev = encoder->dev; struct drm_device *dev = encoder->dev;
struct radeon_device *rdev = dev->dev_private; struct radeon_device *rdev = dev->dev_private;
struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
struct drm_encoder *ext_encoder = radeon_get_external_encoder(encoder);
DRM_DEBUG_KMS("encoder dpms %d to mode %d, devices %08x, active_devices %08x\n", DRM_DEBUG_KMS("encoder dpms %d to mode %d, devices %08x, active_devices %08x\n",
radeon_encoder->encoder_id, mode, radeon_encoder->devices, radeon_encoder->encoder_id, mode, radeon_encoder->devices,
...@@ -1807,9 +1796,6 @@ radeon_atom_encoder_dpms(struct drm_encoder *encoder, int mode) ...@@ -1807,9 +1796,6 @@ radeon_atom_encoder_dpms(struct drm_encoder *encoder, int mode)
return; return;
} }
if (ext_encoder)
radeon_atom_encoder_dpms_ext(encoder, ext_encoder, mode);
radeon_atombios_encoder_dpms_scratch_regs(encoder, (mode == DRM_MODE_DPMS_ON) ? true : false); radeon_atombios_encoder_dpms_scratch_regs(encoder, (mode == DRM_MODE_DPMS_ON) ? true : false);
} }
......
drivers/gpu/drm/radeon/cik.c
View file @ 23c73b24
...@@ -2029,6 +2029,7 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev) ...@@ -2029,6 +2029,7 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev)
break; break;
case 5: case 5:
gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) |
MICRO_TILE_MODE_NEW(ADDR_SURF_DEPTH_MICRO_TILING)); MICRO_TILE_MODE_NEW(ADDR_SURF_DEPTH_MICRO_TILING));
break; break;
case 6: case 6:
...@@ -2049,6 +2050,7 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev) ...@@ -2049,6 +2050,7 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev)
break; break;
case 9: case 9:
gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) |
MICRO_TILE_MODE_NEW(ADDR_SURF_DISPLAY_MICRO_TILING)); MICRO_TILE_MODE_NEW(ADDR_SURF_DISPLAY_MICRO_TILING));
break; break;
case 10: case 10:
...@@ -2071,6 +2073,7 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev) ...@@ -2071,6 +2073,7 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev)
break; break;
case 13: case 13:
gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) |
MICRO_TILE_MODE_NEW(ADDR_SURF_THIN_MICRO_TILING)); MICRO_TILE_MODE_NEW(ADDR_SURF_THIN_MICRO_TILING));
break; break;
case 14: case 14:
...@@ -2093,6 +2096,7 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev) ...@@ -2093,6 +2096,7 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev)
break; break;
case 27: case 27:
gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
PIPE_CONFIG(ADDR_SURF_P16_32x32_16x16) |
MICRO_TILE_MODE_NEW(ADDR_SURF_ROTATED_MICRO_TILING)); MICRO_TILE_MODE_NEW(ADDR_SURF_ROTATED_MICRO_TILING));
break; break;
case 28: case 28:
...@@ -2247,6 +2251,7 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev) ...@@ -2247,6 +2251,7 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev)
break; break;
case 5: case 5:
gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
PIPE_CONFIG(ADDR_SURF_P8_32x32_16x16) |
MICRO_TILE_MODE_NEW(ADDR_SURF_DEPTH_MICRO_TILING)); MICRO_TILE_MODE_NEW(ADDR_SURF_DEPTH_MICRO_TILING));
break; break;
case 6: case 6:
...@@ -2267,6 +2272,7 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev) ...@@ -2267,6 +2272,7 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev)
break; break;
case 9: case 9:
gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
PIPE_CONFIG(ADDR_SURF_P8_32x32_16x16) |
MICRO_TILE_MODE_NEW(ADDR_SURF_DISPLAY_MICRO_TILING)); MICRO_TILE_MODE_NEW(ADDR_SURF_DISPLAY_MICRO_TILING));
break; break;
case 10: case 10:
...@@ -2289,6 +2295,7 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev) ...@@ -2289,6 +2295,7 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev)
break; break;
case 13: case 13:
gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
PIPE_CONFIG(ADDR_SURF_P8_32x32_16x16) |
MICRO_TILE_MODE_NEW(ADDR_SURF_THIN_MICRO_TILING)); MICRO_TILE_MODE_NEW(ADDR_SURF_THIN_MICRO_TILING));
break; break;
case 14: case 14:
...@@ -2311,6 +2318,7 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev) ...@@ -2311,6 +2318,7 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev)
break; break;
case 27: case 27:
gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
PIPE_CONFIG(ADDR_SURF_P8_32x32_16x16) |
MICRO_TILE_MODE_NEW(ADDR_SURF_ROTATED_MICRO_TILING)); MICRO_TILE_MODE_NEW(ADDR_SURF_ROTATED_MICRO_TILING));
break; break;
case 28: case 28:
...@@ -2467,6 +2475,7 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev) ...@@ -2467,6 +2475,7 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev)
break; break;
case 5: case 5:
gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
PIPE_CONFIG(ADDR_SURF_P4_16x16) |
MICRO_TILE_MODE_NEW(ADDR_SURF_DEPTH_MICRO_TILING)); MICRO_TILE_MODE_NEW(ADDR_SURF_DEPTH_MICRO_TILING));
break; break;
case 6: case 6:
...@@ -2487,6 +2496,7 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev) ...@@ -2487,6 +2496,7 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev)
break; break;
case 9: case 9:
gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
PIPE_CONFIG(ADDR_SURF_P4_16x16) |
MICRO_TILE_MODE_NEW(ADDR_SURF_DISPLAY_MICRO_TILING)); MICRO_TILE_MODE_NEW(ADDR_SURF_DISPLAY_MICRO_TILING));
break; break;
case 10: case 10:
...@@ -2509,6 +2519,7 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev) ...@@ -2509,6 +2519,7 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev)
break; break;
case 13: case 13:
gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
PIPE_CONFIG(ADDR_SURF_P4_16x16) |
MICRO_TILE_MODE_NEW(ADDR_SURF_THIN_MICRO_TILING)); MICRO_TILE_MODE_NEW(ADDR_SURF_THIN_MICRO_TILING));
break; break;
case 14: case 14:
...@@ -2531,6 +2542,7 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev) ...@@ -2531,6 +2542,7 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev)
break; break;
case 27: case 27:
gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
PIPE_CONFIG(ADDR_SURF_P4_16x16) |
MICRO_TILE_MODE_NEW(ADDR_SURF_ROTATED_MICRO_TILING)); MICRO_TILE_MODE_NEW(ADDR_SURF_ROTATED_MICRO_TILING));
break; break;
case 28: case 28:
...@@ -2593,6 +2605,7 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev) ...@@ -2593,6 +2605,7 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev)
break; break;
case 5: case 5:
gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
PIPE_CONFIG(ADDR_SURF_P4_8x16) |
MICRO_TILE_MODE_NEW(ADDR_SURF_DEPTH_MICRO_TILING)); MICRO_TILE_MODE_NEW(ADDR_SURF_DEPTH_MICRO_TILING));
break; break;
case 6: case 6:
...@@ -2613,6 +2626,7 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev) ...@@ -2613,6 +2626,7 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev)
break; break;
case 9: case 9:
gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
PIPE_CONFIG(ADDR_SURF_P4_8x16) |
MICRO_TILE_MODE_NEW(ADDR_SURF_DISPLAY_MICRO_TILING)); MICRO_TILE_MODE_NEW(ADDR_SURF_DISPLAY_MICRO_TILING));
break; break;
case 10: case 10:
...@@ -2635,6 +2649,7 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev) ...@@ -2635,6 +2649,7 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev)
break; break;
case 13: case 13:
gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
PIPE_CONFIG(ADDR_SURF_P4_8x16) |
MICRO_TILE_MODE_NEW(ADDR_SURF_THIN_MICRO_TILING)); MICRO_TILE_MODE_NEW(ADDR_SURF_THIN_MICRO_TILING));
break; break;
case 14: case 14:
...@@ -2657,6 +2672,7 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev) ...@@ -2657,6 +2672,7 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev)
break; break;
case 27: case 27:
gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
PIPE_CONFIG(ADDR_SURF_P4_8x16) |
MICRO_TILE_MODE_NEW(ADDR_SURF_ROTATED_MICRO_TILING)); MICRO_TILE_MODE_NEW(ADDR_SURF_ROTATED_MICRO_TILING));
break; break;
case 28: case 28:
...@@ -2813,6 +2829,7 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev) ...@@ -2813,6 +2829,7 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev)
break; break;
case 5: case 5:
gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
PIPE_CONFIG(ADDR_SURF_P2) |
MICRO_TILE_MODE_NEW(ADDR_SURF_DEPTH_MICRO_TILING)); MICRO_TILE_MODE_NEW(ADDR_SURF_DEPTH_MICRO_TILING));
break; break;
case 6: case 6:
...@@ -2828,11 +2845,13 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev) ...@@ -2828,11 +2845,13 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev)
TILE_SPLIT(split_equal_to_row_size)); TILE_SPLIT(split_equal_to_row_size));
break; break;
case 8: case 8:
gb_tile_moden = ARRAY_MODE(ARRAY_LINEAR_ALIGNED); gb_tile_moden = ARRAY_MODE(ARRAY_LINEAR_ALIGNED) |
PIPE_CONFIG(ADDR_SURF_P2);
break; break;
case 9: case 9:
gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
MICRO_TILE_MODE_NEW(ADDR_SURF_DISPLAY_MICRO_TILING)); MICRO_TILE_MODE_NEW(ADDR_SURF_DISPLAY_MICRO_TILING) |
PIPE_CONFIG(ADDR_SURF_P2));
break; break;
case 10: case 10:
gb_tile_moden = (ARRAY_MODE(ARRAY_2D_TILED_THIN1) | gb_tile_moden = (ARRAY_MODE(ARRAY_2D_TILED_THIN1) |
...@@ -2854,6 +2873,7 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev) ...@@ -2854,6 +2873,7 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev)
break; break;
case 13: case 13:
gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
PIPE_CONFIG(ADDR_SURF_P2) |
MICRO_TILE_MODE_NEW(ADDR_SURF_THIN_MICRO_TILING)); MICRO_TILE_MODE_NEW(ADDR_SURF_THIN_MICRO_TILING));
break; break;
case 14: case 14:
...@@ -2876,7 +2896,8 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev) ...@@ -2876,7 +2896,8 @@ static void cik_tiling_mode_table_init(struct radeon_device *rdev)
break; break;
case 27: case 27:
gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | gb_tile_moden = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
MICRO_TILE_MODE_NEW(ADDR_SURF_ROTATED_MICRO_TILING)); MICRO_TILE_MODE_NEW(ADDR_SURF_ROTATED_MICRO_TILING) |
PIPE_CONFIG(ADDR_SURF_P2));
break; break;
case 28: case 28:
gb_tile_moden = (ARRAY_MODE(ARRAY_PRT_2D_TILED_THIN1) | gb_tile_moden = (ARRAY_MODE(ARRAY_PRT_2D_TILED_THIN1) |
......
drivers/gpu/drm/radeon/radeon_connectors.c
View file @ 23c73b24
...@@ -1595,6 +1595,7 @@ radeon_add_atom_connector(struct drm_device *dev, ...@@ -1595,6 +1595,7 @@ radeon_add_atom_connector(struct drm_device *dev,
uint32_t subpixel_order = SubPixelNone; uint32_t subpixel_order = SubPixelNone;
bool shared_ddc = false; bool shared_ddc = false;
bool is_dp_bridge = false; bool is_dp_bridge = false;
bool has_aux = false;
if (connector_type == DRM_MODE_CONNECTOR_Unknown) if (connector_type == DRM_MODE_CONNECTOR_Unknown)
return; return;
...@@ -1672,7 +1673,9 @@ radeon_add_atom_connector(struct drm_device *dev, ...@@ -1672,7 +1673,9 @@ radeon_add_atom_connector(struct drm_device *dev,
radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "eDP-auxch"); radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "eDP-auxch");
else else
radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "DP-auxch"); radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "DP-auxch");
if (!radeon_dig_connector->dp_i2c_bus) if (radeon_dig_connector->dp_i2c_bus)
has_aux = true;
else
DRM_ERROR("DP: Failed to assign dp ddc bus! Check dmesg for i2c errors.\n"); DRM_ERROR("DP: Failed to assign dp ddc bus! Check dmesg for i2c errors.\n");
radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
if (!radeon_connector->ddc_bus) if (!radeon_connector->ddc_bus)
...@@ -1895,7 +1898,9 @@ radeon_add_atom_connector(struct drm_device *dev, ...@@ -1895,7 +1898,9 @@ radeon_add_atom_connector(struct drm_device *dev,
if (!radeon_dig_connector->dp_i2c_bus) if (!radeon_dig_connector->dp_i2c_bus)
DRM_ERROR("DP: Failed to assign dp ddc bus! Check dmesg for i2c errors.\n"); DRM_ERROR("DP: Failed to assign dp ddc bus! Check dmesg for i2c errors.\n");
radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
if (!radeon_connector->ddc_bus) if (radeon_connector->ddc_bus)
has_aux = true;
else
DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n"); DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
} }
subpixel_order = SubPixelHorizontalRGB; subpixel_order = SubPixelHorizontalRGB;
...@@ -1939,7 +1944,9 @@ radeon_add_atom_connector(struct drm_device *dev, ...@@ -1939,7 +1944,9 @@ radeon_add_atom_connector(struct drm_device *dev,
if (i2c_bus->valid) { if (i2c_bus->valid) {
/* add DP i2c bus */ /* add DP i2c bus */
radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "eDP-auxch"); radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "eDP-auxch");
if (!radeon_dig_connector->dp_i2c_bus) if (radeon_dig_connector->dp_i2c_bus)
has_aux = true;
else
DRM_ERROR("DP: Failed to assign dp ddc bus! Check dmesg for i2c errors.\n"); DRM_ERROR("DP: Failed to assign dp ddc bus! Check dmesg for i2c errors.\n");
radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus); radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
if (!radeon_connector->ddc_bus) if (!radeon_connector->ddc_bus)
...@@ -2000,6 +2007,10 @@ radeon_add_atom_connector(struct drm_device *dev, ...@@ -2000,6 +2007,10 @@ radeon_add_atom_connector(struct drm_device *dev,
connector->display_info.subpixel_order = subpixel_order; connector->display_info.subpixel_order = subpixel_order;
drm_sysfs_connector_add(connector); drm_sysfs_connector_add(connector);
if (has_aux)
radeon_dp_aux_init(radeon_connector);
return; return;
failed: failed:
......
drivers/gpu/drm/radeon/radeon_drv.c
View file @ 23c73b24
...@@ -79,7 +79,8 @@ ...@@ -79,7 +79,8 @@
* 2.35.0 - Add CIK macrotile mode array query * 2.35.0 - Add CIK macrotile mode array query
* 2.36.0 - Fix CIK DCE tiling setup * 2.36.0 - Fix CIK DCE tiling setup
* 2.37.0 - allow GS ring setup on r6xx/r7xx * 2.37.0 - allow GS ring setup on r6xx/r7xx
* 2.38.0 - RADEON_GEM_OP (GET_INITIAL_DOMAIN, SET_INITIAL_DOMAIN) * 2.38.0 - RADEON_GEM_OP (GET_INITIAL_DOMAIN, SET_INITIAL_DOMAIN),
* CIK: 1D and linear tiling modes contain valid PIPE_CONFIG
*/ */
#define KMS_DRIVER_MAJOR 2 #define KMS_DRIVER_MAJOR 2
#define KMS_DRIVER_MINOR 38 #define KMS_DRIVER_MINOR 38
......
drivers/gpu/drm/radeon/radeon_mode.h
View file @ 23c73b24
...@@ -192,6 +192,7 @@ struct radeon_i2c_chan { ...@@ -192,6 +192,7 @@ struct radeon_i2c_chan {
struct i2c_algo_dp_aux_data dp; struct i2c_algo_dp_aux_data dp;
} algo; } algo;
struct radeon_i2c_bus_rec rec; struct radeon_i2c_bus_rec rec;
struct drm_dp_aux aux;
}; };
/* mostly for macs, but really any system without connector tables */ /* mostly for macs, but really any system without connector tables */
...@@ -690,6 +691,9 @@ extern u8 radeon_dp_getsinktype(struct radeon_connector *radeon_connector); ...@@ -690,6 +691,9 @@ extern u8 radeon_dp_getsinktype(struct radeon_connector *radeon_connector);
extern bool radeon_dp_getdpcd(struct radeon_connector *radeon_connector); extern bool radeon_dp_getdpcd(struct radeon_connector *radeon_connector);
extern int radeon_dp_get_panel_mode(struct drm_encoder *encoder, extern int radeon_dp_get_panel_mode(struct drm_encoder *encoder,
struct drm_connector *connector); struct drm_connector *connector);
extern void radeon_dp_set_rx_power_state(struct drm_connector *connector,
u8 power_state);
extern void radeon_dp_aux_init(struct radeon_connector *radeon_connector);
extern void atombios_dig_encoder_setup(struct drm_encoder *encoder, int action, int panel_mode); extern void atombios_dig_encoder_setup(struct drm_encoder *encoder, int action, int panel_mode);
extern void radeon_atom_encoder_init(struct radeon_device *rdev); extern void radeon_atom_encoder_init(struct radeon_device *rdev);
extern void radeon_atom_disp_eng_pll_init(struct radeon_device *rdev); extern void radeon_atom_disp_eng_pll_init(struct radeon_device *rdev);
......
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