Commit 2468c0dd authored by Jani Nikula's avatar Jani Nikula

drm/i915: pass dev_priv explicitly to DSPADDR_VLV

Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the DSPADDR_VLV register macro.
Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1d9be6b1eedd9240468a89cd3a10e8513caa33b1.1716469091.git.jani.nikula@intel.comSigned-off-by: default avatarJani Nikula <jani.nikula@intel.com>
parent ee6af5de
...@@ -577,7 +577,7 @@ vlv_primary_async_flip(struct intel_plane *plane, ...@@ -577,7 +577,7 @@ vlv_primary_async_flip(struct intel_plane *plane,
u32 dspaddr_offset = plane_state->view.color_plane[0].offset; u32 dspaddr_offset = plane_state->view.color_plane[0].offset;
enum i9xx_plane_id i9xx_plane = plane->i9xx_plane; enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;
intel_de_write_fw(dev_priv, DSPADDR_VLV(i9xx_plane), intel_de_write_fw(dev_priv, DSPADDR_VLV(dev_priv, i9xx_plane),
intel_plane_ggtt_offset(plane_state) + dspaddr_offset); intel_plane_ggtt_offset(plane_state) + dspaddr_offset);
} }
......
...@@ -9,7 +9,7 @@ ...@@ -9,7 +9,7 @@
#include "intel_display_reg_defs.h" #include "intel_display_reg_defs.h"
#define _DSPAADDR_VLV 0x7017C /* vlv/chv */ #define _DSPAADDR_VLV 0x7017C /* vlv/chv */
#define DSPADDR_VLV(plane) _MMIO_PIPE2(dev_priv, plane, _DSPAADDR_VLV) #define DSPADDR_VLV(dev_priv, plane) _MMIO_PIPE2(dev_priv, plane, _DSPAADDR_VLV)
#define _DSPACNTR 0x70180 #define _DSPACNTR 0x70180
#define DSPCNTR(plane) _MMIO_PIPE2(dev_priv, plane, _DSPACNTR) #define DSPCNTR(plane) _MMIO_PIPE2(dev_priv, plane, _DSPACNTR)
......
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