Commit 2485f8cf authored by Andrey Grodzovsky's avatar Andrey Grodzovsky Committed by Alex Deucher

drm/amdgpu: Remember to wait 10ms for write buffer flush v2

EEPROM spec requests this.

v2: Only to be done for write data transactions.
Signed-off-by: default avatarAndrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: default avatarLuben Tuikov <luben.tuikov@amd.com>
parent b36d8d6b
...@@ -55,6 +55,21 @@ int amdgpu_eeprom_xfer(struct i2c_adapter *i2c_adap, ...@@ -55,6 +55,21 @@ int amdgpu_eeprom_xfer(struct i2c_adapter *i2c_adap,
r = i2c_transfer(i2c_adap, msgs, ARRAY_SIZE(msgs)); r = i2c_transfer(i2c_adap, msgs, ARRAY_SIZE(msgs));
if (r <= 0) if (r <= 0)
return r; return r;
/* Only for write data */
if (!msgs[1].flags)
/*
* According to EEPROM spec there is a MAX of 10 ms required for
* EEPROM to flush internal RX buffer after STOP was issued at the
* end of write transaction. During this time the EEPROM will not be
* responsive to any more commands - so wait a bit more.
*
* TODO Improve to wait for first ACK for slave address after
* internal write cycle done.
*/
msleep(10);
bytes_transferred = r - EEPROM_OFFSET_LENGTH; bytes_transferred = r - EEPROM_OFFSET_LENGTH;
eeprom_addr += bytes_transferred; eeprom_addr += bytes_transferred;
msgs[0].buf[0] = ((eeprom_addr >> 8) & 0xff); msgs[0].buf[0] = ((eeprom_addr >> 8) & 0xff);
......
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