usb: dwc3: core: fix cached revision on our structure
All our revision macros are defined with the entire
32-bits which we read from GSNPSID register, so we
must cache all 32-bits properly rather than masking
the top 16-bits.
This will fix all revision checks we have on current
driver.
Signed-off-by:
Felipe Balbi <balbi@ti.com>
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