Commit 24aee93c authored by Vinod Koul's avatar Vinod Koul Committed by Greg Kroah-Hartman

sst: remove rest of aava bits and aava related code

This removes the remaining bit of aava dependent and related bits from driver
Signed-off-by: default avatarVinod Koul <vinod.koul@intel.com>
Signed-off-by: default avatarAlan Cox <alan@linux.intel.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent 63fcf10d
......@@ -178,9 +178,4 @@ extern struct snd_kcontrol_new snd_intelmad_controls_mrst[];
extern struct snd_kcontrol_new snd_intelmad_controls_mfld[];
extern struct snd_pmic_ops *intelmad_vendor_ops[];
/* This is an enabler hook as the platform detection logic isn't yet
present and depends on some firmware and DMI support to detect AAVA
devices. It will vanish once the AAVA platform support is merged */
#define is_aava() 0
#endif /* __INTELMID_H */
......@@ -134,56 +134,6 @@ static int mx_init_card(void)
return sst_sc_reg_access(sc_access, PMIC_WRITE, 47);
}
static int mx_init_capture_card(void)
{
struct sc_reg_access sc_access[] = {
{0x206, 0x5a, 0x0},
{0x207, 0xbe, 0x0},
{0x208, 0x90, 0x0},
{0x209, 0x32, 0x0},
{0x20e, 0x22, 0x0},
{0x210, 0x84, 0x0},
{0x223, 0x20, 0x0},
{0x226, 0xC0, 0x0},
};
int retval = 0;
retval = sst_sc_reg_access(sc_access, PMIC_WRITE, 8);
if (0 != retval) {
/* pmic communication fails */
pr_debug("pmic commn failed\n");
return retval;
}
pr_debug("Capture configuration complete!!\n");
return 0;
}
static int mx_init_playback_card(void)
{
struct sc_reg_access sc_access[] = {
{0x206, 0x00, 0x0},
{0x207, 0x00, 0x0},
{0x208, 0x00, 0x0},
{0x209, 0x51, 0x0},
{0x20e, 0x51, 0x0},
{0x210, 0x21, 0x0},
{0x223, 0x01, 0x0},
};
int retval = 0;
retval = sst_sc_reg_access(sc_access, PMIC_WRITE, 9);
if (0 != retval) {
/* pmic communication fails */
pr_debug("pmic commn failed\n");
return retval;
}
pr_debug("Playback configuration complete!!\n");
return 0;
}
static int mx_enable_audiodac(int value)
{
struct sc_reg_access sc_access[3];
......
......@@ -873,7 +873,7 @@ static int nc_set_selected_input_dev(u8 value)
sc_access[2].mask = MASK6;
sc_access[3].reg_addr = 0x109;
sc_access[3].mask = MASK6;
sc_access[3].value = 0x40;
sc_access[3].value = 0x00;
num_val = 4;
break;
default:
......
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