Commit 24da741c authored by Tony Lindgren's avatar Tony Lindgren

Merge branch 'dm814x-soc' into omap-for-v4.3/soc

Update dm814x changes for sparse fixes to make data structures
static.

Conflicts:
	arch/arm/mach-omap2/omap_hwmod_81xx_data.c
parents 97d9a3d0 0f3ccb24
...@@ -169,7 +169,7 @@ static const char *const ti814x_boards_compat[] __initconst = { ...@@ -169,7 +169,7 @@ static const char *const ti814x_boards_compat[] __initconst = {
NULL, NULL,
}; };
DT_MACHINE_START(TI81XX_DT, "Generic ti814x (Flattened Device Tree)") DT_MACHINE_START(TI814X_DT, "Generic ti814x (Flattened Device Tree)")
.reserve = omap_reserve, .reserve = omap_reserve,
.map_io = ti81xx_map_io, .map_io = ti81xx_map_io,
.init_early = ti814x_init_early, .init_early = ti814x_init_early,
......
...@@ -216,7 +216,8 @@ extern void __init omap242x_clockdomains_init(void); ...@@ -216,7 +216,8 @@ extern void __init omap242x_clockdomains_init(void);
extern void __init omap243x_clockdomains_init(void); extern void __init omap243x_clockdomains_init(void);
extern void __init omap3xxx_clockdomains_init(void); extern void __init omap3xxx_clockdomains_init(void);
extern void __init am33xx_clockdomains_init(void); extern void __init am33xx_clockdomains_init(void);
extern void __init ti81xx_clockdomains_init(void); extern void __init ti814x_clockdomains_init(void);
extern void __init ti816x_clockdomains_init(void);
extern void __init omap44xx_clockdomains_init(void); extern void __init omap44xx_clockdomains_init(void);
extern void __init omap54xx_clockdomains_init(void); extern void __init omap54xx_clockdomains_init(void);
extern void __init dra7xx_clockdomains_init(void); extern void __init dra7xx_clockdomains_init(void);
......
...@@ -165,7 +165,24 @@ static struct clockdomain default_l3_slow_816x_clkdm = { ...@@ -165,7 +165,24 @@ static struct clockdomain default_l3_slow_816x_clkdm = {
.flags = CLKDM_CAN_SWSUP, .flags = CLKDM_CAN_SWSUP,
}; };
static struct clockdomain *clockdomains_ti81xx[] __initdata = { static struct clockdomain *clockdomains_ti814x[] __initdata = {
&alwon_l3_slow_81xx_clkdm,
&alwon_l3_med_81xx_clkdm,
&alwon_l3_fast_81xx_clkdm,
&alwon_ethernet_81xx_clkdm,
&mmu_81xx_clkdm,
&mmu_cfg_81xx_clkdm,
NULL,
};
void __init ti814x_clockdomains_init(void)
{
clkdm_register_platform_funcs(&am33xx_clkdm_operations);
clkdm_register_clkdms(clockdomains_ti814x);
clkdm_complete_init();
}
static struct clockdomain *clockdomains_ti816x[] __initdata = {
&alwon_mpu_816x_clkdm, &alwon_mpu_816x_clkdm,
&alwon_l3_slow_81xx_clkdm, &alwon_l3_slow_81xx_clkdm,
&alwon_l3_med_81xx_clkdm, &alwon_l3_med_81xx_clkdm,
...@@ -185,10 +202,10 @@ static struct clockdomain *clockdomains_ti81xx[] __initdata = { ...@@ -185,10 +202,10 @@ static struct clockdomain *clockdomains_ti81xx[] __initdata = {
NULL, NULL,
}; };
void __init ti81xx_clockdomains_init(void) void __init ti816x_clockdomains_init(void)
{ {
clkdm_register_platform_funcs(&am33xx_clkdm_operations); clkdm_register_platform_funcs(&am33xx_clkdm_operations);
clkdm_register_clkdms(clockdomains_ti81xx); clkdm_register_clkdms(clockdomains_ti816x);
clkdm_complete_init(); clkdm_complete_init();
} }
#endif #endif
...@@ -652,6 +652,7 @@ static const struct of_device_id omap_scrm_dt_match_table[] = { ...@@ -652,6 +652,7 @@ static const struct of_device_id omap_scrm_dt_match_table[] = {
{ .compatible = "ti,am4-scm", .data = &ctrl_data }, { .compatible = "ti,am4-scm", .data = &ctrl_data },
{ .compatible = "ti,omap2-scm", .data = &omap2_ctrl_data }, { .compatible = "ti,omap2-scm", .data = &omap2_ctrl_data },
{ .compatible = "ti,omap3-scm", .data = &omap2_ctrl_data }, { .compatible = "ti,omap3-scm", .data = &omap2_ctrl_data },
{ .compatible = "ti,dm814-scm", .data = &ctrl_data },
{ .compatible = "ti,dm816-scrm", .data = &ctrl_data }, { .compatible = "ti,dm816-scrm", .data = &ctrl_data },
{ .compatible = "ti,omap4-scm-core", .data = &ctrl_data }, { .compatible = "ti,omap4-scm-core", .data = &ctrl_data },
{ .compatible = "ti,omap5-scm-core", .data = &ctrl_data }, { .compatible = "ti,omap5-scm-core", .data = &ctrl_data },
......
...@@ -608,11 +608,11 @@ void __init ti814x_init_early(void) ...@@ -608,11 +608,11 @@ void __init ti814x_init_early(void)
omap2_prcm_base_init(); omap2_prcm_base_init();
omap3xxx_voltagedomains_init(); omap3xxx_voltagedomains_init();
omap3xxx_powerdomains_init(); omap3xxx_powerdomains_init();
ti81xx_clockdomains_init(); ti814x_clockdomains_init();
ti81xx_hwmod_init(); dm814x_hwmod_init();
omap_hwmod_init_postsetup(); omap_hwmod_init_postsetup();
if (of_have_populated_dt()) if (of_have_populated_dt())
omap_clk_soc_init = ti81xx_dt_clk_init; omap_clk_soc_init = dm814x_dt_clk_init;
} }
void __init ti816x_init_early(void) void __init ti816x_init_early(void)
...@@ -625,11 +625,11 @@ void __init ti816x_init_early(void) ...@@ -625,11 +625,11 @@ void __init ti816x_init_early(void)
omap2_prcm_base_init(); omap2_prcm_base_init();
omap3xxx_voltagedomains_init(); omap3xxx_voltagedomains_init();
omap3xxx_powerdomains_init(); omap3xxx_powerdomains_init();
ti81xx_clockdomains_init(); ti816x_clockdomains_init();
ti81xx_hwmod_init(); dm816x_hwmod_init();
omap_hwmod_init_postsetup(); omap_hwmod_init_postsetup();
if (of_have_populated_dt()) if (of_have_populated_dt())
omap_clk_soc_init = ti81xx_dt_clk_init; omap_clk_soc_init = dm816x_dt_clk_init;
} }
#endif #endif
......
...@@ -3891,7 +3891,8 @@ void __init omap_hwmod_init(void) ...@@ -3891,7 +3891,8 @@ void __init omap_hwmod_init(void)
soc_ops.init_clkdm = _init_clkdm; soc_ops.init_clkdm = _init_clkdm;
soc_ops.update_context_lost = _omap4_update_context_lost; soc_ops.update_context_lost = _omap4_update_context_lost;
soc_ops.get_context_lost = _omap4_get_context_lost; soc_ops.get_context_lost = _omap4_get_context_lost;
} else if (cpu_is_ti816x() || soc_is_am33xx() || soc_is_am43xx()) { } else if (cpu_is_ti814x() || cpu_is_ti816x() || soc_is_am33xx() ||
soc_is_am43xx()) {
soc_ops.enable_module = _omap4_enable_module; soc_ops.enable_module = _omap4_enable_module;
soc_ops.disable_module = _omap4_disable_module; soc_ops.disable_module = _omap4_disable_module;
soc_ops.wait_target_ready = _omap4_wait_target_ready; soc_ops.wait_target_ready = _omap4_wait_target_ready;
......
...@@ -759,7 +759,8 @@ extern int omap3xxx_hwmod_init(void); ...@@ -759,7 +759,8 @@ extern int omap3xxx_hwmod_init(void);
extern int omap44xx_hwmod_init(void); extern int omap44xx_hwmod_init(void);
extern int omap54xx_hwmod_init(void); extern int omap54xx_hwmod_init(void);
extern int am33xx_hwmod_init(void); extern int am33xx_hwmod_init(void);
extern int ti81xx_hwmod_init(void); extern int dm814x_hwmod_init(void);
extern int dm816x_hwmod_init(void);
extern int dra7xx_hwmod_init(void); extern int dra7xx_hwmod_init(void);
int am43xx_hwmod_init(void); int am43xx_hwmod_init(void);
......
This diff is collapsed.
...@@ -349,6 +349,41 @@ static struct powerdomain device_81xx_pwrdm = { ...@@ -349,6 +349,41 @@ static struct powerdomain device_81xx_pwrdm = {
.voltdm = { .name = "core" }, .voltdm = { .name = "core" },
}; };
static struct powerdomain gem_814x_pwrdm = {
.name = "gem_pwrdm",
.prcm_offs = TI814X_PRM_DSP_MOD,
.pwrsts = PWRSTS_OFF_ON,
.voltdm = { .name = "dsp" },
};
static struct powerdomain ivahd_814x_pwrdm = {
.name = "ivahd_pwrdm",
.prcm_offs = TI814X_PRM_HDVICP_MOD,
.pwrsts = PWRSTS_OFF_ON,
.voltdm = { .name = "iva" },
};
static struct powerdomain hdvpss_814x_pwrdm = {
.name = "hdvpss_pwrdm",
.prcm_offs = TI814X_PRM_HDVPSS_MOD,
.pwrsts = PWRSTS_OFF_ON,
.voltdm = { .name = "dsp" },
};
static struct powerdomain sgx_814x_pwrdm = {
.name = "sgx_pwrdm",
.prcm_offs = TI814X_PRM_GFX_MOD,
.pwrsts = PWRSTS_OFF_ON,
.voltdm = { .name = "core" },
};
static struct powerdomain isp_814x_pwrdm = {
.name = "isp_pwrdm",
.prcm_offs = TI814X_PRM_ISP_MOD,
.pwrsts = PWRSTS_OFF_ON,
.voltdm = { .name = "core" },
};
static struct powerdomain active_816x_pwrdm = { static struct powerdomain active_816x_pwrdm = {
.name = "active_pwrdm", .name = "active_pwrdm",
.prcm_offs = TI816X_PRM_ACTIVE_MOD, .prcm_offs = TI816X_PRM_ACTIVE_MOD,
...@@ -448,7 +483,18 @@ static struct powerdomain *powerdomains_am35x[] __initdata = { ...@@ -448,7 +483,18 @@ static struct powerdomain *powerdomains_am35x[] __initdata = {
NULL NULL
}; };
static struct powerdomain *powerdomains_ti81xx[] __initdata = { static struct powerdomain *powerdomains_ti814x[] __initdata = {
&alwon_81xx_pwrdm,
&device_81xx_pwrdm,
&gem_814x_pwrdm,
&ivahd_814x_pwrdm,
&hdvpss_814x_pwrdm,
&sgx_814x_pwrdm,
&isp_814x_pwrdm,
NULL
};
static struct powerdomain *powerdomains_ti816x[] __initdata = {
&alwon_81xx_pwrdm, &alwon_81xx_pwrdm,
&device_81xx_pwrdm, &device_81xx_pwrdm,
&active_816x_pwrdm, &active_816x_pwrdm,
...@@ -460,6 +506,73 @@ static struct powerdomain *powerdomains_ti81xx[] __initdata = { ...@@ -460,6 +506,73 @@ static struct powerdomain *powerdomains_ti81xx[] __initdata = {
NULL NULL
}; };
/* TI81XX specific ops */
#define TI81XX_PM_PWSTCTRL 0x0000
#define TI81XX_RM_RSTCTRL 0x0010
#define TI81XX_PM_PWSTST 0x0004
static int ti81xx_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
{
omap2_prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK,
(pwrst << OMAP_POWERSTATE_SHIFT),
pwrdm->prcm_offs, TI81XX_PM_PWSTCTRL);
return 0;
}
static int ti81xx_pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
{
return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
TI81XX_PM_PWSTCTRL,
OMAP_POWERSTATE_MASK);
}
static int ti81xx_pwrdm_read_pwrst(struct powerdomain *pwrdm)
{
return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
(pwrdm->prcm_offs == TI814X_PRM_GFX_MOD) ? TI81XX_RM_RSTCTRL :
TI81XX_PM_PWSTST,
OMAP_POWERSTATEST_MASK);
}
static int ti81xx_pwrdm_read_logic_pwrst(struct powerdomain *pwrdm)
{
return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
(pwrdm->prcm_offs == TI814X_PRM_GFX_MOD) ? TI81XX_RM_RSTCTRL :
TI81XX_PM_PWSTST,
OMAP3430_LOGICSTATEST_MASK);
}
static int ti81xx_pwrdm_wait_transition(struct powerdomain *pwrdm)
{
u32 c = 0;
while ((omap2_prm_read_mod_reg(pwrdm->prcm_offs,
(pwrdm->prcm_offs == TI814X_PRM_GFX_MOD) ? TI81XX_RM_RSTCTRL :
TI81XX_PM_PWSTST) &
OMAP_INTRANSITION_MASK) &&
(c++ < PWRDM_TRANSITION_BAILOUT))
udelay(1);
if (c > PWRDM_TRANSITION_BAILOUT) {
pr_err("powerdomain: %s timeout waiting for transition\n",
pwrdm->name);
return -EAGAIN;
}
pr_debug("powerdomain: completed transition in %d loops\n", c);
return 0;
}
/* For dm814x we need to fix up fix GFX pwstst and rstctrl reg offsets */
static struct pwrdm_ops ti81xx_pwrdm_operations = {
.pwrdm_set_next_pwrst = ti81xx_pwrdm_set_next_pwrst,
.pwrdm_read_next_pwrst = ti81xx_pwrdm_read_next_pwrst,
.pwrdm_read_pwrst = ti81xx_pwrdm_read_pwrst,
.pwrdm_read_logic_pwrst = ti81xx_pwrdm_read_logic_pwrst,
.pwrdm_wait_transition = ti81xx_pwrdm_wait_transition,
};
void __init omap3xxx_powerdomains_init(void) void __init omap3xxx_powerdomains_init(void)
{ {
unsigned int rev; unsigned int rev;
...@@ -467,15 +580,18 @@ void __init omap3xxx_powerdomains_init(void) ...@@ -467,15 +580,18 @@ void __init omap3xxx_powerdomains_init(void)
if (!cpu_is_omap34xx() && !cpu_is_ti81xx()) if (!cpu_is_omap34xx() && !cpu_is_ti81xx())
return; return;
pwrdm_register_platform_funcs(&omap3_pwrdm_operations); pwrdm_register_platform_funcs(&ti81xx_pwrdm_operations);
rev = omap_rev(); rev = omap_rev();
if (rev == AM35XX_REV_ES1_0 || rev == AM35XX_REV_ES1_1) { if (rev == AM35XX_REV_ES1_0 || rev == AM35XX_REV_ES1_1) {
pwrdm_register_pwrdms(powerdomains_am35x); pwrdm_register_pwrdms(powerdomains_am35x);
} else if (rev == TI8148_REV_ES1_0 || rev == TI8148_REV_ES2_0 ||
rev == TI8148_REV_ES2_1) {
pwrdm_register_pwrdms(powerdomains_ti814x);
} else if (rev == TI8168_REV_ES1_0 || rev == TI8168_REV_ES1_1 } else if (rev == TI8168_REV_ES1_0 || rev == TI8168_REV_ES1_1
|| rev == TI8168_REV_ES2_0 || rev == TI8168_REV_ES2_1) { || rev == TI8168_REV_ES2_0 || rev == TI8168_REV_ES2_1) {
pwrdm_register_pwrdms(powerdomains_ti81xx); pwrdm_register_pwrdms(powerdomains_ti816x);
} else { } else {
pwrdm_register_pwrdms(powerdomains_omap3430_common); pwrdm_register_pwrdms(powerdomains_omap3430_common);
......
...@@ -51,6 +51,12 @@ ...@@ -51,6 +51,12 @@
/* /*
* TI81XX PRM module offsets * TI81XX PRM module offsets
*/ */
#define TI814X_PRM_DSP_MOD 0x0a00
#define TI814X_PRM_HDVICP_MOD 0x0c00
#define TI814X_PRM_ISP_MOD 0x0d00
#define TI814X_PRM_HDVPSS_MOD 0x0e00
#define TI814X_PRM_GFX_MOD 0x0f00
#define TI81XX_PRM_DEVICE_MOD 0x0000 #define TI81XX_PRM_DEVICE_MOD 0x0000
#define TI816X_PRM_ACTIVE_MOD 0x0a00 #define TI816X_PRM_ACTIVE_MOD 0x0a00
#define TI81XX_PRM_DEFAULT_MOD 0x0b00 #define TI81XX_PRM_DEFAULT_MOD 0x0b00
......
...@@ -2,7 +2,7 @@ obj-y += clk.o autoidle.o clockdomain.o ...@@ -2,7 +2,7 @@ obj-y += clk.o autoidle.o clockdomain.o
clk-common = dpll.o composite.o divider.o gate.o \ clk-common = dpll.o composite.o divider.o gate.o \
fixed-factor.o mux.o apll.o fixed-factor.o mux.o apll.o
obj-$(CONFIG_SOC_AM33XX) += $(clk-common) clk-33xx.o obj-$(CONFIG_SOC_AM33XX) += $(clk-common) clk-33xx.o
obj-$(CONFIG_SOC_TI81XX) += $(clk-common) fapll.o clk-816x.o obj-$(CONFIG_SOC_TI81XX) += $(clk-common) fapll.o clk-814x.o clk-816x.o
obj-$(CONFIG_ARCH_OMAP2) += $(clk-common) interface.o clk-2xxx.o obj-$(CONFIG_ARCH_OMAP2) += $(clk-common) interface.o clk-2xxx.o
obj-$(CONFIG_ARCH_OMAP3) += $(clk-common) interface.o \ obj-$(CONFIG_ARCH_OMAP3) += $(clk-common) interface.o \
clk-3xxx.o clk-3xxx.o
......
/*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation version 2.
*/
#include <linux/kernel.h>
#include <linux/clk-provider.h>
#include <linux/clk/ti.h>
static struct ti_dt_clk dm814_clks[] = {
DT_CLK(NULL, "devosc_ck", "devosc_ck"),
DT_CLK(NULL, "mpu_ck", "mpu_ck"),
DT_CLK(NULL, "sysclk4_ck", "sysclk4_ck"),
DT_CLK(NULL, "sysclk6_ck", "sysclk6_ck"),
DT_CLK(NULL, "sysclk10_ck", "sysclk10_ck"),
DT_CLK(NULL, "sysclk18_ck", "sysclk18_ck"),
DT_CLK(NULL, "timer_sys_ck", "devosc_ck"),
DT_CLK(NULL, "cpsw_125mhz_gclk", "cpsw_125mhz_gclk"),
DT_CLK(NULL, "cpsw_cpts_rft_clk", "cpsw_cpts_rft_clk"),
{ .node_name = NULL },
};
int __init dm814x_dt_clk_init(void)
{
ti_dt_clocks_register(dm814_clks);
omap2_clk_disable_autoidle_all();
omap2_clk_enable_init_clocks(NULL, 0);
return 0;
}
...@@ -42,7 +42,7 @@ static const char *enable_init_clks[] = { ...@@ -42,7 +42,7 @@ static const char *enable_init_clks[] = {
"ddr_pll_clk3", "ddr_pll_clk3",
}; };
int __init ti81xx_dt_clk_init(void) int __init dm816x_dt_clk_init(void)
{ {
ti_dt_clocks_register(dm816x_clks); ti_dt_clocks_register(dm816x_clks);
omap2_clk_disable_autoidle_all(); omap2_clk_disable_autoidle_all();
......
...@@ -329,7 +329,8 @@ int ti_clk_add_component(struct device_node *node, struct clk_hw *hw, int type); ...@@ -329,7 +329,8 @@ int ti_clk_add_component(struct device_node *node, struct clk_hw *hw, int type);
int omap3430_dt_clk_init(void); int omap3430_dt_clk_init(void);
int omap3630_dt_clk_init(void); int omap3630_dt_clk_init(void);
int am35xx_dt_clk_init(void); int am35xx_dt_clk_init(void);
int ti81xx_dt_clk_init(void); int dm814x_dt_clk_init(void);
int dm816x_dt_clk_init(void);
int omap4xxx_dt_clk_init(void); int omap4xxx_dt_clk_init(void);
int omap5xxx_dt_clk_init(void); int omap5xxx_dt_clk_init(void);
int dra7xx_dt_clk_init(void); int dra7xx_dt_clk_init(void);
......
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