Commit 24f483ba authored by Dillon Varone's avatar Dillon Varone Committed by Alex Deucher

drm/amd/display: Set max VTotal cap for dcn401

[WHY&HOW]
Set max VTotal cap for dcn401 because VTotal
register is only 16 bits wide on dcn401.
Reviewed-by: default avatarChris Park <chris.park@amd.com>
Signed-off-by: default avatarDillon Varone <dillon.varone@amd.com>
Signed-off-by: default avatarTom Chung <chiahsuan.chung@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 7a1eb668
...@@ -1822,6 +1822,7 @@ static bool dcn401_resource_construct( ...@@ -1822,6 +1822,7 @@ static bool dcn401_resource_construct(
dc->caps.edp_dsc_support = true; dc->caps.edp_dsc_support = true;
dc->caps.extended_aux_timeout_support = true; dc->caps.extended_aux_timeout_support = true;
dc->caps.dmcub_support = true; dc->caps.dmcub_support = true;
dc->caps.max_v_total = (1 << 15) - 1;
if (ASICREV_IS_GC_12_0_1_A0(dc->ctx->asic_id.hw_internal_rev)) if (ASICREV_IS_GC_12_0_1_A0(dc->ctx->asic_id.hw_internal_rev))
dc->caps.dcc_plane_width_limit = 7680; dc->caps.dcc_plane_width_limit = 7680;
......
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