Commit 25093bde authored by Alexandru Ardelean's avatar Alexandru Ardelean Committed by Mark Brown

spi: implement SW control for CS times

This change implements CS control for setup, hold & inactive delays.

The `cs_setup` delay is completely new, and can help with cases where
asserting the CS, also brings the device out of power-sleep, where there
needs to be a longer (than usual), before transferring data.

The `cs_hold` time can overlap with the `delay` (or `delay_usecs`) from an
SPI transfer. The main difference is that `cs_hold` implies that CS will be
de-asserted.

The `cs_inactive` delay does not have a clear use-case yet. It has been
implemented mostly because the `spi_set_cs_timing()` function implements
it. To some degree, this could overlap or replace `cs_change_delay`, but
this will require more consideration/investigation in the future.

All these delays have been added to the `spi_controller` struct, as they
would typically be configured by calling `spi_set_cs_timing()` after an
`spi_setup()` call.

Software-mode for CS control, implies that the `set_cs_timing()` hook has
not been provided for the `spi_controller` object.
Signed-off-by: default avatarAlexandru Ardelean <alexandru.ardelean@analog.com>
Link: https://lore.kernel.org/r/20190926105147.7839-16-alexandru.ardelean@analog.comSigned-off-by: default avatarMark Brown <broonie@kernel.org>
parent 81059366
......@@ -775,6 +775,15 @@ int spi_register_board_info(struct spi_board_info const *info, unsigned n)
static void spi_set_cs(struct spi_device *spi, bool enable)
{
bool enable1 = enable;
if (!spi->controller->set_cs_timing) {
if (enable1)
spi_delay_exec(&spi->controller->cs_setup, NULL);
else
spi_delay_exec(&spi->controller->cs_hold, NULL);
}
if (spi->mode & SPI_CS_HIGH)
enable = !enable;
......@@ -800,6 +809,11 @@ static void spi_set_cs(struct spi_device *spi, bool enable)
} else if (spi->controller->set_cs) {
spi->controller->set_cs(spi, !enable);
}
if (!spi->controller->set_cs_timing) {
if (!enable1)
spi_delay_exec(&spi->controller->cs_inactive, NULL);
}
}
#ifdef CONFIG_HAS_DMA
......@@ -3278,10 +3292,39 @@ EXPORT_SYMBOL_GPL(spi_setup);
int spi_set_cs_timing(struct spi_device *spi, struct spi_delay *setup,
struct spi_delay *hold, struct spi_delay *inactive)
{
size_t len;
if (spi->controller->set_cs_timing)
return spi->controller->set_cs_timing(spi, setup, hold,
inactive);
return -ENOTSUPP;
if ((setup && setup->unit == SPI_DELAY_UNIT_SCK) ||
(hold && hold->unit == SPI_DELAY_UNIT_SCK) ||
(inactive && inactive->unit == SPI_DELAY_UNIT_SCK)) {
dev_err(&spi->dev,
"Clock-cycle delays for CS not supported in SW mode\n");
return -ENOTSUPP;
}
len = sizeof(struct spi_delay);
/* copy delays to controller */
if (setup)
memcpy(&spi->controller->cs_setup, setup, len);
else
memset(&spi->controller->cs_setup, 0, len);
if (hold)
memcpy(&spi->controller->cs_hold, hold, len);
else
memset(&spi->controller->cs_hold, 0, len);
if (inactive)
memcpy(&spi->controller->cs_inactive, inactive, len);
else
memset(&spi->controller->cs_inactive, 0, len);
return 0;
}
EXPORT_SYMBOL_GPL(spi_set_cs_timing);
......
......@@ -609,6 +609,11 @@ struct spi_controller {
/* Optimized handlers for SPI memory-like operations. */
const struct spi_controller_mem_ops *mem_ops;
/* CS delays */
struct spi_delay cs_setup;
struct spi_delay cs_hold;
struct spi_delay cs_inactive;
/* gpio chip select */
int *cs_gpios;
struct gpio_desc **cs_gpiods;
......
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