Commit 255a4042 authored by Sergei Shtylyov's avatar Sergei Shtylyov Committed by Simon Horman

ARM: dts: r8a7794: add EtherAVB clock

Add the EtherAVB clock to the R8A7794 device tree.

Based on the commit eaa870b3 ("ARM: shmobile: r8a7791: add EtherAVB
clock").
Signed-off-by: default avatarSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent c816617e
......@@ -1112,13 +1112,14 @@ R8A7794_CLK_SCIF0 R8A7794_CLK_DU0
mstp8_clks: mstp8_clks@e6150990 {
compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>;
clocks = <&zg_clk>, <&zg_clk>, <&p_clk>;
clocks = <&zg_clk>, <&zg_clk>, <&hp_clk>, <&p_clk>;
#clock-cells = <1>;
clock-indices = <
R8A7794_CLK_VIN1 R8A7794_CLK_VIN0 R8A7794_CLK_ETHER
R8A7794_CLK_VIN1 R8A7794_CLK_VIN0
R8A7794_CLK_ETHERAVB R8A7794_CLK_ETHER
>;
clock-output-names =
"vin1", "vin0", "ether";
"vin1", "vin0", "etheravb", "ether";
};
mstp9_clks: mstp9_clks@e6150994 {
compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
......
......@@ -84,6 +84,7 @@
/* MSTP8 */
#define R8A7794_CLK_VIN1 10
#define R8A7794_CLK_VIN0 11
#define R8A7794_CLK_ETHERAVB 12
#define R8A7794_CLK_ETHER 13
/* MSTP9 */
......
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