Commit 25f72a74 authored by Vipul Pandya's avatar Vipul Pandya Committed by David S. Miller

net: sxgbe: add ethtool related functions support Samsung sxgbe

This patch adds ethtool related functions.
Signed-off-by: default avatarVipul Pandya <vipul.pandya@samsung.com>
Neatening-by: default avatarJoe Perches <joe@perches.com>
Signed-off-by: default avatarByungho An <bh74.an@samsung.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 8f7807ae
......@@ -197,6 +197,20 @@ enum dma_irq_status {
#define SXGBE_FOR_EACH_QUEUE(max_queues, queue_num) \
for (queue_num = 0; queue_num < max_queues; queue_num++)
#define DRV_VERSION "1.0.0"
#define SXGBE_MAX_RX_CHANNELS 16
#define SXGBE_MAX_TX_CHANNELS 16
#define START_MAC_REG_OFFSET 0x0000
#define MAX_MAC_REG_OFFSET 0x0DFC
#define START_MTL_REG_OFFSET 0x1000
#define MAX_MTL_REG_OFFSET 0x18FC
#define START_DMA_REG_OFFSET 0x3000
#define MAX_DMA_REG_OFFSET 0x38FC
#define REG_SPACE_SIZE 0x2000
/* sxgbe statistics counters */
struct sxgbe_extra_stats {
/* TX/RX IRQ events */
......@@ -482,6 +496,7 @@ struct sxgbe_priv_data {
/* advanced time stamp support */
u32 adv_ts;
int use_riwt;
struct ptp_clock *ptp_clock;
/* tc control */
int tx_tc;
......@@ -517,5 +532,4 @@ const struct sxgbe_mtl_ops *sxgbe_get_mtl_ops(void);
void sxgbe_disable_eee_mode(struct sxgbe_priv_data * const priv);
bool sxgbe_eee_init(struct sxgbe_priv_data * const priv);
#endif /* __SXGBE_COMMON_H__ */
......@@ -2139,6 +2139,10 @@ struct sxgbe_priv_data *sxgbe_drv_probe(struct device *device,
priv->rxcsum_insertion = true;
}
/* Initialise pause frame settings */
priv->rx_pause = 1;
priv->tx_pause = 1;
/* Rx Watchdog is available, enable depend on platform data */
if (!priv->plat->riwt_off) {
priv->use_riwt = 1;
......
......@@ -195,6 +195,12 @@
#define SXGBE_CORE_RSS_ADD_REG 0x0C88
#define SXGBE_CORE_RSS_DATA_REG 0x0C8C
/* RSS control register bits */
#define SXGBE_CORE_RSS_CTL_UDP4TE BIT(3)
#define SXGBE_CORE_RSS_CTL_TCP4TE BIT(2)
#define SXGBE_CORE_RSS_CTL_IP2TE BIT(1)
#define SXGBE_CORE_RSS_CTL_RSSE BIT(0)
/* IEEE 1588 registers */
#define SXGBE_CORE_TSTAMP_CTL_REG 0x0D00
#define SXGBE_CORE_SUBSEC_INC_REG 0x0D04
......
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