Commit 2650fd86 authored by Arnd Bergmann's avatar Arnd Bergmann

Merge tag 'v6.11-rockchip-dtsfixes' of...

Merge tag 'v6.11-rockchip-dtsfixes' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/fixes

A number of pin fixes for Puma, Rock-Pi-E and rk356x, and as it turns
out the VO0 and VO1 general register files are not identical as suggested
by their original compatible. As there are no users of those yet,
everybody agreed that we should fix the compatibles.

* tag 'v6.11-rockchip-dtsfixes' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  arm64: dts: rockchip: Fix compatibles for RK3588 VO{0,1}_GRF
  dt-bindings: soc: rockchip: Fix compatibles for RK3588 VO{0,1}_GRF
  arm64: dts: rockchip: override BIOS_DISABLE signal via GPIO hog on RK3399 Puma
  arm64: dts: rockchip: fix eMMC/SPI corruption when audio has been used on RK3399 Puma
  arm64: dts: rockchip: fix PMIC interrupt pin in pinctrl for ROCK Pi E
  arm64: dts: rockchip: Remove broken tsadc pinctrl binding for rk356x

Link: https://lore.kernel.org/r/7602696.A5hrfCrGMc@diegoSigned-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 95fe795c 5956ee09
...@@ -31,10 +31,16 @@ properties: ...@@ -31,10 +31,16 @@ properties:
- rockchip,rk3588-pcie3-pipe-grf - rockchip,rk3588-pcie3-pipe-grf
- rockchip,rk3588-usb-grf - rockchip,rk3588-usb-grf
- rockchip,rk3588-usbdpphy-grf - rockchip,rk3588-usbdpphy-grf
- rockchip,rk3588-vo-grf - rockchip,rk3588-vo0-grf
- rockchip,rk3588-vo1-grf
- rockchip,rk3588-vop-grf - rockchip,rk3588-vop-grf
- rockchip,rv1108-usbgrf - rockchip,rv1108-usbgrf
- const: syscon - const: syscon
- items:
- const: rockchip,rk3588-vo-grf
- const: syscon
deprecated: true
description: Use rockchip,rk3588-vo{0,1}-grf instead.
- items: - items:
- enum: - enum:
- rockchip,px30-grf - rockchip,px30-grf
...@@ -262,6 +268,8 @@ allOf: ...@@ -262,6 +268,8 @@ allOf:
contains: contains:
enum: enum:
- rockchip,rk3588-vo-grf - rockchip,rk3588-vo-grf
- rockchip,rk3588-vo0-grf
- rockchip,rk3588-vo1-grf
then: then:
required: required:
......
...@@ -387,7 +387,7 @@ led_pin: led-pin { ...@@ -387,7 +387,7 @@ led_pin: led-pin {
pmic { pmic {
pmic_int_l: pmic-int-l { pmic_int_l: pmic-int-l {
rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>; rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
}; };
}; };
......
...@@ -154,6 +154,22 @@ bios-disable-hog { ...@@ -154,6 +154,22 @@ bios-disable-hog {
}; };
}; };
&gpio3 {
/*
* The Qseven BIOS_DISABLE signal on the RK3399-Q7 keeps the on-module
* eMMC and SPI flash powered-down initially (in fact it keeps the
* reset signal asserted). BIOS_DISABLE_OVERRIDE pin allows to override
* that signal so that eMMC and SPI can be used regardless of the state
* of the signal.
*/
bios-disable-override-hog {
gpios = <RK_PD5 GPIO_ACTIVE_LOW>;
gpio-hog;
line-name = "bios_disable_override";
output-high;
};
};
&gmac { &gmac {
assigned-clocks = <&cru SCLK_RMII_SRC>; assigned-clocks = <&cru SCLK_RMII_SRC>;
assigned-clock-parents = <&clkin_gmac>; assigned-clock-parents = <&clkin_gmac>;
...@@ -409,6 +425,7 @@ vdd_cpu_b: regulator@60 { ...@@ -409,6 +425,7 @@ vdd_cpu_b: regulator@60 {
&i2s0 { &i2s0 {
pinctrl-0 = <&i2s0_2ch_bus>; pinctrl-0 = <&i2s0_2ch_bus>;
pinctrl-1 = <&i2s0_2ch_bus_bclk_off>;
rockchip,playback-channels = <2>; rockchip,playback-channels = <2>;
rockchip,capture-channels = <2>; rockchip,capture-channels = <2>;
status = "okay"; status = "okay";
...@@ -417,8 +434,8 @@ &i2s0 { ...@@ -417,8 +434,8 @@ &i2s0 {
/* /*
* As Q7 does not specify neither a global nor a RX clock for I2S these * As Q7 does not specify neither a global nor a RX clock for I2S these
* signals are not used. Furthermore I2S0_LRCK_RX is used as GPIO. * signals are not used. Furthermore I2S0_LRCK_RX is used as GPIO.
* Therefore we have to redefine the i2s0_2ch_bus definition to prevent * Therefore we have to redefine the i2s0_2ch_bus and i2s0_2ch_bus_bclk_off
* conflicts. * definitions to prevent conflicts.
*/ */
&i2s0_2ch_bus { &i2s0_2ch_bus {
rockchip,pins = rockchip,pins =
...@@ -428,6 +445,14 @@ &i2s0_2ch_bus { ...@@ -428,6 +445,14 @@ &i2s0_2ch_bus {
<3 RK_PD7 1 &pcfg_pull_none>; <3 RK_PD7 1 &pcfg_pull_none>;
}; };
&i2s0_2ch_bus_bclk_off {
rockchip,pins =
<3 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>,
<3 RK_PD2 1 &pcfg_pull_none>,
<3 RK_PD3 1 &pcfg_pull_none>,
<3 RK_PD7 1 &pcfg_pull_none>;
};
&io_domains { &io_domains {
status = "okay"; status = "okay";
bt656-supply = <&vcc_1v8>; bt656-supply = <&vcc_1v8>;
...@@ -449,9 +474,14 @@ &pcie_clkreqn_cpm { ...@@ -449,9 +474,14 @@ &pcie_clkreqn_cpm {
&pinctrl { &pinctrl {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&q7_thermal_pin>; pinctrl-0 = <&q7_thermal_pin &bios_disable_override_hog_pin>;
gpios { gpios {
bios_disable_override_hog_pin: bios-disable-override-hog-pin {
rockchip,pins =
<3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_down>;
};
q7_thermal_pin: q7-thermal-pin { q7_thermal_pin: q7-thermal-pin {
rockchip,pins = rockchip,pins =
<0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
......
...@@ -1592,10 +1592,9 @@ tsadc: tsadc@fe710000 { ...@@ -1592,10 +1592,9 @@ tsadc: tsadc@fe710000 {
<&cru SRST_TSADCPHY>; <&cru SRST_TSADCPHY>;
rockchip,grf = <&grf>; rockchip,grf = <&grf>;
rockchip,hw-tshut-temp = <95000>; rockchip,hw-tshut-temp = <95000>;
pinctrl-names = "init", "default", "sleep"; pinctrl-names = "default", "sleep";
pinctrl-0 = <&tsadc_pin>; pinctrl-0 = <&tsadc_shutorg>;
pinctrl-1 = <&tsadc_shutorg>; pinctrl-1 = <&tsadc_pin>;
pinctrl-2 = <&tsadc_pin>;
#thermal-sensor-cells = <1>; #thermal-sensor-cells = <1>;
status = "disabled"; status = "disabled";
}; };
......
...@@ -582,14 +582,14 @@ vop_grf: syscon@fd5a4000 { ...@@ -582,14 +582,14 @@ vop_grf: syscon@fd5a4000 {
}; };
vo0_grf: syscon@fd5a6000 { vo0_grf: syscon@fd5a6000 {
compatible = "rockchip,rk3588-vo-grf", "syscon"; compatible = "rockchip,rk3588-vo0-grf", "syscon";
reg = <0x0 0xfd5a6000 0x0 0x2000>; reg = <0x0 0xfd5a6000 0x0 0x2000>;
clocks = <&cru PCLK_VO0GRF>; clocks = <&cru PCLK_VO0GRF>;
}; };
vo1_grf: syscon@fd5a8000 { vo1_grf: syscon@fd5a8000 {
compatible = "rockchip,rk3588-vo-grf", "syscon"; compatible = "rockchip,rk3588-vo1-grf", "syscon";
reg = <0x0 0xfd5a8000 0x0 0x100>; reg = <0x0 0xfd5a8000 0x0 0x4000>;
clocks = <&cru PCLK_VO1GRF>; clocks = <&cru PCLK_VO1GRF>;
}; };
......
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