Commit 26d51853 authored by Bartlomiej Zolnierkiewicz's avatar Bartlomiej Zolnierkiewicz Committed by MyungJoo Ham

PM / devfreq: exynos: make more PPMU code common

Move common PPMU code from exynos[45]_bus.c to exynos_ppmu.c.

There should be no functional changes caused by this patch.
Signed-off-by: default avatarBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: default avatarMyungJoo Ham <myungjoo.ham@samsung.com>
parent a94f6b4a
......@@ -75,11 +75,6 @@ struct busfreq_opp_info {
unsigned long volt;
};
struct busfreq_ppmu_data {
struct exynos_ppmu *ppmu;
int ppmu_end;
};
struct busfreq_data {
enum exynos4_busf_type type;
struct device *dev;
......@@ -515,49 +510,6 @@ static int exynos4x12_set_busclk(struct busfreq_data *data,
return 0;
}
static void busfreq_mon_reset(struct busfreq_ppmu_data *ppmu_data)
{
unsigned int i;
for (i = 0; i < ppmu_data->ppmu_end; i++) {
void __iomem *ppmu_base = ppmu_data->ppmu[i].hw_base;
/* Reset the performance and cycle counters */
exynos_ppmu_reset(ppmu_base);
/* Setup count registers to monitor read/write transactions */
ppmu_data->ppmu[i].event[PPMU_PMNCNT3] = RDWR_DATA_COUNT;
exynos_ppmu_setevent(ppmu_base, PPMU_PMNCNT3,
ppmu_data->ppmu[i].event[PPMU_PMNCNT3]);
exynos_ppmu_start(ppmu_base);
}
}
static void exynos4_read_ppmu(struct busfreq_ppmu_data *ppmu_data)
{
int i, j;
for (i = 0; i < ppmu_data->ppmu_end; i++) {
void __iomem *ppmu_base = ppmu_data->ppmu[i].hw_base;
exynos_ppmu_stop(ppmu_base);
/* Update local data from PPMU */
ppmu_data->ppmu[i].ccnt = __raw_readl(ppmu_base + PPMU_CCNT);
for (j = PPMU_PMNCNT0; j < PPMU_PMNCNT_MAX; j++) {
if (ppmu_data->ppmu[i].event[j] == 0)
ppmu_data->ppmu[i].count[j] = 0;
else
ppmu_data->ppmu[i].count[j] =
exynos_ppmu_read(ppmu_base, j);
}
}
busfreq_mon_reset(ppmu_data);
}
static int exynos4x12_get_intspec(unsigned long mifclk)
{
int i = 0;
......@@ -681,24 +633,6 @@ static int exynos4_bus_target(struct device *dev, unsigned long *_freq,
return err;
}
static int exynos4_get_busier_ppmu(struct busfreq_ppmu_data *ppmu_data)
{
int i, j;
int busy = 0;
unsigned int temp = 0;
for (i = 0; i < ppmu_data->ppmu_end; i++) {
for (j = PPMU_PMNCNT0; j < PPMU_PMNCNT_MAX; j++) {
if (ppmu_data->ppmu[i].count[j] > temp) {
temp = ppmu_data->ppmu[i].count[j];
busy = i;
}
}
}
return busy;
}
static int exynos4_bus_get_dev_status(struct device *dev,
struct devfreq_dev_status *stat)
{
......@@ -706,8 +640,8 @@ static int exynos4_bus_get_dev_status(struct device *dev,
struct busfreq_ppmu_data *ppmu_data = &data->ppmu_data;
int busier;
exynos4_read_ppmu(ppmu_data);
busier = exynos4_get_busier_ppmu(ppmu_data);
exynos_read_ppmu(ppmu_data);
busier = exynos_get_busier_ppmu(ppmu_data);
stat->current_frequency = data->curr_oppinfo.rate;
/* Number of cycles spent on memory access */
......
......@@ -46,11 +46,6 @@ enum exynos_ppmu_list {
PPMU_END,
};
struct busfreq_ppmu_data {
struct exynos_ppmu *ppmu;
int ppmu_end;
};
struct busfreq_data_int {
struct device *dev;
struct devfreq *devfreq;
......@@ -80,49 +75,6 @@ static struct int_bus_opp_table exynos5_int_opp_table[] = {
{0, 0, 0},
};
static void busfreq_mon_reset(struct busfreq_ppmu_data *ppmu_data)
{
unsigned int i;
for (i = 0; i < ppmu_data->ppmu_end; i++) {
void __iomem *ppmu_base = ppmu_data->ppmu[i].hw_base;
/* Reset the performance and cycle counters */
exynos_ppmu_reset(ppmu_base);
/* Setup count registers to monitor read/write transactions */
ppmu_data->ppmu[i].event[PPMU_PMNCNT3] = RDWR_DATA_COUNT;
exynos_ppmu_setevent(ppmu_base, PPMU_PMNCNT3,
ppmu_data->ppmu[i].event[PPMU_PMNCNT3]);
exynos_ppmu_start(ppmu_base);
}
}
static void exynos5_read_ppmu(struct busfreq_ppmu_data *ppmu_data)
{
int i, j;
for (i = 0; i < ppmu_data->ppmu_end; i++) {
void __iomem *ppmu_base = ppmu_data->ppmu[i].hw_base;
exynos_ppmu_stop(ppmu_base);
/* Update local data from PPMU */
ppmu_data->ppmu[i].ccnt = __raw_readl(ppmu_base + PPMU_CCNT);
for (j = PPMU_PMNCNT0; j < PPMU_PMNCNT_MAX; j++) {
if (ppmu_data->ppmu[i].event[j] == 0)
ppmu_data->ppmu[i].count[j] = 0;
else
ppmu_data->ppmu[i].count[j] =
exynos_ppmu_read(ppmu_base, j);
}
}
busfreq_mon_reset(ppmu_data);
}
static int exynos5_int_setvolt(struct busfreq_data_int *data,
unsigned long volt)
{
......@@ -190,24 +142,6 @@ static int exynos5_busfreq_int_target(struct device *dev, unsigned long *_freq,
return err;
}
static int exynos5_get_busier_dmc(struct busfreq_ppmu_data *ppmu_data)
{
int i, j;
int busy = 0;
unsigned int temp = 0;
for (i = 0; i < ppmu_data->ppmu_end; i++) {
for (j = PPMU_PMNCNT0; j < PPMU_PMNCNT_MAX; j++) {
if (ppmu_data->ppmu[i].count[j] > temp) {
temp = ppmu_data->ppmu[i].count[j];
busy = i;
}
}
}
return busy;
}
static int exynos5_int_get_dev_status(struct device *dev,
struct devfreq_dev_status *stat)
{
......@@ -217,8 +151,8 @@ static int exynos5_int_get_dev_status(struct device *dev,
struct busfreq_ppmu_data *ppmu_data = &data->ppmu_data;
int busier_dmc;
exynos5_read_ppmu(ppmu_data);
busier_dmc = exynos5_get_busier_dmc(ppmu_data);
exynos_read_ppmu(ppmu_data);
busier_dmc = exynos_get_busier_ppmu(ppmu_data);
stat->current_frequency = data->curr_freq;
......
......@@ -54,3 +54,63 @@ unsigned int exynos_ppmu_read(void __iomem *ppmu_base, unsigned int ch)
return total;
}
void busfreq_mon_reset(struct busfreq_ppmu_data *ppmu_data)
{
unsigned int i;
for (i = 0; i < ppmu_data->ppmu_end; i++) {
void __iomem *ppmu_base = ppmu_data->ppmu[i].hw_base;
/* Reset the performance and cycle counters */
exynos_ppmu_reset(ppmu_base);
/* Setup count registers to monitor read/write transactions */
ppmu_data->ppmu[i].event[PPMU_PMNCNT3] = RDWR_DATA_COUNT;
exynos_ppmu_setevent(ppmu_base, PPMU_PMNCNT3,
ppmu_data->ppmu[i].event[PPMU_PMNCNT3]);
exynos_ppmu_start(ppmu_base);
}
}
void exynos_read_ppmu(struct busfreq_ppmu_data *ppmu_data)
{
int i, j;
for (i = 0; i < ppmu_data->ppmu_end; i++) {
void __iomem *ppmu_base = ppmu_data->ppmu[i].hw_base;
exynos_ppmu_stop(ppmu_base);
/* Update local data from PPMU */
ppmu_data->ppmu[i].ccnt = __raw_readl(ppmu_base + PPMU_CCNT);
for (j = PPMU_PMNCNT0; j < PPMU_PMNCNT_MAX; j++) {
if (ppmu_data->ppmu[i].event[j] == 0)
ppmu_data->ppmu[i].count[j] = 0;
else
ppmu_data->ppmu[i].count[j] =
exynos_ppmu_read(ppmu_base, j);
}
}
busfreq_mon_reset(ppmu_data);
}
int exynos_get_busier_ppmu(struct busfreq_ppmu_data *ppmu_data)
{
unsigned int count = 0;
int i, j, busy = 0;
for (i = 0; i < ppmu_data->ppmu_end; i++) {
for (j = PPMU_PMNCNT0; j < PPMU_PMNCNT_MAX; j++) {
if (ppmu_data->ppmu[i].count[j] > count) {
count = ppmu_data->ppmu[i].count[j];
busy = i;
}
}
}
return busy;
}
......@@ -69,10 +69,18 @@ struct exynos_ppmu {
bool count_overflow[PPMU_PMNCNT_MAX];
};
struct busfreq_ppmu_data {
struct exynos_ppmu *ppmu;
int ppmu_end;
};
void exynos_ppmu_reset(void __iomem *ppmu_base);
void exynos_ppmu_setevent(void __iomem *ppmu_base, unsigned int ch,
unsigned int evt);
void exynos_ppmu_start(void __iomem *ppmu_base);
void exynos_ppmu_stop(void __iomem *ppmu_base);
unsigned int exynos_ppmu_read(void __iomem *ppmu_base, unsigned int ch);
void busfreq_mon_reset(struct busfreq_ppmu_data *ppmu_data);
void exynos_read_ppmu(struct busfreq_ppmu_data *ppmu_data);
int exynos_get_busier_ppmu(struct busfreq_ppmu_data *ppmu_data);
#endif /* __DEVFREQ_EXYNOS_PPMU_H */
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