Commit 26d88a68 authored by Henning Schild's avatar Henning Schild Committed by Hans de Goede

gpio-f7188x: use unique labels for banks/chips

So that drivers building on top can find those pins with GPIO_LOOKUP
helpers.
Reviewed-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: default avatarLinus Walleij <linus.walleij@linaro.org>
Acked-by: default avatarSimon Guinot <simon.guinot@sequanux.org>
Signed-off-by: default avatarHenning Schild <henning.schild@siemens.com>
Acked-by: default avatarBartosz Golaszewski <brgl@bgdev.pl>
Link: https://lore.kernel.org/r/20220825104422.14156-5-henning.schild@siemens.comSigned-off-by: default avatarHans de Goede <hdegoede@redhat.com>
parent d0918a84
...@@ -163,10 +163,10 @@ static void f7188x_gpio_set(struct gpio_chip *chip, unsigned offset, int value); ...@@ -163,10 +163,10 @@ static void f7188x_gpio_set(struct gpio_chip *chip, unsigned offset, int value);
static int f7188x_gpio_set_config(struct gpio_chip *chip, unsigned offset, static int f7188x_gpio_set_config(struct gpio_chip *chip, unsigned offset,
unsigned long config); unsigned long config);
#define F7188X_GPIO_BANK(_base, _ngpio, _regbase) \ #define F7188X_GPIO_BANK(_base, _ngpio, _regbase, _label) \
{ \ { \
.chip = { \ .chip = { \
.label = DRVNAME, \ .label = _label, \
.owner = THIS_MODULE, \ .owner = THIS_MODULE, \
.get_direction = f7188x_gpio_get_direction, \ .get_direction = f7188x_gpio_get_direction, \
.direction_input = f7188x_gpio_direction_in, \ .direction_input = f7188x_gpio_direction_in, \
...@@ -191,98 +191,98 @@ static int f7188x_gpio_set_config(struct gpio_chip *chip, unsigned offset, ...@@ -191,98 +191,98 @@ static int f7188x_gpio_set_config(struct gpio_chip *chip, unsigned offset,
#define f7188x_gpio_data_single(type) ((type) == nct6116d) #define f7188x_gpio_data_single(type) ((type) == nct6116d)
static struct f7188x_gpio_bank f71869_gpio_bank[] = { static struct f7188x_gpio_bank f71869_gpio_bank[] = {
F7188X_GPIO_BANK(0, 6, 0xF0), F7188X_GPIO_BANK(0, 6, 0xF0, DRVNAME "-0"),
F7188X_GPIO_BANK(10, 8, 0xE0), F7188X_GPIO_BANK(10, 8, 0xE0, DRVNAME "-1"),
F7188X_GPIO_BANK(20, 8, 0xD0), F7188X_GPIO_BANK(20, 8, 0xD0, DRVNAME "-2"),
F7188X_GPIO_BANK(30, 8, 0xC0), F7188X_GPIO_BANK(30, 8, 0xC0, DRVNAME "-3"),
F7188X_GPIO_BANK(40, 8, 0xB0), F7188X_GPIO_BANK(40, 8, 0xB0, DRVNAME "-4"),
F7188X_GPIO_BANK(50, 5, 0xA0), F7188X_GPIO_BANK(50, 5, 0xA0, DRVNAME "-5"),
F7188X_GPIO_BANK(60, 6, 0x90), F7188X_GPIO_BANK(60, 6, 0x90, DRVNAME "-6"),
}; };
static struct f7188x_gpio_bank f71869a_gpio_bank[] = { static struct f7188x_gpio_bank f71869a_gpio_bank[] = {
F7188X_GPIO_BANK(0, 6, 0xF0), F7188X_GPIO_BANK(0, 6, 0xF0, DRVNAME "-0"),
F7188X_GPIO_BANK(10, 8, 0xE0), F7188X_GPIO_BANK(10, 8, 0xE0, DRVNAME "-1"),
F7188X_GPIO_BANK(20, 8, 0xD0), F7188X_GPIO_BANK(20, 8, 0xD0, DRVNAME "-2"),
F7188X_GPIO_BANK(30, 8, 0xC0), F7188X_GPIO_BANK(30, 8, 0xC0, DRVNAME "-3"),
F7188X_GPIO_BANK(40, 8, 0xB0), F7188X_GPIO_BANK(40, 8, 0xB0, DRVNAME "-4"),
F7188X_GPIO_BANK(50, 5, 0xA0), F7188X_GPIO_BANK(50, 5, 0xA0, DRVNAME "-5"),
F7188X_GPIO_BANK(60, 8, 0x90), F7188X_GPIO_BANK(60, 8, 0x90, DRVNAME "-6"),
F7188X_GPIO_BANK(70, 8, 0x80), F7188X_GPIO_BANK(70, 8, 0x80, DRVNAME "-7"),
}; };
static struct f7188x_gpio_bank f71882_gpio_bank[] = { static struct f7188x_gpio_bank f71882_gpio_bank[] = {
F7188X_GPIO_BANK(0, 8, 0xF0), F7188X_GPIO_BANK(0, 8, 0xF0, DRVNAME "-0"),
F7188X_GPIO_BANK(10, 8, 0xE0), F7188X_GPIO_BANK(10, 8, 0xE0, DRVNAME "-1"),
F7188X_GPIO_BANK(20, 8, 0xD0), F7188X_GPIO_BANK(20, 8, 0xD0, DRVNAME "-2"),
F7188X_GPIO_BANK(30, 4, 0xC0), F7188X_GPIO_BANK(30, 4, 0xC0, DRVNAME "-3"),
F7188X_GPIO_BANK(40, 4, 0xB0), F7188X_GPIO_BANK(40, 4, 0xB0, DRVNAME "-4"),
}; };
static struct f7188x_gpio_bank f71889a_gpio_bank[] = { static struct f7188x_gpio_bank f71889a_gpio_bank[] = {
F7188X_GPIO_BANK(0, 7, 0xF0), F7188X_GPIO_BANK(0, 7, 0xF0, DRVNAME "-0"),
F7188X_GPIO_BANK(10, 7, 0xE0), F7188X_GPIO_BANK(10, 7, 0xE0, DRVNAME "-1"),
F7188X_GPIO_BANK(20, 8, 0xD0), F7188X_GPIO_BANK(20, 8, 0xD0, DRVNAME "-2"),
F7188X_GPIO_BANK(30, 8, 0xC0), F7188X_GPIO_BANK(30, 8, 0xC0, DRVNAME "-3"),
F7188X_GPIO_BANK(40, 8, 0xB0), F7188X_GPIO_BANK(40, 8, 0xB0, DRVNAME "-4"),
F7188X_GPIO_BANK(50, 5, 0xA0), F7188X_GPIO_BANK(50, 5, 0xA0, DRVNAME "-5"),
F7188X_GPIO_BANK(60, 8, 0x90), F7188X_GPIO_BANK(60, 8, 0x90, DRVNAME "-6"),
F7188X_GPIO_BANK(70, 8, 0x80), F7188X_GPIO_BANK(70, 8, 0x80, DRVNAME "-7"),
}; };
static struct f7188x_gpio_bank f71889_gpio_bank[] = { static struct f7188x_gpio_bank f71889_gpio_bank[] = {
F7188X_GPIO_BANK(0, 7, 0xF0), F7188X_GPIO_BANK(0, 7, 0xF0, DRVNAME "-0"),
F7188X_GPIO_BANK(10, 7, 0xE0), F7188X_GPIO_BANK(10, 7, 0xE0, DRVNAME "-1"),
F7188X_GPIO_BANK(20, 8, 0xD0), F7188X_GPIO_BANK(20, 8, 0xD0, DRVNAME "-2"),
F7188X_GPIO_BANK(30, 8, 0xC0), F7188X_GPIO_BANK(30, 8, 0xC0, DRVNAME "-3"),
F7188X_GPIO_BANK(40, 8, 0xB0), F7188X_GPIO_BANK(40, 8, 0xB0, DRVNAME "-4"),
F7188X_GPIO_BANK(50, 5, 0xA0), F7188X_GPIO_BANK(50, 5, 0xA0, DRVNAME "-5"),
F7188X_GPIO_BANK(60, 8, 0x90), F7188X_GPIO_BANK(60, 8, 0x90, DRVNAME "-6"),
F7188X_GPIO_BANK(70, 8, 0x80), F7188X_GPIO_BANK(70, 8, 0x80, DRVNAME "-7"),
}; };
static struct f7188x_gpio_bank f81866_gpio_bank[] = { static struct f7188x_gpio_bank f81866_gpio_bank[] = {
F7188X_GPIO_BANK(0, 8, 0xF0), F7188X_GPIO_BANK(0, 8, 0xF0, DRVNAME "-0"),
F7188X_GPIO_BANK(10, 8, 0xE0), F7188X_GPIO_BANK(10, 8, 0xE0, DRVNAME "-1"),
F7188X_GPIO_BANK(20, 8, 0xD0), F7188X_GPIO_BANK(20, 8, 0xD0, DRVNAME "-2"),
F7188X_GPIO_BANK(30, 8, 0xC0), F7188X_GPIO_BANK(30, 8, 0xC0, DRVNAME "-3"),
F7188X_GPIO_BANK(40, 8, 0xB0), F7188X_GPIO_BANK(40, 8, 0xB0, DRVNAME "-4"),
F7188X_GPIO_BANK(50, 8, 0xA0), F7188X_GPIO_BANK(50, 8, 0xA0, DRVNAME "-5"),
F7188X_GPIO_BANK(60, 8, 0x90), F7188X_GPIO_BANK(60, 8, 0x90, DRVNAME "-6"),
F7188X_GPIO_BANK(70, 8, 0x80), F7188X_GPIO_BANK(70, 8, 0x80, DRVNAME "-7"),
F7188X_GPIO_BANK(80, 8, 0x88), F7188X_GPIO_BANK(80, 8, 0x88, DRVNAME "-8"),
}; };
static struct f7188x_gpio_bank f81804_gpio_bank[] = { static struct f7188x_gpio_bank f81804_gpio_bank[] = {
F7188X_GPIO_BANK(0, 8, 0xF0), F7188X_GPIO_BANK(0, 8, 0xF0, DRVNAME "-0"),
F7188X_GPIO_BANK(10, 8, 0xE0), F7188X_GPIO_BANK(10, 8, 0xE0, DRVNAME "-1"),
F7188X_GPIO_BANK(20, 8, 0xD0), F7188X_GPIO_BANK(20, 8, 0xD0, DRVNAME "-2"),
F7188X_GPIO_BANK(50, 8, 0xA0), F7188X_GPIO_BANK(50, 8, 0xA0, DRVNAME "-3"),
F7188X_GPIO_BANK(60, 8, 0x90), F7188X_GPIO_BANK(60, 8, 0x90, DRVNAME "-4"),
F7188X_GPIO_BANK(70, 8, 0x80), F7188X_GPIO_BANK(70, 8, 0x80, DRVNAME "-5"),
F7188X_GPIO_BANK(90, 8, 0x98), F7188X_GPIO_BANK(90, 8, 0x98, DRVNAME "-6"),
}; };
static struct f7188x_gpio_bank f81865_gpio_bank[] = { static struct f7188x_gpio_bank f81865_gpio_bank[] = {
F7188X_GPIO_BANK(0, 8, 0xF0), F7188X_GPIO_BANK(0, 8, 0xF0, DRVNAME "-0"),
F7188X_GPIO_BANK(10, 8, 0xE0), F7188X_GPIO_BANK(10, 8, 0xE0, DRVNAME "-1"),
F7188X_GPIO_BANK(20, 8, 0xD0), F7188X_GPIO_BANK(20, 8, 0xD0, DRVNAME "-2"),
F7188X_GPIO_BANK(30, 8, 0xC0), F7188X_GPIO_BANK(30, 8, 0xC0, DRVNAME "-3"),
F7188X_GPIO_BANK(40, 8, 0xB0), F7188X_GPIO_BANK(40, 8, 0xB0, DRVNAME "-4"),
F7188X_GPIO_BANK(50, 8, 0xA0), F7188X_GPIO_BANK(50, 8, 0xA0, DRVNAME "-5"),
F7188X_GPIO_BANK(60, 5, 0x90), F7188X_GPIO_BANK(60, 5, 0x90, DRVNAME "-6"),
}; };
static struct f7188x_gpio_bank nct6116d_gpio_bank[] = { static struct f7188x_gpio_bank nct6116d_gpio_bank[] = {
F7188X_GPIO_BANK(0, 8, 0xE0), F7188X_GPIO_BANK(0, 8, 0xE0, DRVNAME "-0"),
F7188X_GPIO_BANK(10, 8, 0xE4), F7188X_GPIO_BANK(10, 8, 0xE4, DRVNAME "-1"),
F7188X_GPIO_BANK(20, 8, 0xE8), F7188X_GPIO_BANK(20, 8, 0xE8, DRVNAME "-2"),
F7188X_GPIO_BANK(30, 8, 0xEC), F7188X_GPIO_BANK(30, 8, 0xEC, DRVNAME "-3"),
F7188X_GPIO_BANK(40, 8, 0xF0), F7188X_GPIO_BANK(40, 8, 0xF0, DRVNAME "-4"),
F7188X_GPIO_BANK(50, 8, 0xF4), F7188X_GPIO_BANK(50, 8, 0xF4, DRVNAME "-5"),
F7188X_GPIO_BANK(60, 8, 0xF8), F7188X_GPIO_BANK(60, 8, 0xF8, DRVNAME "-6"),
F7188X_GPIO_BANK(70, 1, 0xFC), F7188X_GPIO_BANK(70, 1, 0xFC, DRVNAME "-7"),
}; };
static int f7188x_gpio_get_direction(struct gpio_chip *chip, unsigned offset) static int f7188x_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
......
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