drm/nv50/gr: move to exec engine interfaces

This needs a massive cleanup, but to catch bugs from the interface changes
vs the engine code cleanup, this will be done later.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drivers/gpu/drm/nouveau/nouveau_channel.c

@@ -304,7 +304,8 @@ nouveau_channel_put_unlocked(struct nouveau_channel **pchan)
 
 	/* destroy the engine specific contexts */
 	pfifo->destroy_context(chan);
-	pgraph->destroy_context(chan);
+	if (pgraph->destroy_context)
+		pgraph->destroy_context(chan);
 	for (i = 0; i < NVOBJ_ENGINE_NR; i++) {
 		if (chan->engctx[i])
 			dev_priv->eng[i]->context_del(chan, i);

drivers/gpu/drm/nouveau/nouveau_drv.c

@@ -217,7 +217,8 @@ nouveau_pci_suspend(struct pci_dev *pdev, pm_message_t pm_state)
 	pfifo->reassign(dev, false);
 	pfifo->disable(dev);
 	pfifo->unload_context(dev);
-	pgraph->unload_context(dev);
+	if (pgraph->unload_context)
+		pgraph->unload_context(dev);
 
 	ret = pinstmem->suspend(dev);
 	if (ret) {

drivers/gpu/drm/nouveau/nouveau_drv.h

@@ -1189,18 +1189,8 @@ extern void nv40_grctx_init(struct nouveau_grctx *);
 extern void nv40_graph_set_tile_region(struct drm_device *dev, int i);
 
 /* nv50_graph.c */
-extern int  nv50_graph_init(struct drm_device *);
-extern void nv50_graph_takedown(struct drm_device *);
-extern void nv50_graph_fifo_access(struct drm_device *, bool);
-extern struct nouveau_channel *nv50_graph_channel(struct drm_device *);
-extern int  nv50_graph_create_context(struct nouveau_channel *);
-extern void nv50_graph_destroy_context(struct nouveau_channel *);
-extern int  nv50_graph_load_context(struct nouveau_channel *);
-extern int  nv50_graph_unload_context(struct drm_device *);
-extern int  nv50_graph_object_new(struct nouveau_channel *, u32, u16);
+extern int  nv50_graph_create(struct drm_device *);
 extern int  nv50_grctx_init(struct nouveau_grctx *);
-extern void nv50_graph_tlb_flush(struct drm_device *dev);
-extern void nv84_graph_tlb_flush(struct drm_device *dev);
 extern struct nouveau_enum nv50_data_error_names[];
 
 /* nvc0_graph.c */

drivers/gpu/drm/nouveau/nouveau_object.c

@@ -636,18 +636,20 @@ nouveau_gpuobj_gr_new(struct nouveau_channel *chan, u32 handle, int class)
 	return -EINVAL;
 
 found:
-	switch (oc->engine) {
-	case NVOBJ_ENGINE_SW:
-		return nouveau_gpuobj_sw_new(chan, handle, class);
-	case NVOBJ_ENGINE_GR:
-		if ((dev_priv->card_type >= NV_20 && !chan->ramin_grctx) ||
-		    (dev_priv->card_type  < NV_20 && !chan->pgraph_ctx)) {
-			ret = pgraph->create_context(chan);
-			if (ret)
-				return ret;
-		}
+	if (!dev_priv->eng[oc->engine]) {
+		switch (oc->engine) {
+		case NVOBJ_ENGINE_SW:
+			return nouveau_gpuobj_sw_new(chan, handle, class);
+		case NVOBJ_ENGINE_GR:
+			if ((dev_priv->card_type >= NV_20 && !chan->ramin_grctx) ||
+			    (dev_priv->card_type  < NV_20 && !chan->pgraph_ctx)) {
+				ret = pgraph->create_context(chan);
+				if (ret)
+					return ret;
+			}
 
-		return pgraph->object_new(chan, handle, class);
+			return pgraph->object_new(chan, handle, class);
+		}
 	}
 
 	if (!chan->engctx[oc->engine]) {

drivers/gpu/drm/nouveau/nouveau_state.c

@@ -363,20 +363,10 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
 		engine->timer.takedown		= nv04_timer_takedown;
 		engine->fb.init			= nv50_fb_init;
 		engine->fb.takedown		= nv50_fb_takedown;
-		engine->graph.init		= nv50_graph_init;
-		engine->graph.takedown		= nv50_graph_takedown;
-		engine->graph.fifo_access	= nv50_graph_fifo_access;
-		engine->graph.channel		= nv50_graph_channel;
-		engine->graph.create_context	= nv50_graph_create_context;
-		engine->graph.destroy_context	= nv50_graph_destroy_context;
-		engine->graph.load_context	= nv50_graph_load_context;
-		engine->graph.unload_context	= nv50_graph_unload_context;
-		engine->graph.object_new	= nv50_graph_object_new;
-		if (dev_priv->chipset == 0x50 ||
-		    dev_priv->chipset == 0xac)
-			engine->graph.tlb_flush	= nv50_graph_tlb_flush;
-		else
-			engine->graph.tlb_flush	= nv84_graph_tlb_flush;
+		engine->graph.init		= nouveau_stub_init;
+		engine->graph.takedown		= nouveau_stub_takedown;
+		engine->graph.fifo_access	= nvc0_graph_fifo_access;
+		engine->graph.channel		= nvc0_graph_channel;
 		engine->fifo.channels		= 128;
 		engine->fifo.init		= nv50_fifo_init;
 		engine->fifo.takedown		= nv50_fifo_takedown;
@@ -635,6 +625,9 @@ nouveau_card_init(struct drm_device *dev)
 	if (ret)
 		goto out_timer;
 
+	if (dev_priv->card_type == NV_50)
+		nv50_graph_create(dev);
+
 	switch (dev_priv->chipset) {
 	case 0x84:
 	case 0x86:
@@ -712,8 +705,10 @@ nouveau_card_init(struct drm_device *dev)
 out_engine:
 	if (!nouveau_noaccel) {
 		for (e = e - 1; e >= 0; e--) {
+			if (!dev_priv->eng[e])
+				continue;
 			dev_priv->eng[e]->fini(dev, e);
-			dev_priv->eng[e]->destroy(dev, e);
+			dev_priv->eng[e]->destroy(dev,e );
 		}
 	}
 

drivers/gpu/drm/nouveau/nouveau_vm.h

@@ -53,7 +53,6 @@ struct nouveau_vm {
 	int refcount;
 
 	struct list_head pgd_list;
-	atomic_t pgraph_refs;
 	atomic_t engref[16];
 
 	struct nouveau_vm_pgt *pgt;

drivers/gpu/drm/nouveau/nv50_vm.c

@@ -151,7 +151,6 @@ nv50_vm_flush(struct nouveau_vm *vm)
 	struct drm_nouveau_private *dev_priv = vm->dev->dev_private;
 	struct nouveau_instmem_engine *pinstmem = &dev_priv->engine.instmem;
 	struct nouveau_fifo_engine *pfifo = &dev_priv->engine.fifo;
-	struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
 	int i;
 
 	pinstmem->flush(vm->dev);
@@ -163,9 +162,6 @@ nv50_vm_flush(struct nouveau_vm *vm)
 	}
 
 	pfifo->tlb_flush(vm->dev);
-
-	if (atomic_read(&vm->pgraph_refs))
-		pgraph->tlb_flush(vm->dev);
 	for (i = 0; i < NVOBJ_ENGINE_NR; i++) {
 		if (atomic_read(&vm->engref[i]))
 			dev_priv->eng[i]->tlb_flush(vm->dev, i);