Commit 27dd47db authored by Vineet Gupta's avatar Vineet Gupta Committed by Greg Kroah-Hartman

ARC: Entry Handler tweaks: Optimize away redundant IRQ_DISABLE_SAVE

commit fce16bc3 upstream.

In the exception return path, for both U/K cases, intr are already
disabled (for various existing reasons). So when we drop down to
@restore_regs, we need not redo that.

There was subtle issue - when intr were NOT being disabled for
ret-to-kernel-but-no-preemption case - now fixed by moving the
IRQ_DISABLE further up in @resume_kernel_mode.

So what do we gain:

* Shaves off a few insn in return path.

* Eliminates the need for IRQ_DISABLE_SAVE assembler macro for ARCv2
  hence allows for entry code sharing.
Signed-off-by: default avatarVineet Gupta <vgupta@synopsys.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 1a43738d
...@@ -137,13 +137,6 @@ static inline void arch_unmask_irq(unsigned int irq) ...@@ -137,13 +137,6 @@ static inline void arch_unmask_irq(unsigned int irq)
flag \scratch flag \scratch
.endm .endm
.macro IRQ_DISABLE_SAVE scratch, save
lr \scratch, [status32]
mov \save, \scratch /* Make a copy */
bic \scratch, \scratch, (STATUS_E1_MASK | STATUS_E2_MASK)
flag \scratch
.endm
.macro IRQ_ENABLE scratch .macro IRQ_ENABLE scratch
lr \scratch, [status32] lr \scratch, [status32]
or \scratch, \scratch, (STATUS_E1_MASK | STATUS_E2_MASK) or \scratch, \scratch, (STATUS_E1_MASK | STATUS_E2_MASK)
......
...@@ -653,6 +653,9 @@ resume_kernel_mode: ...@@ -653,6 +653,9 @@ resume_kernel_mode:
#ifdef CONFIG_PREEMPT #ifdef CONFIG_PREEMPT
; This is a must for preempt_schedule_irq()
IRQ_DISABLE r9
; Can't preempt if preemption disabled ; Can't preempt if preemption disabled
GET_CURR_THR_INFO_FROM_SP r10 GET_CURR_THR_INFO_FROM_SP r10
ld r8, [r10, THREAD_INFO_PREEMPT_COUNT] ld r8, [r10, THREAD_INFO_PREEMPT_COUNT]
...@@ -662,8 +665,6 @@ resume_kernel_mode: ...@@ -662,8 +665,6 @@ resume_kernel_mode:
ld r9, [r10, THREAD_INFO_FLAGS] ld r9, [r10, THREAD_INFO_FLAGS]
bbit0 r9, TIF_NEED_RESCHED, restore_regs bbit0 r9, TIF_NEED_RESCHED, restore_regs
IRQ_DISABLE r9
; Invoke PREEMPTION ; Invoke PREEMPTION
bl preempt_schedule_irq bl preempt_schedule_irq
...@@ -676,12 +677,11 @@ resume_kernel_mode: ...@@ -676,12 +677,11 @@ resume_kernel_mode:
; ;
; Restore the saved sys context (common exit-path for EXCPN/IRQ/Trap) ; Restore the saved sys context (common exit-path for EXCPN/IRQ/Trap)
; IRQ shd definitely not happen between now and rtie ; IRQ shd definitely not happen between now and rtie
; All 2 entry points to here already disable interrupts
restore_regs : restore_regs :
; Disable Interrupts while restoring reg-file back lr r10, [status32]
; XXX can this be optimised out
IRQ_DISABLE_SAVE r9, r10 ;@r10 has prisitine (pre-disable) copy
#ifdef CONFIG_ARC_CURR_IN_REG #ifdef CONFIG_ARC_CURR_IN_REG
; Restore User R25 ; Restore User R25
......
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