Commit 29e66833 authored by Jonathan Cavitt's avatar Jonathan Cavitt Committed by Andi Shyti

drm/i915: Add GuC TLB Invalidation device info flags

Add device info flags for if GuC TLB Invalidation is enabled.
Signed-off-by: default avatarJonathan Cavitt <jonathan.cavitt@intel.com>
Reviewed-by: default avatarAndi Shyti <andi.shyti@linux.intel.com>
Acked-by: default avatarTvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: default avatarNirmoy Das <nirmoy.das@intel.com>
Signed-off-by: default avatarAndi Shyti <andi.shyti@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231017180806.3054290-2-jonathan.cavitt@intel.com
parent 6aa8d50a
...@@ -856,6 +856,8 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915, ...@@ -856,6 +856,8 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
#define HAS_GUC_DEPRIVILEGE(i915) \ #define HAS_GUC_DEPRIVILEGE(i915) \
(INTEL_INFO(i915)->has_guc_deprivilege) (INTEL_INFO(i915)->has_guc_deprivilege)
#define HAS_GUC_TLB_INVALIDATION(i915) (INTEL_INFO(i915)->has_guc_tlb_invalidation)
#define HAS_3D_PIPELINE(i915) (INTEL_INFO(i915)->has_3d_pipeline) #define HAS_3D_PIPELINE(i915) (INTEL_INFO(i915)->has_3d_pipeline)
#define HAS_ONE_EU_PER_FUSE_BIT(i915) (INTEL_INFO(i915)->has_one_eu_per_fuse_bit) #define HAS_ONE_EU_PER_FUSE_BIT(i915) (INTEL_INFO(i915)->has_one_eu_per_fuse_bit)
......
...@@ -154,6 +154,7 @@ enum intel_ppgtt_type { ...@@ -154,6 +154,7 @@ enum intel_ppgtt_type {
func(has_heci_pxp); \ func(has_heci_pxp); \
func(has_heci_gscfi); \ func(has_heci_gscfi); \
func(has_guc_deprivilege); \ func(has_guc_deprivilege); \
func(has_guc_tlb_invalidation); \
func(has_l3_ccs_read); \ func(has_l3_ccs_read); \
func(has_l3_dpf); \ func(has_l3_dpf); \
func(has_llc); \ func(has_llc); \
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment