Commit 2a2cd521 authored by Mark Brown's avatar Mark Brown

Merge remote-tracking branches 'regmap/fix/be', 'regmap/fix/doc' and...

Merge remote-tracking branches 'regmap/fix/be', 'regmap/fix/doc' and 'regmap/fix/spmi' into regmap-linus
Device-Tree binding for regmap Devicetree binding for regmap
The endianness mode of CPU & Device scenarios:
Index Device Endianness properties
---------------------------------------------------
1 BE 'big-endian'
2 LE 'little-endian'
3 Native 'native-endian'
For one device driver, which will run in different scenarios above
on different SoCs using the devicetree, we need one way to simplify
this.
Optional properties: Optional properties:
- {big,little,native}-endian: these are boolean properties, if absent
then the implementation will choose a default based on the device
being controlled. These properties are for register values and all
the buffers only. Native endian means that the CPU and device have
the same endianness.
Examples: little-endian,
Scenario 1 : CPU in LE mode & device in LE mode. big-endian,
dev: dev@40031000 { native-endian: See common-properties.txt for a definition
compatible = "name";
reg = <0x40031000 0x1000>;
...
};
Scenario 2 : CPU in LE mode & device in BE mode. Note:
dev: dev@40031000 { Regmap defaults to little-endian register access on MMIO based
compatible = "name"; devices, this is by far the most common setting. On CPU
reg = <0x40031000 0x1000>; architectures that typically run big-endian operating systems
... (e.g. PowerPC), registers can be defined as big-endian and must
big-endian; be marked that way in the devicetree.
};
Scenario 3 : CPU in BE mode & device in BE mode. On SoCs that can be operated in both big-endian and little-endian
dev: dev@40031000 { modes, with a single hardware switch controlling both the endianess
compatible = "name"; of the CPU and a byteswap for MMIO registers (e.g. many Broadcom MIPS
reg = <0x40031000 0x1000>; chips), "native-endian" is used to allow using the same device tree
... blob in both cases.
};
Scenario 4 : CPU in BE mode & device in LE mode. Examples:
Scenario 1 : a register set in big-endian mode.
dev: dev@40031000 { dev: dev@40031000 {
compatible = "name"; compatible = "syscon";
reg = <0x40031000 0x1000>; reg = <0x40031000 0x1000>;
big-endian;
... ...
little-endian;
}; };
...@@ -13,6 +13,7 @@ ...@@ -13,6 +13,7 @@
#ifndef _REGMAP_INTERNAL_H #ifndef _REGMAP_INTERNAL_H
#define _REGMAP_INTERNAL_H #define _REGMAP_INTERNAL_H
#include <linux/device.h>
#include <linux/regmap.h> #include <linux/regmap.h>
#include <linux/fs.h> #include <linux/fs.h>
#include <linux/list.h> #include <linux/list.h>
......
...@@ -23,6 +23,8 @@ ...@@ -23,6 +23,8 @@
#include <linux/regmap.h> #include <linux/regmap.h>
#include <linux/slab.h> #include <linux/slab.h>
#include "internal.h"
struct regmap_mmio_context { struct regmap_mmio_context {
void __iomem *regs; void __iomem *regs;
unsigned val_bytes; unsigned val_bytes;
...@@ -246,7 +248,7 @@ static struct regmap_mmio_context *regmap_mmio_gen_context(struct device *dev, ...@@ -246,7 +248,7 @@ static struct regmap_mmio_context *regmap_mmio_gen_context(struct device *dev,
ctx->val_bytes = config->val_bits / 8; ctx->val_bytes = config->val_bits / 8;
ctx->clk = ERR_PTR(-ENODEV); ctx->clk = ERR_PTR(-ENODEV);
switch (config->reg_format_endian) { switch (regmap_get_val_endian(dev, &regmap_mmio, config)) {
case REGMAP_ENDIAN_DEFAULT: case REGMAP_ENDIAN_DEFAULT:
case REGMAP_ENDIAN_LITTLE: case REGMAP_ENDIAN_LITTLE:
#ifdef __LITTLE_ENDIAN #ifdef __LITTLE_ENDIAN
......
...@@ -142,7 +142,7 @@ static int regmap_spmi_ext_read(void *context, ...@@ -142,7 +142,7 @@ static int regmap_spmi_ext_read(void *context,
while (val_size) { while (val_size) {
len = min_t(size_t, val_size, 8); len = min_t(size_t, val_size, 8);
err = spmi_ext_register_readl(context, addr, val, val_size); err = spmi_ext_register_readl(context, addr, val, len);
if (err) if (err)
goto err_out; goto err_out;
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment