Commit 2a3f9da3 authored by Dave Airlie's avatar Dave Airlie

Merge tag 'drm-intel-fixes-2020-08-27' of...

Merge tag 'drm-intel-fixes-2020-08-27' of git://anongit.freedesktop.org/drm/drm-intel into drm-fixes

drm/i915 fixes for v5.9-rc3:
- Fix command parser desc matching with masks
Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
From: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/87imd45ufw.fsf@intel.com
parents c2b2f02a e5f10d63
...@@ -1204,6 +1204,12 @@ static u32 *copy_batch(struct drm_i915_gem_object *dst_obj, ...@@ -1204,6 +1204,12 @@ static u32 *copy_batch(struct drm_i915_gem_object *dst_obj,
return dst; return dst;
} }
static inline bool cmd_desc_is(const struct drm_i915_cmd_descriptor * const desc,
const u32 cmd)
{
return desc->cmd.value == (cmd & desc->cmd.mask);
}
static bool check_cmd(const struct intel_engine_cs *engine, static bool check_cmd(const struct intel_engine_cs *engine,
const struct drm_i915_cmd_descriptor *desc, const struct drm_i915_cmd_descriptor *desc,
const u32 *cmd, u32 length) const u32 *cmd, u32 length)
...@@ -1242,19 +1248,19 @@ static bool check_cmd(const struct intel_engine_cs *engine, ...@@ -1242,19 +1248,19 @@ static bool check_cmd(const struct intel_engine_cs *engine,
* allowed mask/value pair given in the whitelist entry. * allowed mask/value pair given in the whitelist entry.
*/ */
if (reg->mask) { if (reg->mask) {
if (desc->cmd.value == MI_LOAD_REGISTER_MEM) { if (cmd_desc_is(desc, MI_LOAD_REGISTER_MEM)) {
DRM_DEBUG("CMD: Rejected LRM to masked register 0x%08X\n", DRM_DEBUG("CMD: Rejected LRM to masked register 0x%08X\n",
reg_addr); reg_addr);
return false; return false;
} }
if (desc->cmd.value == MI_LOAD_REGISTER_REG) { if (cmd_desc_is(desc, MI_LOAD_REGISTER_REG)) {
DRM_DEBUG("CMD: Rejected LRR to masked register 0x%08X\n", DRM_DEBUG("CMD: Rejected LRR to masked register 0x%08X\n",
reg_addr); reg_addr);
return false; return false;
} }
if (desc->cmd.value == MI_LOAD_REGISTER_IMM(1) && if (cmd_desc_is(desc, MI_LOAD_REGISTER_IMM(1)) &&
(offset + 2 > length || (offset + 2 > length ||
(cmd[offset + 1] & reg->mask) != reg->value)) { (cmd[offset + 1] & reg->mask) != reg->value)) {
DRM_DEBUG("CMD: Rejected LRI to masked register 0x%08X\n", DRM_DEBUG("CMD: Rejected LRI to masked register 0x%08X\n",
...@@ -1478,7 +1484,7 @@ int intel_engine_cmd_parser(struct intel_engine_cs *engine, ...@@ -1478,7 +1484,7 @@ int intel_engine_cmd_parser(struct intel_engine_cs *engine,
break; break;
} }
if (desc->cmd.value == MI_BATCH_BUFFER_START) { if (cmd_desc_is(desc, MI_BATCH_BUFFER_START)) {
ret = check_bbstart(cmd, offset, length, batch_length, ret = check_bbstart(cmd, offset, length, batch_length,
batch_addr, shadow_addr, batch_addr, shadow_addr,
jump_whitelist); jump_whitelist);
......
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