Commit 2af64b4a authored by Ping-Ke Shih's avatar Ping-Ke Shih Committed by Kalle Valo

rtw89: add hci_func_en_addr to support variant generation

The HCI_FUNC_EN address of 8852C is different from existing chipset, so
add a chip_info::hci_func_en_addr to fill the address individually.
Signed-off-by: default avatarPing-Ke Shih <pkshih@realtek.com>
Signed-off-by: default avatarKalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20220307060457.56789-8-pkshih@realtek.com
parent 2a7e54db
......@@ -2307,6 +2307,8 @@ struct rtw89_chip_info {
u8 rf_para_dlink_num;
const struct rtw89_btc_rf_trx_para *rf_para_dlink;
u8 ps_mode_supported;
u32 hci_func_en_addr;
};
union rtw89_bus_info {
......
......@@ -2619,7 +2619,9 @@ static int rtw89_mac_fw_dl_pre_init(struct rtw89_dev *rtwdev)
static void rtw89_mac_hci_func_en(struct rtw89_dev *rtwdev)
{
rtw89_write32_set(rtwdev, R_AX_HCI_FUNC_EN,
const struct rtw89_chip_info *chip = rtwdev->chip;
rtw89_write32_set(rtwdev, chip->hci_func_en_addr,
B_AX_HCI_TXDMA_EN | B_AX_HCI_RXDMA_EN);
}
......
......@@ -217,6 +217,8 @@
#define B_AX_ASFF_FULL_NO_STK BIT(1)
#define B_AX_EN_STUCK_DBG BIT(0)
#define R_AX_HCI_FUNC_EN_V1 0x7880
#define R_AX_PHYREG_SET 0x8040
#define PHYREG_SET_ALL_CYCLE 0x8
......
......@@ -2057,6 +2057,7 @@ const struct rtw89_chip_info rtw8852a_chip_info = {
.ps_mode_supported = BIT(RTW89_PS_MODE_RFOFF) |
BIT(RTW89_PS_MODE_CLK_GATED) |
BIT(RTW89_PS_MODE_PWR_GATED),
.hci_func_en_addr = R_AX_HCI_FUNC_EN,
};
EXPORT_SYMBOL(rtw8852a_chip_info);
......
......@@ -194,6 +194,7 @@ const struct rtw89_chip_info rtw8852c_chip_info = {
.fw_name = "rtw89/rtw8852c_fw.bin",
.pwr_on_seq = NULL,
.pwr_off_seq = NULL,
.hci_func_en_addr = R_AX_HCI_FUNC_EN_V1,
};
EXPORT_SYMBOL(rtw8852c_chip_info);
......
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