[PATCH] spelling fix adress/addres -> address

This patch provides the following spelling fixes.

 adress  -> address
 addres  -> address

except for cases in two files which appear to be in French and German.
These were left as is.

Documentation/networking/alias.txt

@@ -2,7 +2,7 @@
 IP-Aliasing:
 ============
 
-IP-aliases are additional IP-adresses/masks hooked up to a base 
+IP-aliases are additional IP-addresses/masks hooked up to a base 
 interface by adding a colon and a string when running ifconfig. 
 This string is usually numeric, but this is not a must.
 

Documentation/networking/bonding.txt

@@ -258,7 +258,7 @@ arp_ip_target
         Specifies the ip addresses to use when arp_interval is > 0. These are
         the targets of the ARP request sent to determine the health of the link
         to the targets. Specify these values in ddd.ddd.ddd.ddd format.
-        Multiple ip adresses must be separated by a comma. At least one ip
+        Multiple ip addresses must be separated by a comma. At least one ip
         address needs to be given for ARP monitoring to work. The maximum number
         of targets that can be specified is set at 16.
 

Documentation/s390/cds.txt

@@ -286,7 +286,7 @@ The cpa parameter points to the first format 1 CCW of a channel program :
 
 struct ccw1 {
       __u8  cmd_code;/* command code */
-      __u8  flags;   /* flags, like IDA adressing, etc. */
+      __u8  flags;   /* flags, like IDA addressing, etc. */
       __u16 count;   /* byte count */
       __u32 cda;     /* data address */
 } __attribute__ ((packed,aligned(8)));

Documentation/scsi/ChangeLog.sym53c8xx_2

@@ -102,7 +102,7 @@ Mon July 2 12:00 2001 Gerard Roudier
 Sun Sep 9 18:00 2001 Gerard Roudier 
 	* version sym-2.1.12-20010909
 	- Change my email address.
-	- Add infrastructure for the forthcoming 64 bit DMA adressing support.
+	- Add infrastructure for the forthcoming 64 bit DMA addressing support.
 	  (Based on PCI 64 bit patch from David S. Miller)
 	- Donnot use anymore vm_offset_t type.
 

arch/cris/boot/compressed/misc.c

@@ -13,7 +13,7 @@
  */
 
 /* where the piggybacked kernel image expects itself to live.
- * it is the same adress we use when we network load an uncompressed
+ * it is the same address we use when we network load an uncompressed
  * image into DRAM, and it is the address the kernel is linked to live
  * at by etrax100.ld.
  */

arch/cris/drivers/eeprom.c

@@ -802,7 +802,7 @@ static int eeprom_address(unsigned long addr)
   return 1;
 }
 
-/* Reads from current adress. */
+/* Reads from current address. */
 
 static int read_from_eeprom(char * buf, int count)
 {

arch/ia64/sn/io/sn2/pcibr/pcibr_dvr.c

@@ -3505,7 +3505,7 @@ pcibr_dmamap_addr(pcibr_dmamap_t pcibr_dmamap,
     } else
 	xio_port = pcibr_dmamap->bd_xio_port;
 
-    /* If this DMA is to an addres that
+    /* If this DMA is to an address that
      * refers back to this Bridge chip,
      * reduce it back to the correct
      * PCI MEM address.

arch/ia64/sn/io/sn2/pcibr/pcibr_error.c

@@ -1874,7 +1874,7 @@ pcibr_dmard_error(
 			BRIDGE_ERRUPPR_ADDRMASK) << 32)));
 
     /*
-     * need to ensure that the xtalk adress in ioe
+     * need to ensure that the xtalk address in ioe
      * maps to PCI error address read from bridge.
      * How to convert PCI address back to Xtalk address ?
      * (better idea: convert XTalk address to PCI address

drivers/hotplug/ibmphp_pci.c

@@ -491,7 +491,7 @@ static int configure_device (struct pci_func *func)
 				pci_bus_write_config_dword (ibmphp_pci_bus, devfn, address[count], func->pfmem[count]->start);
 
 				/*_______________This is for debugging purposes only______________________________*/				
-				debug ("b4 writing, start addres is %x\n", func->pfmem[count]->start);
+				debug ("b4 writing, start address is %x\n", func->pfmem[count]->start);
 				pci_bus_read_config_dword (ibmphp_pci_bus, devfn, address[count], &bar[count]);
 				debug ("after writing, start address is %x\n", bar[count]);
 				/*_________________________________________________________________________________*/

drivers/ieee1394/raw1394.c

@@ -238,7 +238,7 @@ static void remove_host(struct hpsb_host *host)
                 list_del(&hi->list);
                 host_count--;
                 /* 
-                   FIXME: adressranges should be removed 
+                   FIXME: addressranges should be removed 
                    and fileinfo states should be initialized
                    (including setting generation to 
                    internal-generation ...)

drivers/isdn/hardware/eicon/mi_pc.h

@@ -120,7 +120,7 @@ struct mp_load {
 #define MQ_CACHED_ADDR(x)               (((x) & 0x1fffffffL) | 0x80000000L)
 #define MQ_UNCACHED_ADDR(x)             (((x) & 0x1fffffffL) | 0xa0000000L)
 /*--------------------------------------------------------------------------------------------*/
-/* Additional definitions reflecting the different adress map of the  SERVER 4BRI V2          */
+/* Additional definitions reflecting the different address map of the  SERVER 4BRI V2          */
 #define MQ2_BREG_RISC                   0x0200      /* RISC Reset ect                         */
 #define MQ2_BREG_IRQ_TEST               0x0400      /* Interrupt request, no CPU interaction  */
 #define MQ2_BOARD_DSP_OFFSET            0x800000    /* PC relative On board DSP regs offset   */

drivers/media/dvb/av7110/saa7146_core.c

@@ -494,7 +494,7 @@ int configure_saa7146 (struct saa7146 *saa)
 
 	saa->revision = (rev & 0xf);
 
-	/* remap the memory from virtual to physical adress */
+	/* remap the memory from virtual to physical address */
 	saa->mem = ioremap ((saa->device->resource[0].start)
 			    &PCI_BASE_ADDRESS_MEM_MASK, 0x1000);
 

drivers/media/video/bt832.c

 /* Driver for Bt832 CMOS Camera Video Processor
-    i2c-adresses: 0x88 or 0x8a
+    i2c-addresses: 0x88 or 0x8a
 
   The BT832 interfaces to a Quartzsight Digital Camera (352x288, 25 or 30 fps)
   via a 9 pin connector ( 4-wire SDATA, 2-wire i2c, SCLK, VCC, GND).

drivers/media/video/bt832.h

@@ -4,7 +4,7 @@
   color digital camera directly to video capture devices via an 8-bit,
   4:2:2 YUV or YCrCb video interface.
 
- i2c adresses: 0x88 or 0x8a
+ i2c addresses: 0x88 or 0x8a
  */
 
 /* The 64 registers: */

drivers/net/ac3200.c

@@ -344,7 +344,7 @@ static int mem[MAX_AC32_CARDS];
 MODULE_PARM(io, "1-" __MODULE_STRING(MAX_AC32_CARDS) "i");
 MODULE_PARM(irq, "1-" __MODULE_STRING(MAX_AC32_CARDS) "i");
 MODULE_PARM(mem, "1-" __MODULE_STRING(MAX_AC32_CARDS) "i");
-MODULE_PARM_DESC(io, "I/O base adress(es)");
+MODULE_PARM_DESC(io, "I/O base address(es)");
 MODULE_PARM_DESC(irq, "IRQ number(s)");
 MODULE_PARM_DESC(mem, "Memory base address(es)");
 MODULE_DESCRIPTION("Ansel AC3200 EISA ethernet driver");

drivers/net/bonding.c

@@ -2547,7 +2547,7 @@ static int bond_xmit_roundrobin(struct sk_buff *skb, struct net_device *dev)
 
 /* 
  * in XOR mode, we determine the output device by performing xor on
- * the source and destination hw adresses.  If this device is not 
+ * the source and destination hw addresses.  If this device is not 
  * enabled, find the next slave following this xor slave. 
  */
 static int bond_xmit_xor(struct sk_buff *skb, struct net_device *dev)

drivers/net/tulip/dmfe.c

@@ -1337,7 +1337,7 @@ static void update_cr6(u32 cr6_data, unsigned long ioaddr)
 
 /*
  *	Send a setup frame for DM9132
- *	This setup frame initilize DM910X addres filter mode
+ *	This setup frame initilize DM910X address filter mode
 */
 
 static void dm9132_id_table(struct DEVICE *dev, int mc_cnt)
@@ -1380,7 +1380,7 @@ static void dm9132_id_table(struct DEVICE *dev, int mc_cnt)
 
 /*
  *	Send a setup frame for DM9102/DM9102A
- *	This setup frame initilize DM910X addres filter mode
+ *	This setup frame initilize DM910X address filter mode
  */
 
 static void send_filter_frame(struct DEVICE *dev, int mc_cnt)
@@ -1673,11 +1673,11 @@ static void phy_write(unsigned long iobase, u8 phy_addr, u8 offset, u16 phy_data
 		phy_write_1bit(ioaddr, PHY_DATA_0);
 		phy_write_1bit(ioaddr, PHY_DATA_1);
 
-		/* Send Phy addres */
+		/* Send Phy address */
 		for (i = 0x10; i > 0; i = i >> 1)
 			phy_write_1bit(ioaddr, phy_addr & i ? PHY_DATA_1 : PHY_DATA_0);
 
-		/* Send register addres */
+		/* Send register address */
 		for (i = 0x10; i > 0; i = i >> 1)
 			phy_write_1bit(ioaddr, offset & i ? PHY_DATA_1 : PHY_DATA_0);
 
@@ -1722,11 +1722,11 @@ static u16 phy_read(unsigned long iobase, u8 phy_addr, u8 offset, u32 chip_id)
 		phy_write_1bit(ioaddr, PHY_DATA_1);
 		phy_write_1bit(ioaddr, PHY_DATA_0);
 
-		/* Send Phy addres */
+		/* Send Phy address */
 		for (i = 0x10; i > 0; i = i >> 1)
 			phy_write_1bit(ioaddr, phy_addr & i ? PHY_DATA_1 : PHY_DATA_0);
 
-		/* Send register addres */
+		/* Send register address */
 		for (i = 0x10; i > 0; i = i >> 1)
 			phy_write_1bit(ioaddr, offset & i ? PHY_DATA_1 : PHY_DATA_0);
 

drivers/net/znet.c

@@ -357,7 +357,7 @@ static void znet_set_multicast_list (struct net_device *dev)
 	znet->tx_cur += sizeof(struct i82593_conf_block)/2;
 	outb(OP0_CONFIGURE | CR0_CHNL, ioaddr);
 
-	/* XXX FIXME maz : Add multicast adresses here, so having a
+	/* XXX FIXME maz : Add multicast addresses here, so having a
 	 * multicast address configured isn't equal to IFF_ALLMULTI */
 }
 

drivers/parport/parport_pc.c

@@ -1634,7 +1634,7 @@ static int __devinit get_superio_irq (struct parport *p)
 /*
  * Checks for port existence, all ports support SPP MODE
  * Returns: 
- *         0           :  No parallel port at this adress
+ *         0           :  No parallel port at this address
  *  PARPORT_MODE_PCSPP :  SPP port detected 
  *                        (if the user specified an ioport himself,
  *                         this shall always be the case!)

drivers/scsi/sym53c8xx_2/sym_glue.h

@@ -263,7 +263,7 @@ typedef Scsi_Cmnd *cam_scsiio_p;/* SCSI I/O */
 #endif
 
 /*
- *  If the CPU and the chip use same endian-ness adressing,
+ *  If the CPU and the chip use same endian-ness addressing,
  *  no byte reordering is needed for script patching.
  *  Macro cpu_to_scr() is to be used for script patching.
  *  Macro scr_to_cpu() is to be used for getting a DWORD 
@@ -297,7 +297,7 @@ typedef Scsi_Cmnd *cam_scsiio_p;/* SCSI I/O */
  *  would have been correctly designed for PCI, this 
  *  option would be useless.
  *
- *  If the CPU and the chip use same endian-ness adressing,
+ *  If the CPU and the chip use same endian-ness addressing,
  *  no byte reordering is needed for accessing chip io 
  *  registers. Functions suffixed by '_raw' are assumed 
  *  to access the chip over the PCI without doing byte 

drivers/scsi/sym53c8xx_2/sym_hipd.c

@@ -1235,7 +1235,7 @@ static int sym_snooptest (hcb_p np)
  *  	s4:	scntl4 (see the manual)
  *
  *  current script command:
- *  	dsp:	script adress (relative to start of script).
+ *  	dsp:	script address (relative to start of script).
  *  	dbc:	first word of script command.
  *
  *  First 24 register of the chip:

drivers/scsi/sym53c8xx_defs.h

@@ -487,7 +487,7 @@
 #endif
 
 /*
- *  If the CPU and the NCR use same endian-ness adressing,
+ *  If the CPU and the NCR use same endian-ness addressing,
  *  no byte reordering is needed for script patching.
  *  Macro cpu_to_scr() is to be used for script patching.
  *  Macro scr_to_cpu() is to be used for getting a DWORD 
@@ -521,7 +521,7 @@
  *  would have been correctly designed for PCI, this 
  *  option would be useless.
  *
- *  If the CPU and the NCR use same endian-ness adressing,
+ *  If the CPU and the NCR use same endian-ness addressing,
  *  no byte reordering is needed for accessing chip io 
  *  registers. Functions suffixed by '_raw' are assumed 
  *  to access the chip over the PCI without doing byte 

drivers/serial/8250_pnp.c

@@ -348,7 +348,7 @@ static int __devinit check_name(char *name)
  * Given a complete unknown PnP device, try to use some heuristics to
  * detect modems. Currently use such heuristic set:
  *     - dev->name or dev->bus->name must contain "modem" substring;
- *     - device must have only one IO region (8 byte long) with base adress
+ *     - device must have only one IO region (8 byte long) with base address
  *       0x2e8, 0x3e8, 0x2f8 or 0x3f8.
  *
  * Such detection looks very ugly, but can detect at least some of numerous

drivers/video/pm3fb.c

@@ -2325,7 +2325,7 @@ static void pm3fb_cfbX_putc(struct vc_data *conp, struct display *p,
 	PM3_WRITE_REG(PM3ForegroundColor, fgx);
 	PM3_WRITE_REG(PM3FillBackgroundColor, bgx);
 
-	/* WARNING : adress select X need to specify 8 bits for fontwidth <= 8 */
+	/* WARNING : address select X need to specify 8 bits for fontwidth <= 8 */
 	/* and 16 bits for fontwidth <= 16 */
 	/* same in _putcs, same for Y and fontheight */
 	if (fontwidth(p) <= 8)
@@ -2438,7 +2438,7 @@ static void pm3fb_cfbX_putcs(struct vc_data *conp, struct display *p,
 	PM3_WRITE_REG(PM3ForegroundColor, fgx);
 	PM3_WRITE_REG(PM3FillBackgroundColor, bgx);
 
-	/* WARNING : adress select X need to specify 8 bits for fontwidth <= 8 */
+	/* WARNING : address select X need to specify 8 bits for fontwidth <= 8 */
 	/* and 16 bits for fontwidth <= 16 */
 	/* same in _putc, same for Y and fontheight */
 	if (fontwidth(p) <= 8)

drivers/video/sstfb.c

@@ -21,7 +21,7 @@
  */
 
 /*
- * The voodoo1 has the following memory mapped adress space:
+ * The voodoo1 has the following memory mapped address space:
  * 0x000000 - 0x3fffff : registers              (4MB)
  * 0x400000 - 0x7fffff : linear frame buffer    (4MB)
  * 0x800000 - 0xffffff : texture memory         (8MB)

fs/jffs2/wbuf.c

@@ -256,7 +256,7 @@ int jffs2_flash_writev(struct jffs2_sb_info *c, const struct iovec *invecs, unsi
 	if (!c->wbuf)
 		return jffs2_flash_direct_writev(c, invecs, count, to, retlen);
 	
-	/* If wbuf_ofs is not initialized, set it to target adress */
+	/* If wbuf_ofs is not initialized, set it to target address */
 	if (c->wbuf_ofs == 0xFFFFFFFF) {
 		c->wbuf_ofs = PAGE_DIV(to);
 		c->wbuf_len = PAGE_MOD(to);			

include/asm-arm/arch-iop310/dma.h

@@ -69,7 +69,7 @@ typedef void (*dma_callback_t) (void *buf_context);
  */
 typedef struct _dma_desc
 {
-	u32 NDAR;					/* next descriptor adress */
+	u32 NDAR;					/* next descriptor address */
 	u32 PDAR;					/* PCI address */
 	u32 PUADR;					/* upper PCI address */
 	u32 LADR;					/* local address */

include/asm-m68knommu/mcfmbus.h

@@ -23,7 +23,7 @@
 
 
 /*
-*	Define the 5307 MBUS register set adresses
+*	Define the 5307 MBUS register set addresses
 */
 
 #define MCFMBUS_MADR	0x00

include/asm-m68knommu/mcfpci.h

@@ -17,7 +17,7 @@
 #ifdef CONFIG_PCI
 
 /*
- *	Address regions in the PCI addres space are not mapped into the
+ *	Address regions in the PCI address space are not mapped into the
  *	normal memory space of the ColdFire. They must be accessed via
  *	handler routines. This is easy for I/O space (inb/outb/etc) but
  *	needs some code changes to support ordinary memory. Interrupts

include/asm-ppc/ppcboot.h

@@ -57,7 +57,7 @@ typedef struct bd_info {
 #endif
 	unsigned long	bi_bootflags;	/* boot / reboot flag (for LynxOS) */
 	unsigned long	bi_ip_addr;	/* IP Address */
-	unsigned char	bi_enetaddr[6];	/* Ethernet adress */
+	unsigned char	bi_enetaddr[6];	/* Ethernet address */
 	unsigned short	bi_ethspeed;	/* Ethernet speed in Mbps */
 	unsigned long	bi_intfreq;	/* Internal Freq, in MHz */
 	unsigned long	bi_busfreq;	/* Bus Freq, in MHz */

include/asm-s390/cio.h

@@ -111,7 +111,7 @@ struct scsw {
 
 struct ccw1 {
 	__u8  cmd_code;		/* command code */
-	__u8  flags;   		/* flags, like IDA adressing, etc. */
+	__u8  flags;   		/* flags, like IDA addressing, etc. */
 	__u16 count;   		/* byte count */
 	__u32 cda;     		/* data address */
 } __attribute__ ((packed,aligned(8)));

include/asm-s390x/cio.h

@@ -111,7 +111,7 @@ struct scsw {
 
 struct ccw1 {
 	__u8  cmd_code;		/* command code */
-	__u8  flags;   		/* flags, like IDA adressing, etc. */
+	__u8  flags;   		/* flags, like IDA addressing, etc. */
 	__u16 count;   		/* byte count */
 	__u32 cda;     		/* data address */
 } __attribute__ ((packed,aligned(8)));

sound/pci/es1968.c

@@ -1414,7 +1414,7 @@ static snd_pcm_hardware_t snd_es1968_capture = {
    * DMA memory management *
    *************************/
 
-/* Because the Maestro can only take addresses relative to the PCM base adress
+/* Because the Maestro can only take addresses relative to the PCM base address
    register :( */
 
 static int calc_available_memory_size(es1968_t *chip)