Commit 2cac05de authored by Evan Quan's avatar Evan Quan Committed by Alex Deucher

drm/amd/powerplay: add the hw manager for vega12 (v4)

handles the driver power state setup

v2: squash in the following:
- handle negative temperature ranges
- add vega12 thermal ranges
- use ffs/fls
- remove ACG code
- resend NumOfDisplays message
- correct max dpm levels
- remove power containment settings
- fix warnings
- add sensors interface
- delete unused overdrive arbiter
- drop get_temperature callback
- smu table cleanup
- atomfirmware smu dpm table updates
v3: rebase
v4: rebase
Acked-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarEvan Quan <evan.quan@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent fa969db4
...@@ -23,7 +23,7 @@ ...@@ -23,7 +23,7 @@
#ifndef _DM_PP_INTERFACE_ #ifndef _DM_PP_INTERFACE_
#define _DM_PP_INTERFACE_ #define _DM_PP_INTERFACE_
#define PP_MAX_CLOCK_LEVELS 8 #define PP_MAX_CLOCK_LEVELS 16
enum amd_pp_display_config_type{ enum amd_pp_display_config_type{
AMD_PP_DisplayConfigType_None = 0, AMD_PP_DisplayConfigType_None = 0,
......
...@@ -31,7 +31,9 @@ HARDWARE_MGR = hwmgr.o processpptables.o \ ...@@ -31,7 +31,9 @@ HARDWARE_MGR = hwmgr.o processpptables.o \
smu7_clockpowergating.o \ smu7_clockpowergating.o \
vega10_processpptables.o vega10_hwmgr.o vega10_powertune.o \ vega10_processpptables.o vega10_hwmgr.o vega10_powertune.o \
vega10_thermal.o smu10_hwmgr.o pp_psm.o\ vega10_thermal.o smu10_hwmgr.o pp_psm.o\
pp_overdriver.o smu_helper.o pp_psm_legacy.o pp_psm_new.o pp_overdriver.o smu_helper.o pp_psm_legacy.o pp_psm_new.o \
vega12_processpptables.o vega12_hwmgr.o \
vega12_powertune.o vega12_thermal.o
AMD_PP_HWMGR = $(addprefix $(AMD_PP_PATH)/hwmgr/,$(HARDWARE_MGR)) AMD_PP_HWMGR = $(addprefix $(AMD_PP_PATH)/hwmgr/,$(HARDWARE_MGR))
......
...@@ -41,11 +41,13 @@ extern const struct pp_smumgr_func tonga_smu_funcs; ...@@ -41,11 +41,13 @@ extern const struct pp_smumgr_func tonga_smu_funcs;
extern const struct pp_smumgr_func fiji_smu_funcs; extern const struct pp_smumgr_func fiji_smu_funcs;
extern const struct pp_smumgr_func polaris10_smu_funcs; extern const struct pp_smumgr_func polaris10_smu_funcs;
extern const struct pp_smumgr_func vega10_smu_funcs; extern const struct pp_smumgr_func vega10_smu_funcs;
extern const struct pp_smumgr_func vega12_smu_funcs;
extern const struct pp_smumgr_func smu10_smu_funcs; extern const struct pp_smumgr_func smu10_smu_funcs;
extern int smu7_init_function_pointers(struct pp_hwmgr *hwmgr); extern int smu7_init_function_pointers(struct pp_hwmgr *hwmgr);
extern int smu8_init_function_pointers(struct pp_hwmgr *hwmgr); extern int smu8_init_function_pointers(struct pp_hwmgr *hwmgr);
extern int vega10_hwmgr_init(struct pp_hwmgr *hwmgr); extern int vega10_hwmgr_init(struct pp_hwmgr *hwmgr);
extern int vega12_hwmgr_init(struct pp_hwmgr *hwmgr);
extern int smu10_init_function_pointers(struct pp_hwmgr *hwmgr); extern int smu10_init_function_pointers(struct pp_hwmgr *hwmgr);
static int polaris_set_asic_special_caps(struct pp_hwmgr *hwmgr); static int polaris_set_asic_special_caps(struct pp_hwmgr *hwmgr);
...@@ -186,6 +188,10 @@ int hwmgr_early_init(struct pp_hwmgr *hwmgr) ...@@ -186,6 +188,10 @@ int hwmgr_early_init(struct pp_hwmgr *hwmgr)
hwmgr->smumgr_funcs = &vega10_smu_funcs; hwmgr->smumgr_funcs = &vega10_smu_funcs;
vega10_hwmgr_init(hwmgr); vega10_hwmgr_init(hwmgr);
break; break;
case CHIP_VEGA12:
hwmgr->smumgr_funcs = &vega12_smu_funcs;
vega12_hwmgr_init(hwmgr);
break;
default: default:
return -EINVAL; return -EINVAL;
} }
......
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/*
* Copyright 2017 Advanced Micro Devices, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
*/
#ifndef _VEGA12_POWERTUNE_H_
#define _VEGA12_POWERTUNE_H_
enum vega12_didt_config_reg_type {
VEGA12_CONFIGREG_DIDT = 0,
VEGA12_CONFIGREG_GCCAC,
VEGA12_CONFIGREG_SECAC
};
/* PowerContainment Features */
#define POWERCONTAINMENT_FEATURE_DTE 0x00000001
#define POWERCONTAINMENT_FEATURE_TDCLimit 0x00000002
#define POWERCONTAINMENT_FEATURE_PkgPwrLimit 0x00000004
struct vega12_didt_config_reg {
uint32_t offset;
uint32_t mask;
uint32_t shift;
uint32_t value;
};
int vega12_enable_power_containment(struct pp_hwmgr *hwmgr);
int vega12_set_power_limit(struct pp_hwmgr *hwmgr, uint32_t n);
int vega12_power_control_set_level(struct pp_hwmgr *hwmgr);
int vega12_disable_power_containment(struct pp_hwmgr *hwmgr);
int vega12_enable_didt_config(struct pp_hwmgr *hwmgr);
int vega12_disable_didt_config(struct pp_hwmgr *hwmgr);
#endif /* _VEGA12_POWERTUNE_H_ */
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/*
* Copyright 2017 Advanced Micro Devices, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
*/
#ifndef VEGA12_PROCESSPPTABLES_H
#define VEGA12_PROCESSPPTABLES_H
#include "hwmgr.h"
enum Vega12_I2CLineID {
Vega12_I2CLineID_DDC1 = 0x90,
Vega12_I2CLineID_DDC2 = 0x91,
Vega12_I2CLineID_DDC3 = 0x92,
Vega12_I2CLineID_DDC4 = 0x93,
Vega12_I2CLineID_DDC5 = 0x94,
Vega12_I2CLineID_DDC6 = 0x95,
Vega12_I2CLineID_SCLSDA = 0x96,
Vega12_I2CLineID_DDCVGA = 0x97
};
#define Vega12_I2C_DDC1DATA 0
#define Vega12_I2C_DDC1CLK 1
#define Vega12_I2C_DDC2DATA 2
#define Vega12_I2C_DDC2CLK 3
#define Vega12_I2C_DDC3DATA 4
#define Vega12_I2C_DDC3CLK 5
#define Vega12_I2C_SDA 40
#define Vega12_I2C_SCL 41
#define Vega12_I2C_DDC4DATA 65
#define Vega12_I2C_DDC4CLK 66
#define Vega12_I2C_DDC5DATA 0x48
#define Vega12_I2C_DDC5CLK 0x49
#define Vega12_I2C_DDC6DATA 0x4a
#define Vega12_I2C_DDC6CLK 0x4b
#define Vega12_I2C_DDCVGADATA 0x4c
#define Vega12_I2C_DDCVGACLK 0x4d
extern const struct pp_table_func vega12_pptable_funcs;
#endif
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/*
* Copyright 2017 Advanced Micro Devices, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
*/
#ifndef VEGA12_THERMAL_H
#define VEGA12_THERMAL_H
#include "hwmgr.h"
struct vega12_temperature {
uint16_t edge_temp;
uint16_t hot_spot_temp;
uint16_t hbm_temp;
uint16_t vr_soc_temp;
uint16_t vr_mem_temp;
uint16_t liquid1_temp;
uint16_t liquid2_temp;
uint16_t plx_temp;
};
#define VEGA12_THERMAL_HIGH_ALERT_MASK 0x1
#define VEGA12_THERMAL_LOW_ALERT_MASK 0x2
#define VEGA12_THERMAL_MINIMUM_TEMP_READING -256
#define VEGA12_THERMAL_MAXIMUM_TEMP_READING 255
#define VEGA12_THERMAL_MINIMUM_ALERT_TEMP 0
#define VEGA12_THERMAL_MAXIMUM_ALERT_TEMP 255
#define FDO_PWM_MODE_STATIC 1
#define FDO_PWM_MODE_STATIC_RPM 5
extern int vega12_thermal_get_temperature(struct pp_hwmgr *hwmgr);
extern int vega12_thermal_stop_thermal_controller(struct pp_hwmgr *hwmgr);
extern int vega12_fan_ctrl_get_fan_speed_info(struct pp_hwmgr *hwmgr,
struct phm_fan_speed_info *fan_speed_info);
extern int vega12_fan_ctrl_reset_fan_speed_to_default(struct pp_hwmgr *hwmgr);
extern int vega12_fan_ctrl_get_fan_speed_rpm(struct pp_hwmgr *hwmgr,
uint32_t *speed);
extern int vega12_fan_ctrl_stop_smc_fan_control(struct pp_hwmgr *hwmgr);
extern int vega12_thermal_disable_alert(struct pp_hwmgr *hwmgr);
extern int vega12_fan_ctrl_start_smc_fan_control(struct pp_hwmgr *hwmgr);
extern int vega12_start_thermal_controller(struct pp_hwmgr *hwmgr,
struct PP_TemperatureRange *range);
#endif
...@@ -232,6 +232,20 @@ enum phm_platform_caps { ...@@ -232,6 +232,20 @@ enum phm_platform_caps {
PHM_PlatformCaps_UVDClientMCTuning, PHM_PlatformCaps_UVDClientMCTuning,
PHM_PlatformCaps_ODNinACSupport, PHM_PlatformCaps_ODNinACSupport,
PHM_PlatformCaps_ODNinDCSupport, PHM_PlatformCaps_ODNinDCSupport,
PHM_PlatformCaps_UMDPState,
PHM_PlatformCaps_AutoWattmanSupport,
PHM_PlatformCaps_AutoWattmanEnable_CCCState,
PHM_PlatformCaps_FreeSyncActive,
PHM_PlatformCaps_EnableShadowPstate,
PHM_PlatformCaps_customThermalManagement,
PHM_PlatformCaps_staticFanControl,
PHM_PlatformCaps_Virtual_System,
PHM_PlatformCaps_LowestUclkReservedForUlv,
PHM_PlatformCaps_EnableBoostState,
PHM_PlatformCaps_AVFSSupport,
PHM_PlatformCaps_ThermalPolicyDelay,
PHM_PlatformCaps_CustomFanControlSupport,
PHM_PlatformCaps_BAMACO,
PHM_PlatformCaps_Max PHM_PlatformCaps_Max
}; };
......
...@@ -585,6 +585,27 @@ struct phm_ppt_v2_information { ...@@ -585,6 +585,27 @@ struct phm_ppt_v2_information {
uint8_t uc_dcef_dpm_voltage_mode; uint8_t uc_dcef_dpm_voltage_mode;
}; };
struct phm_ppt_v3_information
{
uint8_t uc_thermal_controller_type;
uint16_t us_small_power_limit1;
uint16_t us_small_power_limit2;
uint16_t us_boost_power_limit;
uint16_t us_od_turbo_power_limit;
uint16_t us_od_powersave_power_limit;
uint16_t us_software_shutdown_temp;
uint32_t *power_saving_clock_max;
uint32_t *power_saving_clock_min;
uint32_t *od_settings_max;
uint32_t *od_settings_min;
void *smc_pptable;
};
struct phm_dynamic_state_info { struct phm_dynamic_state_info {
struct phm_clock_voltage_dependency_table *vddc_dependency_on_sclk; struct phm_clock_voltage_dependency_table *vddc_dependency_on_sclk;
struct phm_clock_voltage_dependency_table *vddci_dependency_on_mclk; struct phm_clock_voltage_dependency_table *vddci_dependency_on_mclk;
......
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