Commit 2d02b8bd authored by Timothy Pearson's avatar Timothy Pearson Committed by Dave Airlie

drm/ast: Fix incorrect register check for DRAM width

During DRAM initialization on certain ASpeed devices, an incorrect
bit (bit 10) was checked in the "SDRAM Bus Width Status" register
to determine DRAM width.

Query bit 6 instead in accordance with the Aspeed AST2050 datasheet v1.05.
Signed-off-by: default avatarTimothy Pearson <tpearson@raptorengineeringinc.com>
Cc: stable@vger.kernel.org
Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
parent ead8f34c
...@@ -227,7 +227,7 @@ static int ast_get_dram_info(struct drm_device *dev) ...@@ -227,7 +227,7 @@ static int ast_get_dram_info(struct drm_device *dev)
} while (ast_read32(ast, 0x10000) != 0x01); } while (ast_read32(ast, 0x10000) != 0x01);
data = ast_read32(ast, 0x10004); data = ast_read32(ast, 0x10004);
if (data & 0x400) if (data & 0x40)
ast->dram_bus_width = 16; ast->dram_bus_width = 16;
else else
ast->dram_bus_width = 32; ast->dram_bus_width = 32;
......
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