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Commit 2d3de197 authored by Rob Herring's avatar Rob Herring Committed by Arnd Bergmann
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ARM: dts: arm: Update ICST clock nodes 'reg' and node names 

Add a 'reg' entry for ICST clock nodes on the Arm Ltd platforms. The 'reg'
entry is the VCO register address. With this, the node name can be updated
to use a generic node name, 'clock-controller', and a unit-address.
Signed-off-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: linux-arm-kernel@lists.infradead.org
Link: https://lore.kernel.org/r/20211024232239.211822-1-linus.walleij@linaro.org'
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parent 25b892b5
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Showing with 68 additions and 31 deletions
arch/arm/boot/dts/arm-realview-eb.dtsi
View file @ 2d3de197
......@@ -269,36 +269,41 @@ led@8,7 {
label = "versatile:7";
default-state = "off";
};
oscclk0: osc0@0c {
oscclk0: clock-controller@c {
compatible = "arm,syscon-icst307";
reg = <0x0c 0x04>;
#clock-cells = <0>;
lock-offset = <0x20>;
vco-offset = <0x0C>;
clocks = <&xtal24mhz>;
};
oscclk1: osc1@10 {
oscclk1: clock-controller@10 {
compatible = "arm,syscon-icst307";
reg = <0x10 0x04>;
#clock-cells = <0>;
lock-offset = <0x20>;
vco-offset = <0x10>;
clocks = <&xtal24mhz>;
};
oscclk2: osc2@14 {
oscclk2: clock-controller@14 {
compatible = "arm,syscon-icst307";
reg = <0x14 0x04>;
#clock-cells = <0>;
lock-offset = <0x20>;
vco-offset = <0x14>;
clocks = <&xtal24mhz>;
};
oscclk3: osc3@18 {
oscclk3: clock-controller@18 {
compatible = "arm,syscon-icst307";
reg = <0x18 0x04>;
#clock-cells = <0>;
lock-offset = <0x20>;
vco-offset = <0x18>;
clocks = <&xtal24mhz>;
};
oscclk4: osc4@1c {
oscclk4: clock-controller@1c {
compatible = "arm,syscon-icst307";
reg = <0x1c 0x04>;
#clock-cells = <0>;
lock-offset = <0x20>;
vco-offset = <0x1c>;
......
arch/arm/boot/dts/arm-realview-pb1176.dts
View file @ 2d3de197
......@@ -287,36 +287,41 @@ led@8,7 {
label = "versatile:7";
default-state = "off";
};
oscclk0: osc0@0c {
oscclk0: clock-controller@c {
compatible = "arm,syscon-icst307";
reg = <0x0c 0x04>;
#clock-cells = <0>;
lock-offset = <0x20>;
vco-offset = <0x0C>;
clocks = <&xtal24mhz>;
};
oscclk1: osc1@10 {
oscclk1: clock-controller@10 {
compatible = "arm,syscon-icst307";
reg = <0x10 0x04>;
#clock-cells = <0>;
lock-offset = <0x20>;
vco-offset = <0x10>;
clocks = <&xtal24mhz>;
};
oscclk2: osc2@14 {
oscclk2: clock-controller@14 {
compatible = "arm,syscon-icst307";
reg = <0x14 0x04>;
#clock-cells = <0>;
lock-offset = <0x20>;
vco-offset = <0x14>;
clocks = <&xtal24mhz>;
};
oscclk3: osc3@18 {
oscclk3: clock-controller@18 {
compatible = "arm,syscon-icst307";
reg = <0x18 0x04>;
#clock-cells = <0>;
lock-offset = <0x20>;
vco-offset = <0x18>;
clocks = <&xtal24mhz>;
};
oscclk4: osc4@1c {
oscclk4: clock-controller@1c {
compatible = "arm,syscon-icst307";
reg = <0x1c 0x04>;
#clock-cells = <0>;
lock-offset = <0x20>;
vco-offset = <0x1c>;
......
arch/arm/boot/dts/arm-realview-pb11mp.dts
View file @ 2d3de197
......@@ -378,50 +378,57 @@ led@8,7 {
default-state = "off";
};
oscclk0: osc0@0c {
oscclk0: clock-controller@c {
compatible = "arm,syscon-icst307";
reg = <0x0c 0x04>;
#clock-cells = <0>;
lock-offset = <0x20>;
vco-offset = <0x0C>;
clocks = <&xtal24mhz>;
};
oscclk1: osc1@10 {
oscclk1: clock-controller@10 {
compatible = "arm,syscon-icst307";
reg = <0x10 0x04>;
#clock-cells = <0>;
lock-offset = <0x20>;
vco-offset = <0x10>;
clocks = <&xtal24mhz>;
};
oscclk2: osc2@14 {
oscclk2: clock-controller@14 {
compatible = "arm,syscon-icst307";
reg = <0x14 0x04>;
#clock-cells = <0>;
lock-offset = <0x20>;
vco-offset = <0x14>;
clocks = <&xtal24mhz>;
};
oscclk3: osc3@18 {
oscclk3: clock-controller@18 {
compatible = "arm,syscon-icst307";
reg = <0x18 0x04>;
#clock-cells = <0>;
lock-offset = <0x20>;
vco-offset = <0x18>;
clocks = <&xtal24mhz>;
};
oscclk4: osc4@1c {
oscclk4: clock-controller@1c {
compatible = "arm,syscon-icst307";
reg = <0x1c 0x04>;
#clock-cells = <0>;
lock-offset = <0x20>;
vco-offset = <0x1c>;
clocks = <&xtal24mhz>;
};
oscclk5: osc5@d4 {
oscclk5: clock-controller@d4 {
compatible = "arm,syscon-icst307";
reg = <0xd4 0x04>;
#clock-cells = <0>;
lock-offset = <0x20>;
vco-offset = <0xd4>;
clocks = <&xtal24mhz>;
};
oscclk6: osc6@d8 {
oscclk6: clock-controller@d8 {
compatible = "arm,syscon-icst307";
reg = <0xd8 0x04>;
#clock-cells = <0>;
lock-offset = <0x20>;
vco-offset = <0xd8>;
......
arch/arm/boot/dts/arm-realview-pbx.dtsi
View file @ 2d3de197
......@@ -291,36 +291,41 @@ led@8,7 {
label = "versatile:7";
default-state = "off";
};
oscclk0: osc0@0c {
oscclk0: clock-controller@c {
compatible = "arm,syscon-icst307";
reg = <0x0c 0x04>;
#clock-cells = <0>;
lock-offset = <0x20>;
vco-offset = <0x0C>;
clocks = <&xtal24mhz>;
};
oscclk1: osc1@10 {
oscclk1: clock-controller@10 {
compatible = "arm,syscon-icst307";
reg = <0x10 0x04>;
#clock-cells = <0>;
lock-offset = <0x20>;
vco-offset = <0x10>;
clocks = <&xtal24mhz>;
};
oscclk2: osc2@14 {
oscclk2: clock-controller@14 {
compatible = "arm,syscon-icst307";
reg = <0x14 0x04>;
#clock-cells = <0>;
lock-offset = <0x20>;
vco-offset = <0x14>;
clocks = <&xtal24mhz>;
};
oscclk3: osc3@18 {
oscclk3: clock-controller@18 {
compatible = "arm,syscon-icst307";
reg = <0x18 0x04>;
#clock-cells = <0>;
lock-offset = <0x20>;
vco-offset = <0x18>;
clocks = <&xtal24mhz>;
};
oscclk4: osc4@1c {
oscclk4: clock-controller@1c {
compatible = "arm,syscon-icst307";
reg = <0x1c 0x04>;
#clock-cells = <0>;
lock-offset = <0x20>;
vco-offset = <0x1c>;
......
arch/arm/boot/dts/integratorap-im-pd1.dts
View file @ 2d3de197
......@@ -28,9 +28,13 @@ &lm0 {
syscon@0 {
compatible = "arm,im-pd1-syscon", "syscon";
reg = <0x00000000 0x1000>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
vco1: vco1-clock {
vco1: clock-controller@0 {
compatible = "arm,impd1-vco1";
reg = <0x00 0x04>;
#clock-cells = <0>;
lock-offset = <0x08>;
vco-offset = <0x00>;
......@@ -38,8 +42,9 @@ vco1: vco1-clock {
clock-output-names = "IM-PD1-VCO1";
};
vco2: vco2-clock {
vco2: clock-controller@4 {
compatible = "arm,impd1-vco2";
reg = <0x04 0x04>;
#clock-cells = <0>;
lock-offset = <0x08>;
vco-offset = <0x04>;
......
arch/arm/boot/dts/integratorap.dts
View file @ 2d3de197
......@@ -88,8 +88,9 @@ cm24mhz: cm24mhz@24M {
};
/* Oscillator on the core module, clocks the CPU core */
cmosc: cmosc@24M {
cmosc: clock-controller@8 {
compatible = "arm,syscon-icst525-integratorap-cm";
reg = <0x08 0x04>;
#clock-cells = <0>;
lock-offset = <0x14>;
vco-offset = <0x08>;
......@@ -97,8 +98,9 @@ cmosc: cmosc@24M {
};
/* Auxilary oscillator on the core module, 32.369MHz at boot */
auxosc: auxosc@24M {
auxosc: clock-controller@1c {
compatible = "arm,syscon-icst525";
reg = <0x1c 0x04>;
#clock-cells = <0>;
lock-offset = <0x14>;
vco-offset = <0x1c>;
......@@ -109,13 +111,17 @@ auxosc: auxosc@24M {
syscon {
compatible = "arm,integrator-ap-syscon", "syscon";
reg = <0x11000000 0x100>;
ranges = <0x0 0x11000000 0x100>;
#size-cells = <1>;
#address-cells = <1>;
/*
* SYSCLK clocks PCIv3 bridge, system controller and the
* logic modules.
*/
sysclk: apsys@24M {
sysclk: clock-controller@4 {
compatible = "arm,syscon-icst525-integratorap-sys";
reg = <0x04 0x04>;
#clock-cells = <0>;
lock-offset = <0x1c>;
vco-offset = <0x04>;
......@@ -123,8 +129,9 @@ sysclk: apsys@24M {
};
/* One-bit control for the PCI bus clock (33 or 25 MHz) */
pciclk: pciclk@24M {
pciclk: clock-controller@4,8 {
compatible = "arm,syscon-icst525-integratorap-pci";
reg = <0x04 0x04>;
#clock-cells = <0>;
lock-offset = <0x1c>;
vco-offset = <0x04>;
......
arch/arm/boot/dts/integratorcp.dts
View file @ 2d3de197
......@@ -92,8 +92,9 @@ cm24mhz: cm24mhz@24M {
};
/* Oscillator on the core module, clocks the CPU core */
cmcore: cmosc@24M {
cmcore: clock-controller@8 {
compatible = "arm,syscon-icst525-integratorcp-cm-core";
reg = <0x08 0x04>;
#clock-cells = <0>;
lock-offset = <0x14>;
vco-offset = <0x08>;
......@@ -101,8 +102,9 @@ cmcore: cmosc@24M {
};
/* Oscillator on the core module, clocks the memory bus */
cmmem: cmosc@24M {
cmmem: clock-controller@8,12 {
compatible = "arm,syscon-icst525-integratorcp-cm-mem";
reg = <0x08 0x04>;
#clock-cells = <0>;
lock-offset = <0x14>;
vco-offset = <0x08>;
......@@ -110,8 +112,9 @@ cmmem: cmosc@24M {
};
/* Auxilary oscillator on the core module, clocks the CLCD */
auxosc: auxosc@24M {
auxosc: clock-controller@1c {
compatible = "arm,syscon-icst525";
reg = <0x1c 0x04>;
#clock-cells = <0>;
lock-offset = <0x14>;
vco-offset = <0x1c>;
......
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