Commit 2e575cbc authored by Vladimir Zapolskiy's avatar Vladimir Zapolskiy Committed by Shawn Guo

ARM: dts: imx31: fix clock control module interrupts description

The type of AVIC interrupt controller found on i.MX31 is one-cell,
namely 31 for CCM DVFS and 53 for CCM, however for clock control
module its interrupts are specified as 3-cells, fix it.

Fixes: ef0e4a60 ("ARM: mx31: Replace clk_register_clkdev with clock DT lookup")
Acked-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarVladimir Zapolskiy <vz@mleia.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 1001354c
...@@ -77,7 +77,7 @@ Examples: ...@@ -77,7 +77,7 @@ Examples:
clks: ccm@53f80000{ clks: ccm@53f80000{
compatible = "fsl,imx31-ccm"; compatible = "fsl,imx31-ccm";
reg = <0x53f80000 0x4000>; reg = <0x53f80000 0x4000>;
interrupts = <0 31 0x04 0 53 0x04>; interrupts = <31>, <53>;
#clock-cells = <1>; #clock-cells = <1>;
}; };
......
...@@ -122,7 +122,7 @@ iim: iim@5001c000 { ...@@ -122,7 +122,7 @@ iim: iim@5001c000 {
clks: ccm@53f80000{ clks: ccm@53f80000{
compatible = "fsl,imx31-ccm"; compatible = "fsl,imx31-ccm";
reg = <0x53f80000 0x4000>; reg = <0x53f80000 0x4000>;
interrupts = <0 31 0x04 0 53 0x04>; interrupts = <31>, <53>;
#clock-cells = <1>; #clock-cells = <1>;
}; };
}; };
......
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