Commit 2e86e630 authored by Rajendra Nayak's avatar Rajendra Nayak Committed by Bjorn Andersson

arm64: defconfig: Enable X1E80100 SoC base configs

Enable GCC, Pinctrl and Interconnect configs for Qualcomm's X1E80100 SoC
which is required to boot X1E80100 QCP/CRD boards to a console shell. The
configs are required to be marked as builtin and not modules due to the
console driver dependencies.
Signed-off-by: default avatarRajendra Nayak <quic_rjendra@quicinc.com>
Co-developed-by: default avatarSibi Sankar <quic_sibis@quicinc.com>
Signed-off-by: default avatarSibi Sankar <quic_sibis@quicinc.com>
Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231205062403.14848-6-quic_sibis@quicinc.comSigned-off-by: default avatarBjorn Andersson <andersson@kernel.org>
parent 48a9ba5e
......@@ -619,6 +619,7 @@ CONFIG_PINCTRL_SC8280XP_LPASS_LPI=m
CONFIG_PINCTRL_SM8550=y
CONFIG_PINCTRL_SM8650=y
CONFIG_PINCTRL_SM8550_LPASS_LPI=m
CONFIG_PINCTRL_X1E80100=y
CONFIG_PINCTRL_LPASS_LPI=m
CONFIG_GPIO_AGGREGATOR=m
CONFIG_GPIO_ALTERA=m
......@@ -1224,6 +1225,7 @@ CONFIG_COMMON_CLK_MT8192_SCP_ADSP=y
CONFIG_COMMON_CLK_MT8192_VDECSYS=y
CONFIG_COMMON_CLK_MT8192_VENCSYS=y
CONFIG_COMMON_CLK_QCOM=y
CONFIG_CLK_X1E80100_GCC=y
CONFIG_QCOM_A53PLL=y
CONFIG_QCOM_CLK_APCS_MSM8916=y
CONFIG_QCOM_CLK_APCC_MSM8996=y
......@@ -1540,6 +1542,7 @@ CONFIG_INTERCONNECT_QCOM_SM8350=m
CONFIG_INTERCONNECT_QCOM_SM8450=y
CONFIG_INTERCONNECT_QCOM_SM8550=y
CONFIG_INTERCONNECT_QCOM_SM8650=y
CONFIG_INTERCONNECT_QCOM_X1E80100=y
CONFIG_COUNTER=m
CONFIG_RZ_MTU3_CNT=m
CONFIG_HTE=y
......
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