Commit 2ea3c6a2 authored by Takashi Iwai's avatar Takashi Iwai

ALSA: hda - Limit runtime PM support only to known Intel chips

We've got a report that the runtime PM may make the codec the
unresponsive on AMD platforms.  Since the feature has been tested only
on the recent Intel platforms, it's safer to limit the support to such
devices for now.

This patch adds a new DCAPS bit flag indicating the runtime PM
support, and mark it for Intel controllers.
Reported-and-tested-by: default avatarJulian Wollrath <jwollrath@web.de>
Signed-off-by: default avatarTakashi Iwai <tiwai@suse.de>
parent 989c3187
...@@ -556,6 +556,12 @@ enum { ...@@ -556,6 +556,12 @@ enum {
#define AZX_DCAPS_ALIGN_BUFSIZE (1 << 22) /* buffer size alignment */ #define AZX_DCAPS_ALIGN_BUFSIZE (1 << 22) /* buffer size alignment */
#define AZX_DCAPS_4K_BDLE_BOUNDARY (1 << 23) /* BDLE in 4k boundary */ #define AZX_DCAPS_4K_BDLE_BOUNDARY (1 << 23) /* BDLE in 4k boundary */
#define AZX_DCAPS_COUNT_LPIB_DELAY (1 << 25) /* Take LPIB as delay */ #define AZX_DCAPS_COUNT_LPIB_DELAY (1 << 25) /* Take LPIB as delay */
#define AZX_DCAPS_PM_RUNTIME (1 << 26) /* runtime PM support */
/* quirks for Intel PCH */
#define AZX_DCAPS_INTEL_PCH \
(AZX_DCAPS_SCH_SNOOP | AZX_DCAPS_BUFSIZE | \
AZX_DCAPS_COUNT_LPIB_DELAY | AZX_DCAPS_PM_RUNTIME)
/* quirks for ATI SB / AMD Hudson */ /* quirks for ATI SB / AMD Hudson */
#define AZX_DCAPS_PRESET_ATI_SB \ #define AZX_DCAPS_PRESET_ATI_SB \
...@@ -2433,6 +2439,9 @@ static void azx_power_notify(struct hda_bus *bus, bool power_up) ...@@ -2433,6 +2439,9 @@ static void azx_power_notify(struct hda_bus *bus, bool power_up)
{ {
struct azx *chip = bus->private_data; struct azx *chip = bus->private_data;
if (!(chip->driver_caps & AZX_DCAPS_PM_RUNTIME))
return;
if (power_up) if (power_up)
pm_runtime_get_sync(&chip->pci->dev); pm_runtime_get_sync(&chip->pci->dev);
else else
...@@ -2548,7 +2557,8 @@ static int azx_runtime_suspend(struct device *dev) ...@@ -2548,7 +2557,8 @@ static int azx_runtime_suspend(struct device *dev)
struct snd_card *card = dev_get_drvdata(dev); struct snd_card *card = dev_get_drvdata(dev);
struct azx *chip = card->private_data; struct azx *chip = card->private_data;
if (!power_save_controller) if (!power_save_controller ||
!(chip->driver_caps & AZX_DCAPS_PM_RUNTIME))
return -EAGAIN; return -EAGAIN;
azx_stop_chip(chip); azx_stop_chip(chip);
...@@ -3429,39 +3439,30 @@ static void __devexit azx_remove(struct pci_dev *pci) ...@@ -3429,39 +3439,30 @@ static void __devexit azx_remove(struct pci_dev *pci)
static DEFINE_PCI_DEVICE_TABLE(azx_ids) = { static DEFINE_PCI_DEVICE_TABLE(azx_ids) = {
/* CPT */ /* CPT */
{ PCI_DEVICE(0x8086, 0x1c20), { PCI_DEVICE(0x8086, 0x1c20),
.driver_data = AZX_DRIVER_PCH | AZX_DCAPS_SCH_SNOOP | .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
AZX_DCAPS_BUFSIZE | AZX_DCAPS_COUNT_LPIB_DELAY },
/* PBG */ /* PBG */
{ PCI_DEVICE(0x8086, 0x1d20), { PCI_DEVICE(0x8086, 0x1d20),
.driver_data = AZX_DRIVER_PCH | AZX_DCAPS_SCH_SNOOP | .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
AZX_DCAPS_BUFSIZE},
/* Panther Point */ /* Panther Point */
{ PCI_DEVICE(0x8086, 0x1e20), { PCI_DEVICE(0x8086, 0x1e20),
.driver_data = AZX_DRIVER_PCH | AZX_DCAPS_SCH_SNOOP | .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
AZX_DCAPS_BUFSIZE | AZX_DCAPS_COUNT_LPIB_DELAY },
/* Lynx Point */ /* Lynx Point */
{ PCI_DEVICE(0x8086, 0x8c20), { PCI_DEVICE(0x8086, 0x8c20),
.driver_data = AZX_DRIVER_PCH | AZX_DCAPS_SCH_SNOOP | .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
AZX_DCAPS_BUFSIZE | AZX_DCAPS_COUNT_LPIB_DELAY },
/* Lynx Point-LP */ /* Lynx Point-LP */
{ PCI_DEVICE(0x8086, 0x9c20), { PCI_DEVICE(0x8086, 0x9c20),
.driver_data = AZX_DRIVER_PCH | AZX_DCAPS_SCH_SNOOP | .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
AZX_DCAPS_BUFSIZE | AZX_DCAPS_COUNT_LPIB_DELAY },
/* Lynx Point-LP */ /* Lynx Point-LP */
{ PCI_DEVICE(0x8086, 0x9c21), { PCI_DEVICE(0x8086, 0x9c21),
.driver_data = AZX_DRIVER_PCH | AZX_DCAPS_SCH_SNOOP | .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
AZX_DCAPS_BUFSIZE | AZX_DCAPS_COUNT_LPIB_DELAY },
/* Haswell */ /* Haswell */
{ PCI_DEVICE(0x8086, 0x0c0c), { PCI_DEVICE(0x8086, 0x0c0c),
.driver_data = AZX_DRIVER_SCH | AZX_DCAPS_SCH_SNOOP | .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH },
AZX_DCAPS_BUFSIZE | AZX_DCAPS_COUNT_LPIB_DELAY },
{ PCI_DEVICE(0x8086, 0x0d0c), { PCI_DEVICE(0x8086, 0x0d0c),
.driver_data = AZX_DRIVER_SCH | AZX_DCAPS_SCH_SNOOP | .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH },
AZX_DCAPS_BUFSIZE | AZX_DCAPS_COUNT_LPIB_DELAY },
/* 5 Series/3400 */ /* 5 Series/3400 */
{ PCI_DEVICE(0x8086, 0x3b56), { PCI_DEVICE(0x8086, 0x3b56),
.driver_data = AZX_DRIVER_SCH | AZX_DCAPS_SCH_SNOOP | .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH },
AZX_DCAPS_BUFSIZE | AZX_DCAPS_COUNT_LPIB_DELAY },
/* SCH */ /* SCH */
{ PCI_DEVICE(0x8086, 0x811b), { PCI_DEVICE(0x8086, 0x811b),
.driver_data = AZX_DRIVER_SCH | AZX_DCAPS_SCH_SNOOP | .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_SCH_SNOOP |
......
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