Commit 2f324ac7 authored by Gareth Williams's avatar Gareth Williams Committed by Mark Brown

dt-bindings: snps,dw-apb-ssi: Add optional clock bindings documentation

Add documentation to the Synopsys SPI dt-bindings to support an
optional interface clock that may be used for register access.
Signed-off-by: default avatarPhil Edworthy <phil.edworthy@renesas.com>
Signed-off-by: default avatarGareth Williams <gareth.williams.jx@renesas.com>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 57a9f6e7
...@@ -8,9 +8,15 @@ Required properties: ...@@ -8,9 +8,15 @@ Required properties:
- interrupts : One interrupt, used by the controller. - interrupts : One interrupt, used by the controller.
- #address-cells : <1>, as required by generic SPI binding. - #address-cells : <1>, as required by generic SPI binding.
- #size-cells : <0>, also as required by generic SPI binding. - #size-cells : <0>, also as required by generic SPI binding.
- clocks : phandle for the core clock used to generate the external SPI clock. - clocks : phandles for the clocks, see the description of clock-names below.
The phandle for the "ssi_clk" is required. The phandle for the "pclk" clock
is optional. If a single clock is specified but no clock-name, it is the
"ssi_clk" clock. If both clocks are listed, the "ssi_clk" must be first.
Optional properties: Optional properties:
- clock-names : Contains the names of the clocks:
"ssi_clk", for the core clock used to generate the external SPI clock.
"pclk", the interface clock, required for register access.
- cs-gpios : Specifies the gpio pins to be used for chipselects. - cs-gpios : Specifies the gpio pins to be used for chipselects.
- num-cs : The number of chipselects. If omitted, this will default to 4. - num-cs : The number of chipselects. If omitted, this will default to 4.
- reg-io-width : The I/O register width (in bytes) implemented by this - reg-io-width : The I/O register width (in bytes) implemented by this
......
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