Commit 2fd8e454 authored by Masahiro Yamada's avatar Masahiro Yamada Committed by Greg Kroah-Hartman

serial: 8250_uniphier: remove unused "fifo-size" property

The FIFO size of the UART devices is 64 on almost all UniPhier SoCs
with the exception Pro4TV SoC (MN2WS0235), which used 128 FIFO size.
However, Pro4TV SoC was never upstreamed, and out of production.

So, this property has never been used in a useful way.
Let's remove old unused code.
Signed-off-by: default avatarMasahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 9e3eb4ea
...@@ -6,9 +6,6 @@ Required properties: ...@@ -6,9 +6,6 @@ Required properties:
- interrupts: a single interrupt specifier. - interrupts: a single interrupt specifier.
- clocks: phandle to the input clock. - clocks: phandle to the input clock.
Optional properties:
- fifo-size: the RX/TX FIFO size. Defaults to 64 if not specified.
Example: Example:
aliases { aliases {
serial0 = &serial0; serial0 = &serial0;
...@@ -19,5 +16,4 @@ Example: ...@@ -19,5 +16,4 @@ Example:
reg = <0x54006800 0x40>; reg = <0x54006800 0x40>;
interrupts = <0 33 4>; interrupts = <0 33 4>;
clocks = <&uart_clk>; clocks = <&uart_clk>;
fifo-size = <64>;
}; };
...@@ -12,9 +12,6 @@ ...@@ -12,9 +12,6 @@
#include "8250.h" #include "8250.h"
/* Most (but not all) of UniPhier UART devices have 64-depth FIFO. */
#define UNIPHIER_UART_DEFAULT_FIFO_SIZE 64
/* /*
* This hardware is similar to 8250, but its register map is a bit different: * This hardware is similar to 8250, but its register map is a bit different:
* - MMIO32 (regshift = 2) * - MMIO32 (regshift = 2)
...@@ -185,12 +182,6 @@ static int uniphier_of_serial_setup(struct device *dev, struct uart_port *port, ...@@ -185,12 +182,6 @@ static int uniphier_of_serial_setup(struct device *dev, struct uart_port *port,
port->uartclk = clk_get_rate(priv->clk); port->uartclk = clk_get_rate(priv->clk);
/* Check for fifo size */
if (of_property_read_u32(np, "fifo-size", &prop) == 0)
port->fifosize = prop;
else
port->fifosize = UNIPHIER_UART_DEFAULT_FIFO_SIZE;
return 0; return 0;
} }
...@@ -241,6 +232,7 @@ static int uniphier_uart_probe(struct platform_device *pdev) ...@@ -241,6 +232,7 @@ static int uniphier_uart_probe(struct platform_device *pdev)
up.port.type = PORT_16550A; up.port.type = PORT_16550A;
up.port.iotype = UPIO_MEM32; up.port.iotype = UPIO_MEM32;
up.port.fifosize = 64;
up.port.regshift = UNIPHIER_UART_REGSHIFT; up.port.regshift = UNIPHIER_UART_REGSHIFT;
up.port.flags = UPF_FIXED_PORT | UPF_FIXED_TYPE; up.port.flags = UPF_FIXED_PORT | UPF_FIXED_TYPE;
up.capabilities = UART_CAP_FIFO; up.capabilities = UART_CAP_FIFO;
......
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