Commit 30b50573 authored by Kalle Valo's avatar Kalle Valo

Merge tag 'mt76-for-kvalo-2022-07-11' of https://github.com/nbd168/wireless

mt76 patches for 5.20

- preparation for new chipset support
- fixes
- VHT/HE related improvements
- ACPI SAR support

[kvalo@kernel.org: fix mac80211 API changes in start_ap() and stop_ap()]
parents bd363ee5 454b768f
...@@ -54,6 +54,16 @@ properties: ...@@ -54,6 +54,16 @@ properties:
reset-names: reset-names:
const: consys const: consys
clocks:
maxItems: 2
description:
Specify the consys clocks for mt7986.
clock-names:
items:
- const: mcu
- const: ap2conn
mediatek,infracfg: mediatek,infracfg:
$ref: /schemas/types.yaml#/definitions/phandle $ref: /schemas/types.yaml#/definitions/phandle
description: description:
...@@ -269,5 +279,8 @@ examples: ...@@ -269,5 +279,8 @@ examples:
<0x10003000 0x1000>, <0x10003000 0x1000>,
<0x11d10000 0x1000>; <0x11d10000 0x1000>;
interrupts = <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&topckgen 50>,
<&topckgen 62>;
clock-names = "mcu", "ap2conn";
memory-region = <&wmcpu_emi>; memory-region = <&wmcpu_emi>;
}; };
...@@ -349,8 +349,8 @@ mt76_dma_tx_queue_skb_raw(struct mt76_dev *dev, struct mt76_queue *q, ...@@ -349,8 +349,8 @@ mt76_dma_tx_queue_skb_raw(struct mt76_dev *dev, struct mt76_queue *q,
static int static int
mt76_dma_tx_queue_skb(struct mt76_dev *dev, struct mt76_queue *q, mt76_dma_tx_queue_skb(struct mt76_dev *dev, struct mt76_queue *q,
struct sk_buff *skb, struct mt76_wcid *wcid, enum mt76_txq_id qid, struct sk_buff *skb,
struct ieee80211_sta *sta) struct mt76_wcid *wcid, struct ieee80211_sta *sta)
{ {
struct ieee80211_tx_status status = { struct ieee80211_tx_status status = {
.sta = sta, .sta = sta,
...@@ -406,7 +406,7 @@ mt76_dma_tx_queue_skb(struct mt76_dev *dev, struct mt76_queue *q, ...@@ -406,7 +406,7 @@ mt76_dma_tx_queue_skb(struct mt76_dev *dev, struct mt76_queue *q,
dma_sync_single_for_cpu(dev->dma_dev, t->dma_addr, dev->drv->txwi_size, dma_sync_single_for_cpu(dev->dma_dev, t->dma_addr, dev->drv->txwi_size,
DMA_TO_DEVICE); DMA_TO_DEVICE);
ret = dev->drv->tx_prepare_skb(dev, txwi, q->qid, wcid, sta, &tx_info); ret = dev->drv->tx_prepare_skb(dev, txwi, qid, wcid, sta, &tx_info);
dma_sync_single_for_device(dev->dma_dev, t->dma_addr, dev->drv->txwi_size, dma_sync_single_for_device(dev->dma_dev, t->dma_addr, dev->drv->txwi_size,
DMA_TO_DEVICE); DMA_TO_DEVICE);
if (ret < 0) if (ret < 0)
...@@ -791,10 +791,15 @@ void mt76_dma_cleanup(struct mt76_dev *dev) ...@@ -791,10 +791,15 @@ void mt76_dma_cleanup(struct mt76_dev *dev)
mt76_worker_disable(&dev->tx_worker); mt76_worker_disable(&dev->tx_worker);
netif_napi_del(&dev->tx_napi); netif_napi_del(&dev->tx_napi);
for (i = 0; i < ARRAY_SIZE(dev->phy.q_tx); i++) { for (i = 0; i < ARRAY_SIZE(dev->phys); i++) {
mt76_dma_tx_cleanup(dev, dev->phy.q_tx[i], true); struct mt76_phy *phy = dev->phys[i];
if (dev->phy2) int j;
mt76_dma_tx_cleanup(dev, dev->phy2->q_tx[i], true);
if (!phy)
continue;
for (j = 0; j < ARRAY_SIZE(phy->q_tx); j++)
mt76_dma_tx_cleanup(dev, phy->q_tx[j], true);
} }
for (i = 0; i < ARRAY_SIZE(dev->q_mcu); i++) for (i = 0; i < ARRAY_SIZE(dev->q_mcu); i++)
......
...@@ -162,10 +162,13 @@ mt76_find_power_limits_node(struct mt76_dev *dev) ...@@ -162,10 +162,13 @@ mt76_find_power_limits_node(struct mt76_dev *dev)
} }
if (mt76_string_prop_find(country, dev->alpha2) || if (mt76_string_prop_find(country, dev->alpha2) ||
mt76_string_prop_find(regd, region_name)) mt76_string_prop_find(regd, region_name)) {
of_node_put(np);
return cur; return cur;
}
} }
of_node_put(np);
return fallback; return fallback;
} }
......
...@@ -178,6 +178,12 @@ static const struct cfg80211_sar_freq_ranges mt76_sar_freq_ranges[] = { ...@@ -178,6 +178,12 @@ static const struct cfg80211_sar_freq_ranges mt76_sar_freq_ranges[] = {
{ .start_freq = 5350, .end_freq = 5470, }, { .start_freq = 5350, .end_freq = 5470, },
{ .start_freq = 5470, .end_freq = 5725, }, { .start_freq = 5470, .end_freq = 5725, },
{ .start_freq = 5725, .end_freq = 5950, }, { .start_freq = 5725, .end_freq = 5950, },
{ .start_freq = 5945, .end_freq = 6165, },
{ .start_freq = 6165, .end_freq = 6405, },
{ .start_freq = 6405, .end_freq = 6525, },
{ .start_freq = 6525, .end_freq = 6705, },
{ .start_freq = 6705, .end_freq = 6865, },
{ .start_freq = 6865, .end_freq = 7125, },
}; };
static const struct cfg80211_sar_capa mt76_sar_capa = { static const struct cfg80211_sar_capa mt76_sar_capa = {
...@@ -210,6 +216,7 @@ static int mt76_led_init(struct mt76_dev *dev) ...@@ -210,6 +216,7 @@ static int mt76_led_init(struct mt76_dev *dev)
if (!of_property_read_u32(np, "led-sources", &led_pin)) if (!of_property_read_u32(np, "led-sources", &led_pin))
dev->led_pin = led_pin; dev->led_pin = led_pin;
dev->led_al = of_property_read_bool(np, "led-active-low"); dev->led_al = of_property_read_bool(np, "led-active-low");
of_node_put(np);
} }
return led_classdev_register(dev->dev, &dev->led_cdev); return led_classdev_register(dev->dev, &dev->led_cdev);
...@@ -260,6 +267,8 @@ static void mt76_init_stream_cap(struct mt76_phy *phy, ...@@ -260,6 +267,8 @@ static void mt76_init_stream_cap(struct mt76_phy *phy,
} }
vht_cap->vht_mcs.rx_mcs_map = cpu_to_le16(mcs_map); vht_cap->vht_mcs.rx_mcs_map = cpu_to_le16(mcs_map);
vht_cap->vht_mcs.tx_mcs_map = cpu_to_le16(mcs_map); vht_cap->vht_mcs.tx_mcs_map = cpu_to_le16(mcs_map);
vht_cap->vht_mcs.tx_highest |=
cpu_to_le16(IEEE80211_VHT_EXT_NSS_BW_CAPABLE);
} }
void mt76_set_stream_caps(struct mt76_phy *phy, bool vht) void mt76_set_stream_caps(struct mt76_phy *phy, bool vht)
...@@ -444,7 +453,7 @@ mt76_phy_init(struct mt76_phy *phy, struct ieee80211_hw *hw) ...@@ -444,7 +453,7 @@ mt76_phy_init(struct mt76_phy *phy, struct ieee80211_hw *hw)
struct mt76_phy * struct mt76_phy *
mt76_alloc_phy(struct mt76_dev *dev, unsigned int size, mt76_alloc_phy(struct mt76_dev *dev, unsigned int size,
const struct ieee80211_ops *ops) const struct ieee80211_ops *ops, u8 band_idx)
{ {
struct ieee80211_hw *hw; struct ieee80211_hw *hw;
unsigned int phy_size; unsigned int phy_size;
...@@ -459,6 +468,7 @@ mt76_alloc_phy(struct mt76_dev *dev, unsigned int size, ...@@ -459,6 +468,7 @@ mt76_alloc_phy(struct mt76_dev *dev, unsigned int size,
phy->dev = dev; phy->dev = dev;
phy->hw = hw; phy->hw = hw;
phy->priv = hw->priv + phy_size; phy->priv = hw->priv + phy_size;
phy->band_idx = band_idx;
hw->wiphy->flags |= WIPHY_FLAG_IBSS_RSN; hw->wiphy->flags |= WIPHY_FLAG_IBSS_RSN;
hw->wiphy->interface_modes = hw->wiphy->interface_modes =
...@@ -511,7 +521,7 @@ int mt76_register_phy(struct mt76_phy *phy, bool vht, ...@@ -511,7 +521,7 @@ int mt76_register_phy(struct mt76_phy *phy, bool vht,
if (ret) if (ret)
return ret; return ret;
phy->dev->phy2 = phy; phy->dev->phys[phy->band_idx] = phy;
return 0; return 0;
} }
...@@ -523,7 +533,7 @@ void mt76_unregister_phy(struct mt76_phy *phy) ...@@ -523,7 +533,7 @@ void mt76_unregister_phy(struct mt76_phy *phy)
mt76_tx_status_check(dev, true); mt76_tx_status_check(dev, true);
ieee80211_unregister_hw(phy->hw); ieee80211_unregister_hw(phy->hw);
dev->phy2 = NULL; dev->phys[phy->band_idx] = NULL;
} }
EXPORT_SYMBOL_GPL(mt76_unregister_phy); EXPORT_SYMBOL_GPL(mt76_unregister_phy);
...@@ -550,6 +560,8 @@ mt76_alloc_device(struct device *pdev, unsigned int size, ...@@ -550,6 +560,8 @@ mt76_alloc_device(struct device *pdev, unsigned int size,
phy = &dev->phy; phy = &dev->phy;
phy->dev = dev; phy->dev = dev;
phy->hw = hw; phy->hw = hw;
phy->band_idx = MT_BAND0;
dev->phys[phy->band_idx] = phy;
spin_lock_init(&dev->rx_lock); spin_lock_init(&dev->rx_lock);
spin_lock_init(&dev->lock); spin_lock_init(&dev->lock);
...@@ -731,7 +743,7 @@ static void mt76_rx_release_burst(struct mt76_phy *phy, enum mt76_rxq_id q, ...@@ -731,7 +743,7 @@ static void mt76_rx_release_burst(struct mt76_phy *phy, enum mt76_rxq_id q,
void mt76_rx(struct mt76_dev *dev, enum mt76_rxq_id q, struct sk_buff *skb) void mt76_rx(struct mt76_dev *dev, enum mt76_rxq_id q, struct sk_buff *skb)
{ {
struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb; struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb;
struct mt76_phy *phy = mt76_dev_phy(dev, status->ext_phy); struct mt76_phy *phy = mt76_dev_phy(dev, status->phy_idx);
if (!test_bit(MT76_STATE_RUNNING, &phy->state)) { if (!test_bit(MT76_STATE_RUNNING, &phy->state)) {
dev_kfree_skb(skb); dev_kfree_skb(skb);
...@@ -1007,10 +1019,10 @@ mt76_rx_convert(struct mt76_dev *dev, struct sk_buff *skb, ...@@ -1007,10 +1019,10 @@ mt76_rx_convert(struct mt76_dev *dev, struct sk_buff *skb,
sizeof(mstat.chain_signal)); sizeof(mstat.chain_signal));
*sta = wcid_to_sta(mstat.wcid); *sta = wcid_to_sta(mstat.wcid);
*hw = mt76_phy_hw(dev, mstat.ext_phy); *hw = mt76_phy_hw(dev, mstat.phy_idx);
} }
static int static void
mt76_check_ccmp_pn(struct sk_buff *skb) mt76_check_ccmp_pn(struct sk_buff *skb)
{ {
struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb; struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb;
...@@ -1020,10 +1032,13 @@ mt76_check_ccmp_pn(struct sk_buff *skb) ...@@ -1020,10 +1032,13 @@ mt76_check_ccmp_pn(struct sk_buff *skb)
int ret; int ret;
if (!(status->flag & RX_FLAG_DECRYPTED)) if (!(status->flag & RX_FLAG_DECRYPTED))
return 0; return;
if (status->flag & RX_FLAG_ONLY_MONITOR)
return;
if (!wcid || !wcid->rx_check_pn) if (!wcid || !wcid->rx_check_pn)
return 0; return;
security_idx = status->qos_ctl & IEEE80211_QOS_CTL_TID_MASK; security_idx = status->qos_ctl & IEEE80211_QOS_CTL_TID_MASK;
if (status->flag & RX_FLAG_8023) if (status->flag & RX_FLAG_8023)
...@@ -1037,7 +1052,7 @@ mt76_check_ccmp_pn(struct sk_buff *skb) ...@@ -1037,7 +1052,7 @@ mt76_check_ccmp_pn(struct sk_buff *skb)
*/ */
if (ieee80211_is_frag(hdr) && if (ieee80211_is_frag(hdr) &&
!ieee80211_is_first_frag(hdr->frame_control)) !ieee80211_is_first_frag(hdr->frame_control))
return 0; return;
} }
/* IEEE 802.11-2020, 12.5.3.4.4 "PN and replay detection" c): /* IEEE 802.11-2020, 12.5.3.4.4 "PN and replay detection" c):
...@@ -1054,15 +1069,15 @@ mt76_check_ccmp_pn(struct sk_buff *skb) ...@@ -1054,15 +1069,15 @@ mt76_check_ccmp_pn(struct sk_buff *skb)
BUILD_BUG_ON(sizeof(status->iv) != sizeof(wcid->rx_key_pn[0])); BUILD_BUG_ON(sizeof(status->iv) != sizeof(wcid->rx_key_pn[0]));
ret = memcmp(status->iv, wcid->rx_key_pn[security_idx], ret = memcmp(status->iv, wcid->rx_key_pn[security_idx],
sizeof(status->iv)); sizeof(status->iv));
if (ret <= 0) if (ret <= 0) {
return -EINVAL; /* replay */ status->flag |= RX_FLAG_ONLY_MONITOR;
return;
}
memcpy(wcid->rx_key_pn[security_idx], status->iv, sizeof(status->iv)); memcpy(wcid->rx_key_pn[security_idx], status->iv, sizeof(status->iv));
if (status->flag & RX_FLAG_IV_STRIPPED) if (status->flag & RX_FLAG_IV_STRIPPED)
status->flag |= RX_FLAG_PN_VALIDATED; status->flag |= RX_FLAG_PN_VALIDATED;
return 0;
} }
static void static void
...@@ -1167,7 +1182,7 @@ mt76_check_sta(struct mt76_dev *dev, struct sk_buff *skb) ...@@ -1167,7 +1182,7 @@ mt76_check_sta(struct mt76_dev *dev, struct sk_buff *skb)
u8 tidno = status->qos_ctl & IEEE80211_QOS_CTL_TID_MASK; u8 tidno = status->qos_ctl & IEEE80211_QOS_CTL_TID_MASK;
bool ps; bool ps;
hw = mt76_phy_hw(dev, status->ext_phy); hw = mt76_phy_hw(dev, status->phy_idx);
if (ieee80211_is_pspoll(hdr->frame_control) && !wcid && if (ieee80211_is_pspoll(hdr->frame_control) && !wcid &&
!(status->flag & RX_FLAG_8023)) { !(status->flag & RX_FLAG_8023)) {
sta = ieee80211_find_sta_by_ifaddr(hw, hdr->addr2, NULL); sta = ieee80211_find_sta_by_ifaddr(hw, hdr->addr2, NULL);
...@@ -1235,11 +1250,7 @@ void mt76_rx_complete(struct mt76_dev *dev, struct sk_buff_head *frames, ...@@ -1235,11 +1250,7 @@ void mt76_rx_complete(struct mt76_dev *dev, struct sk_buff_head *frames,
while ((skb = __skb_dequeue(frames)) != NULL) { while ((skb = __skb_dequeue(frames)) != NULL) {
struct sk_buff *nskb = skb_shinfo(skb)->frag_list; struct sk_buff *nskb = skb_shinfo(skb)->frag_list;
if (mt76_check_ccmp_pn(skb)) { mt76_check_ccmp_pn(skb);
dev_kfree_skb(skb);
continue;
}
skb_shinfo(skb)->frag_list = NULL; skb_shinfo(skb)->frag_list = NULL;
mt76_rx_convert(dev, skb, &hw, &sta); mt76_rx_convert(dev, skb, &hw, &sta);
ieee80211_rx_list(hw, sta, skb, &list); ieee80211_rx_list(hw, sta, skb, &list);
...@@ -1285,10 +1296,11 @@ void mt76_rx_poll_complete(struct mt76_dev *dev, enum mt76_rxq_id q, ...@@ -1285,10 +1296,11 @@ void mt76_rx_poll_complete(struct mt76_dev *dev, enum mt76_rxq_id q,
EXPORT_SYMBOL_GPL(mt76_rx_poll_complete); EXPORT_SYMBOL_GPL(mt76_rx_poll_complete);
static int static int
mt76_sta_add(struct mt76_dev *dev, struct ieee80211_vif *vif, mt76_sta_add(struct mt76_phy *phy, struct ieee80211_vif *vif,
struct ieee80211_sta *sta, bool ext_phy) struct ieee80211_sta *sta)
{ {
struct mt76_wcid *wcid = (struct mt76_wcid *)sta->drv_priv; struct mt76_wcid *wcid = (struct mt76_wcid *)sta->drv_priv;
struct mt76_dev *dev = phy->dev;
int ret; int ret;
int i; int i;
...@@ -1309,9 +1321,9 @@ mt76_sta_add(struct mt76_dev *dev, struct ieee80211_vif *vif, ...@@ -1309,9 +1321,9 @@ mt76_sta_add(struct mt76_dev *dev, struct ieee80211_vif *vif,
} }
ewma_signal_init(&wcid->rssi); ewma_signal_init(&wcid->rssi);
if (ext_phy) if (phy->band_idx == MT_BAND1)
mt76_wcid_mask_set(dev->wcid_phy_mask, wcid->idx); mt76_wcid_mask_set(dev->wcid_phy_mask, wcid->idx);
wcid->ext_phy = ext_phy; wcid->phy_idx = phy->band_idx;
rcu_assign_pointer(dev->wcid[wcid->idx], wcid); rcu_assign_pointer(dev->wcid[wcid->idx], wcid);
mt76_packet_id_init(wcid); mt76_packet_id_init(wcid);
...@@ -1356,11 +1368,10 @@ int mt76_sta_state(struct ieee80211_hw *hw, struct ieee80211_vif *vif, ...@@ -1356,11 +1368,10 @@ int mt76_sta_state(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
{ {
struct mt76_phy *phy = hw->priv; struct mt76_phy *phy = hw->priv;
struct mt76_dev *dev = phy->dev; struct mt76_dev *dev = phy->dev;
bool ext_phy = phy != &dev->phy;
if (old_state == IEEE80211_STA_NOTEXIST && if (old_state == IEEE80211_STA_NOTEXIST &&
new_state == IEEE80211_STA_NONE) new_state == IEEE80211_STA_NONE)
return mt76_sta_add(dev, vif, sta, ext_phy); return mt76_sta_add(phy, vif, sta);
if (old_state == IEEE80211_STA_AUTH && if (old_state == IEEE80211_STA_AUTH &&
new_state == IEEE80211_STA_ASSOC && new_state == IEEE80211_STA_ASSOC &&
......
...@@ -7,17 +7,19 @@ ...@@ -7,17 +7,19 @@
struct sk_buff * struct sk_buff *
__mt76_mcu_msg_alloc(struct mt76_dev *dev, const void *data, __mt76_mcu_msg_alloc(struct mt76_dev *dev, const void *data,
int data_len, gfp_t gfp) int len, int data_len, gfp_t gfp)
{ {
const struct mt76_mcu_ops *ops = dev->mcu_ops; const struct mt76_mcu_ops *ops = dev->mcu_ops;
int length = ops->headroom + data_len + ops->tailroom;
struct sk_buff *skb; struct sk_buff *skb;
skb = alloc_skb(length, gfp); len = max_t(int, len, data_len);
len = ops->headroom + len + ops->tailroom;
skb = alloc_skb(len, gfp);
if (!skb) if (!skb)
return NULL; return NULL;
memset(skb->head, 0, length); memset(skb->head, 0, len);
skb_reserve(skb, ops->headroom); skb_reserve(skb, ops->headroom);
if (data && data_len) if (data && data_len)
......
...@@ -99,12 +99,21 @@ enum mt76_rxq_id { ...@@ -99,12 +99,21 @@ enum mt76_rxq_id {
MT_RXQ_MAIN, MT_RXQ_MAIN,
MT_RXQ_MCU, MT_RXQ_MCU,
MT_RXQ_MCU_WA, MT_RXQ_MCU_WA,
MT_RXQ_EXT, MT_RXQ_BAND1,
MT_RXQ_EXT_WA, MT_RXQ_BAND1_WA,
MT_RXQ_MAIN_WA, MT_RXQ_MAIN_WA,
MT_RXQ_BAND2,
MT_RXQ_BAND2_WA,
__MT_RXQ_MAX __MT_RXQ_MAX
}; };
enum mt76_band_id {
MT_BAND0,
MT_BAND1,
MT_BAND2,
__MT_MAX_BAND
};
enum mt76_cipher_type { enum mt76_cipher_type {
MT_CIPHER_NONE, MT_CIPHER_NONE,
MT_CIPHER_WEP40, MT_CIPHER_WEP40,
...@@ -185,7 +194,6 @@ struct mt76_queue { ...@@ -185,7 +194,6 @@ struct mt76_queue {
u8 buf_offset; u8 buf_offset;
u8 hw_idx; u8 hw_idx;
u8 qid;
u8 flags; u8 flags;
u32 wed_regs; u32 wed_regs;
...@@ -223,8 +231,8 @@ struct mt76_queue_ops { ...@@ -223,8 +231,8 @@ struct mt76_queue_ops {
u32 ring_base); u32 ring_base);
int (*tx_queue_skb)(struct mt76_dev *dev, struct mt76_queue *q, int (*tx_queue_skb)(struct mt76_dev *dev, struct mt76_queue *q,
struct sk_buff *skb, struct mt76_wcid *wcid, enum mt76_txq_id qid, struct sk_buff *skb,
struct ieee80211_sta *sta); struct mt76_wcid *wcid, struct ieee80211_sta *sta);
int (*tx_queue_skb_raw)(struct mt76_dev *dev, struct mt76_queue *q, int (*tx_queue_skb_raw)(struct mt76_dev *dev, struct mt76_queue *q,
struct sk_buff *skb, u32 tx_info); struct sk_buff *skb, u32 tx_info);
...@@ -254,7 +262,7 @@ enum mt76_wcid_flags { ...@@ -254,7 +262,7 @@ enum mt76_wcid_flags {
#define MT76_N_WCIDS 544 #define MT76_N_WCIDS 544
/* stored in ieee80211_tx_info::hw_queue */ /* stored in ieee80211_tx_info::hw_queue */
#define MT_TX_HW_QUEUE_EXT_PHY BIT(3) #define MT_TX_HW_QUEUE_PHY GENMASK(3, 2)
DECLARE_EWMA(signal, 10, 8); DECLARE_EWMA(signal, 10, 8);
...@@ -279,8 +287,8 @@ struct mt76_wcid { ...@@ -279,8 +287,8 @@ struct mt76_wcid {
u8 hw_key_idx2; u8 hw_key_idx2;
u8 sta:1; u8 sta:1;
u8 ext_phy:1;
u8 amsdu:1; u8 amsdu:1;
u8 phy_idx:2;
u8 rx_check_pn; u8 rx_check_pn;
u8 rx_key_pn[IEEE80211_NUM_TIDS + 1][6]; u8 rx_key_pn[IEEE80211_NUM_TIDS + 1][6];
...@@ -573,7 +581,7 @@ struct mt76_rx_status { ...@@ -573,7 +581,7 @@ struct mt76_rx_status {
u8 iv[6]; u8 iv[6];
u8 ext_phy:1; u8 phy_idx:2;
u8 aggr:1; u8 aggr:1;
u8 qos_ctl; u8 qos_ctl;
u16 seqno; u16 seqno;
...@@ -660,6 +668,7 @@ struct mt76_phy { ...@@ -660,6 +668,7 @@ struct mt76_phy {
void *priv; void *priv;
unsigned long state; unsigned long state;
u8 band_idx;
struct mt76_queue *q_tx[__MT_TXQ_MAX]; struct mt76_queue *q_tx[__MT_TXQ_MAX];
...@@ -699,8 +708,7 @@ struct mt76_phy { ...@@ -699,8 +708,7 @@ struct mt76_phy {
struct mt76_dev { struct mt76_dev {
struct mt76_phy phy; /* must be first */ struct mt76_phy phy; /* must be first */
struct mt76_phy *phys[__MT_MAX_BAND];
struct mt76_phy *phy2;
struct ieee80211_hw *hw; struct ieee80211_hw *hw;
...@@ -885,16 +893,6 @@ extern struct ieee80211_rate mt76_rates[12]; ...@@ -885,16 +893,6 @@ extern struct ieee80211_rate mt76_rates[12];
#define mt76_hw(dev) (dev)->mphy.hw #define mt76_hw(dev) (dev)->mphy.hw
static inline struct ieee80211_hw *
mt76_wcid_hw(struct mt76_dev *dev, u16 wcid)
{
if (wcid <= MT76_N_WCIDS &&
mt76_wcid_mask_test(dev->wcid_phy_mask, wcid))
return dev->phy2->hw;
return dev->phy.hw;
}
bool __mt76_poll(struct mt76_dev *dev, u32 offset, u32 mask, u32 val, bool __mt76_poll(struct mt76_dev *dev, u32 offset, u32 mask, u32 val,
int timeout); int timeout);
...@@ -945,7 +943,8 @@ void mt76_free_device(struct mt76_dev *dev); ...@@ -945,7 +943,8 @@ void mt76_free_device(struct mt76_dev *dev);
void mt76_unregister_phy(struct mt76_phy *phy); void mt76_unregister_phy(struct mt76_phy *phy);
struct mt76_phy *mt76_alloc_phy(struct mt76_dev *dev, unsigned int size, struct mt76_phy *mt76_alloc_phy(struct mt76_dev *dev, unsigned int size,
const struct ieee80211_ops *ops); const struct ieee80211_ops *ops,
u8 band_idx);
int mt76_register_phy(struct mt76_phy *phy, bool vht, int mt76_register_phy(struct mt76_phy *phy, bool vht,
struct ieee80211_rate *rates, int n_rates); struct ieee80211_rate *rates, int n_rates);
...@@ -977,7 +976,6 @@ static inline int mt76_init_tx_queue(struct mt76_phy *phy, int qid, int idx, ...@@ -977,7 +976,6 @@ static inline int mt76_init_tx_queue(struct mt76_phy *phy, int qid, int idx,
if (IS_ERR(q)) if (IS_ERR(q))
return PTR_ERR(q); return PTR_ERR(q);
q->qid = qid;
phy->q_tx[qid] = q; phy->q_tx[qid] = q;
return 0; return 0;
...@@ -992,24 +990,25 @@ static inline int mt76_init_mcu_queue(struct mt76_dev *dev, int qid, int idx, ...@@ -992,24 +990,25 @@ static inline int mt76_init_mcu_queue(struct mt76_dev *dev, int qid, int idx,
if (IS_ERR(q)) if (IS_ERR(q))
return PTR_ERR(q); return PTR_ERR(q);
q->qid = __MT_TXQ_MAX + qid;
dev->q_mcu[qid] = q; dev->q_mcu[qid] = q;
return 0; return 0;
} }
static inline struct mt76_phy * static inline struct mt76_phy *
mt76_dev_phy(struct mt76_dev *dev, bool phy_ext) mt76_dev_phy(struct mt76_dev *dev, u8 phy_idx)
{ {
if (phy_ext && dev->phy2) if ((phy_idx == MT_BAND1 && dev->phys[phy_idx]) ||
return dev->phy2; (phy_idx == MT_BAND2 && dev->phys[phy_idx]))
return dev->phys[phy_idx];
return &dev->phy; return &dev->phy;
} }
static inline struct ieee80211_hw * static inline struct ieee80211_hw *
mt76_phy_hw(struct mt76_dev *dev, bool phy_ext) mt76_phy_hw(struct mt76_dev *dev, u8 phy_idx)
{ {
return mt76_dev_phy(dev, phy_ext)->hw; return mt76_dev_phy(dev, phy_idx)->hw;
} }
static inline u8 * static inline u8 *
...@@ -1120,13 +1119,17 @@ static inline bool mt76_is_testmode_skb(struct mt76_dev *dev, ...@@ -1120,13 +1119,17 @@ static inline bool mt76_is_testmode_skb(struct mt76_dev *dev,
struct ieee80211_hw **hw) struct ieee80211_hw **hw)
{ {
#ifdef CONFIG_NL80211_TESTMODE #ifdef CONFIG_NL80211_TESTMODE
if (skb == dev->phy.test.tx_skb) int i;
*hw = dev->phy.hw;
else if (dev->phy2 && skb == dev->phy2->test.tx_skb) for (i = 0; i < ARRAY_SIZE(dev->phys); i++) {
*hw = dev->phy2->hw; struct mt76_phy *phy = dev->phys[i];
else
return false; if (phy && skb == phy->test.tx_skb) {
return true; *hw = dev->phys[i]->hw;
return true;
}
}
return false;
#else #else
return false; return false;
#endif #endif
...@@ -1242,12 +1245,10 @@ static inline struct ieee80211_hw * ...@@ -1242,12 +1245,10 @@ static inline struct ieee80211_hw *
mt76_tx_status_get_hw(struct mt76_dev *dev, struct sk_buff *skb) mt76_tx_status_get_hw(struct mt76_dev *dev, struct sk_buff *skb)
{ {
struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
struct ieee80211_hw *hw = dev->phy.hw; u8 phy_idx = (info->hw_queue & MT_TX_HW_QUEUE_PHY) >> 2;
struct ieee80211_hw *hw = mt76_phy_hw(dev, phy_idx);
if ((info->hw_queue & MT_TX_HW_QUEUE_EXT_PHY) && dev->phy2)
hw = dev->phy2->hw;
info->hw_queue &= ~MT_TX_HW_QUEUE_EXT_PHY; info->hw_queue &= ~MT_TX_HW_QUEUE_PHY;
return hw; return hw;
} }
...@@ -1346,12 +1347,12 @@ int mt76s_rd_rp(struct mt76_dev *dev, u32 base, ...@@ -1346,12 +1347,12 @@ int mt76s_rd_rp(struct mt76_dev *dev, u32 base,
struct sk_buff * struct sk_buff *
__mt76_mcu_msg_alloc(struct mt76_dev *dev, const void *data, __mt76_mcu_msg_alloc(struct mt76_dev *dev, const void *data,
int data_len, gfp_t gfp); int len, int data_len, gfp_t gfp);
static inline struct sk_buff * static inline struct sk_buff *
mt76_mcu_msg_alloc(struct mt76_dev *dev, const void *data, mt76_mcu_msg_alloc(struct mt76_dev *dev, const void *data,
int data_len) int data_len)
{ {
return __mt76_mcu_msg_alloc(dev, data, data_len, GFP_KERNEL); return __mt76_mcu_msg_alloc(dev, data, data_len, data_len, GFP_KERNEL);
} }
void mt76_mcu_rx_event(struct mt76_dev *dev, struct sk_buff *skb); void mt76_mcu_rx_event(struct mt76_dev *dev, struct sk_buff *skb);
......
...@@ -24,8 +24,8 @@ mt7603_update_beacon_iter(void *priv, u8 *mac, struct ieee80211_vif *vif) ...@@ -24,8 +24,8 @@ mt7603_update_beacon_iter(void *priv, u8 *mac, struct ieee80211_vif *vif)
if (!skb) if (!skb)
return; return;
mt76_tx_queue_skb(dev, dev->mphy.q_tx[MT_TXQ_BEACON], skb, mt76_tx_queue_skb(dev, dev->mphy.q_tx[MT_TXQ_BEACON],
&mvif->sta.wcid, NULL); MT_TXQ_BEACON, skb, &mvif->sta.wcid, NULL);
spin_lock_bh(&dev->ps_lock); spin_lock_bh(&dev->ps_lock);
mt76_wr(dev, MT_DMA_FQCR0, MT_DMA_FQCR0_BUSY | mt76_wr(dev, MT_DMA_FQCR0, MT_DMA_FQCR0_BUSY |
...@@ -123,7 +123,7 @@ void mt7603_pre_tbtt_tasklet(struct tasklet_struct *t) ...@@ -123,7 +123,7 @@ void mt7603_pre_tbtt_tasklet(struct tasklet_struct *t)
struct ieee80211_vif *vif = info->control.vif; struct ieee80211_vif *vif = info->control.vif;
struct mt7603_vif *mvif = (struct mt7603_vif *)vif->drv_priv; struct mt7603_vif *mvif = (struct mt7603_vif *)vif->drv_priv;
mt76_tx_queue_skb(dev, q, skb, &mvif->sta.wcid, NULL); mt76_tx_queue_skb(dev, q, MT_TXQ_CAB, skb, &mvif->sta.wcid, NULL);
} }
mt76_queue_kick(dev, q); mt76_queue_kick(dev, q);
spin_unlock(&q->lock); spin_unlock(&q->lock);
......
...@@ -44,7 +44,7 @@ mt7622_init_tx_queues_multi(struct mt7615_dev *dev) ...@@ -44,7 +44,7 @@ mt7622_init_tx_queues_multi(struct mt7615_dev *dev)
static int static int
mt7615_init_tx_queues(struct mt7615_dev *dev) mt7615_init_tx_queues(struct mt7615_dev *dev)
{ {
int ret, i; int ret;
ret = mt76_init_mcu_queue(&dev->mt76, MT_MCUQ_FWDL, MT7615_TXQ_FWDL, ret = mt76_init_mcu_queue(&dev->mt76, MT_MCUQ_FWDL, MT7615_TXQ_FWDL,
MT7615_TX_FWDL_RING_SIZE, MT_TX_RING_BASE); MT7615_TX_FWDL_RING_SIZE, MT_TX_RING_BASE);
...@@ -54,14 +54,11 @@ mt7615_init_tx_queues(struct mt7615_dev *dev) ...@@ -54,14 +54,11 @@ mt7615_init_tx_queues(struct mt7615_dev *dev)
if (!is_mt7615(&dev->mt76)) if (!is_mt7615(&dev->mt76))
return mt7622_init_tx_queues_multi(dev); return mt7622_init_tx_queues_multi(dev);
ret = mt76_init_tx_queue(&dev->mphy, 0, 0, MT7615_TX_RING_SIZE, ret = mt76_connac_init_tx_queues(&dev->mphy, 0, MT7615_TX_RING_SIZE,
MT_TX_RING_BASE, 0); MT_TX_RING_BASE, 0);
if (ret) if (ret)
return ret; return ret;
for (i = 1; i <= MT_TXQ_PSD ; i++)
dev->mphy.q_tx[i] = dev->mphy.q_tx[0];
return mt76_init_mcu_queue(&dev->mt76, MT_MCUQ_WM, MT7615_TXQ_MCU, return mt76_init_mcu_queue(&dev->mt76, MT_MCUQ_WM, MT7615_TXQ_MCU,
MT7615_TX_MCU_RING_SIZE, MT_TX_RING_BASE); MT7615_TX_MCU_RING_SIZE, MT_TX_RING_BASE);
} }
......
...@@ -401,6 +401,7 @@ mt7615_init_wiphy(struct ieee80211_hw *hw) ...@@ -401,6 +401,7 @@ mt7615_init_wiphy(struct ieee80211_hw *hw)
ieee80211_hw_set(hw, TX_STATUS_NO_AMPDU_LEN); ieee80211_hw_set(hw, TX_STATUS_NO_AMPDU_LEN);
ieee80211_hw_set(hw, WANT_MONITOR_VIF); ieee80211_hw_set(hw, WANT_MONITOR_VIF);
ieee80211_hw_set(hw, SUPPORTS_RX_DECAP_OFFLOAD); ieee80211_hw_set(hw, SUPPORTS_RX_DECAP_OFFLOAD);
ieee80211_hw_set(hw, SUPPORTS_VHT_EXT_NSS_BW);
if (is_mt7615(&phy->dev->mt76)) if (is_mt7615(&phy->dev->mt76))
hw->max_tx_fragments = MT_TXP_MAX_BUF_NUM; hw->max_tx_fragments = MT_TXP_MAX_BUF_NUM;
...@@ -458,7 +459,7 @@ int mt7615_register_ext_phy(struct mt7615_dev *dev) ...@@ -458,7 +459,7 @@ int mt7615_register_ext_phy(struct mt7615_dev *dev)
return 0; return 0;
mt7615_cap_dbdc_enable(dev); mt7615_cap_dbdc_enable(dev);
mphy = mt76_alloc_phy(&dev->mt76, sizeof(*phy), &mt7615_ops); mphy = mt76_alloc_phy(&dev->mt76, sizeof(*phy), &mt7615_ops, MT_BAND1);
if (!mphy) if (!mphy)
return -ENOMEM; return -ENOMEM;
...@@ -508,7 +509,7 @@ EXPORT_SYMBOL_GPL(mt7615_register_ext_phy); ...@@ -508,7 +509,7 @@ EXPORT_SYMBOL_GPL(mt7615_register_ext_phy);
void mt7615_unregister_ext_phy(struct mt7615_dev *dev) void mt7615_unregister_ext_phy(struct mt7615_dev *dev)
{ {
struct mt7615_phy *phy = mt7615_ext_phy(dev); struct mt7615_phy *phy = mt7615_ext_phy(dev);
struct mt76_phy *mphy = dev->mt76.phy2; struct mt76_phy *mphy = dev->mt76.phys[MT_BAND1];
if (!phy) if (!phy)
return; return;
......
...@@ -109,6 +109,7 @@ static struct mt76_wcid *mt7615_rx_get_wcid(struct mt7615_dev *dev, ...@@ -109,6 +109,7 @@ static struct mt76_wcid *mt7615_rx_get_wcid(struct mt7615_dev *dev,
void mt7615_mac_reset_counters(struct mt7615_dev *dev) void mt7615_mac_reset_counters(struct mt7615_dev *dev)
{ {
struct mt76_phy *mphy_ext = dev->mt76.phys[MT_BAND1];
int i; int i;
for (i = 0; i < 4; i++) { for (i = 0; i < 4; i++) {
...@@ -118,8 +119,8 @@ void mt7615_mac_reset_counters(struct mt7615_dev *dev) ...@@ -118,8 +119,8 @@ void mt7615_mac_reset_counters(struct mt7615_dev *dev)
memset(dev->mt76.aggr_stats, 0, sizeof(dev->mt76.aggr_stats)); memset(dev->mt76.aggr_stats, 0, sizeof(dev->mt76.aggr_stats));
dev->mt76.phy.survey_time = ktime_get_boottime(); dev->mt76.phy.survey_time = ktime_get_boottime();
if (dev->mt76.phy2) if (mphy_ext)
dev->mt76.phy2->survey_time = ktime_get_boottime(); mphy_ext->survey_time = ktime_get_boottime();
/* reset airtime counters */ /* reset airtime counters */
mt76_rr(dev, MT_MIB_SDR9(0)); mt76_rr(dev, MT_MIB_SDR9(0));
...@@ -336,9 +337,9 @@ static int mt7615_mac_fill_rx(struct mt7615_dev *dev, struct sk_buff *skb) ...@@ -336,9 +337,9 @@ static int mt7615_mac_fill_rx(struct mt7615_dev *dev, struct sk_buff *skb)
struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb; struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb;
struct mt76_phy *mphy = &dev->mt76.phy; struct mt76_phy *mphy = &dev->mt76.phy;
struct mt7615_phy *phy = &dev->phy; struct mt7615_phy *phy = &dev->phy;
struct mt7615_phy *phy2 = dev->mt76.phy2 ? dev->mt76.phy2->priv : NULL;
struct ieee80211_supported_band *sband; struct ieee80211_supported_band *sband;
struct ieee80211_hdr *hdr; struct ieee80211_hdr *hdr;
struct mt7615_phy *phy2;
__le32 *rxd = (__le32 *)skb->data; __le32 *rxd = (__le32 *)skb->data;
u32 rxd0 = le32_to_cpu(rxd[0]); u32 rxd0 = le32_to_cpu(rxd[0]);
u32 rxd1 = le32_to_cpu(rxd[1]); u32 rxd1 = le32_to_cpu(rxd[1]);
...@@ -355,6 +356,8 @@ static int mt7615_mac_fill_rx(struct mt7615_dev *dev, struct sk_buff *skb) ...@@ -355,6 +356,8 @@ static int mt7615_mac_fill_rx(struct mt7615_dev *dev, struct sk_buff *skb)
memset(status, 0, sizeof(*status)); memset(status, 0, sizeof(*status));
chfreq = FIELD_GET(MT_RXD1_NORMAL_CH_FREQ, rxd1); chfreq = FIELD_GET(MT_RXD1_NORMAL_CH_FREQ, rxd1);
phy2 = dev->mt76.phys[MT_BAND1] ? dev->mt76.phys[MT_BAND1]->priv : NULL;
if (!phy2) if (!phy2)
phy_idx = 0; phy_idx = 0;
else if (phy2->chfreq == phy->chfreq) else if (phy2->chfreq == phy->chfreq)
...@@ -498,9 +501,9 @@ static int mt7615_mac_fill_rx(struct mt7615_dev *dev, struct sk_buff *skb) ...@@ -498,9 +501,9 @@ static int mt7615_mac_fill_rx(struct mt7615_dev *dev, struct sk_buff *skb)
} }
if (phy_idx == 1 && phy2) { if (phy_idx == 1 && phy2) {
mphy = dev->mt76.phy2; mphy = dev->mt76.phys[MT_BAND1];
phy = phy2; phy = phy2;
status->ext_phy = true; status->phy_idx = phy_idx;
} }
if (!mt7615_firmware_offload(dev) && chfreq != phy->chfreq) if (!mt7615_firmware_offload(dev) && chfreq != phy->chfreq)
...@@ -717,13 +720,14 @@ mt7615_mac_tx_rate_val(struct mt7615_dev *dev, ...@@ -717,13 +720,14 @@ mt7615_mac_tx_rate_val(struct mt7615_dev *dev,
int mt7615_mac_write_txwi(struct mt7615_dev *dev, __le32 *txwi, int mt7615_mac_write_txwi(struct mt7615_dev *dev, __le32 *txwi,
struct sk_buff *skb, struct mt76_wcid *wcid, struct sk_buff *skb, struct mt76_wcid *wcid,
struct ieee80211_sta *sta, int pid, struct ieee80211_sta *sta, int pid,
struct ieee80211_key_conf *key, bool beacon) struct ieee80211_key_conf *key,
enum mt76_txq_id qid, bool beacon)
{ {
struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
u8 fc_type, fc_stype, p_fmt, q_idx, omac_idx = 0, wmm_idx = 0; u8 fc_type, fc_stype, p_fmt, q_idx, omac_idx = 0, wmm_idx = 0;
struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
struct ieee80211_tx_rate *rate = &info->control.rates[0]; struct ieee80211_tx_rate *rate = &info->control.rates[0];
bool ext_phy = info->hw_queue & MT_TX_HW_QUEUE_EXT_PHY; u8 phy_idx = (info->hw_queue & MT_TX_HW_QUEUE_PHY) >> 2;
bool multicast = is_multicast_ether_addr(hdr->addr1); bool multicast = is_multicast_ether_addr(hdr->addr1);
struct ieee80211_vif *vif = info->control.vif; struct ieee80211_vif *vif = info->control.vif;
bool is_mmio = mt76_is_mmio(&dev->mt76); bool is_mmio = mt76_is_mmio(&dev->mt76);
...@@ -746,18 +750,18 @@ int mt7615_mac_write_txwi(struct mt7615_dev *dev, __le32 *txwi, ...@@ -746,18 +750,18 @@ int mt7615_mac_write_txwi(struct mt7615_dev *dev, __le32 *txwi,
tx_count = msta->rate_count; tx_count = msta->rate_count;
} }
if (ext_phy && dev->mt76.phy2) if (phy_idx && dev->mt76.phys[MT_BAND1])
mphy = dev->mt76.phy2; mphy = dev->mt76.phys[MT_BAND1];
fc_type = (le16_to_cpu(fc) & IEEE80211_FCTL_FTYPE) >> 2; fc_type = (le16_to_cpu(fc) & IEEE80211_FCTL_FTYPE) >> 2;
fc_stype = (le16_to_cpu(fc) & IEEE80211_FCTL_STYPE) >> 4; fc_stype = (le16_to_cpu(fc) & IEEE80211_FCTL_STYPE) >> 4;
if (beacon) { if (beacon) {
p_fmt = MT_TX_TYPE_FW; p_fmt = MT_TX_TYPE_FW;
q_idx = ext_phy ? MT_LMAC_BCN1 : MT_LMAC_BCN0; q_idx = phy_idx ? MT_LMAC_BCN1 : MT_LMAC_BCN0;
} else if (skb_get_queue_mapping(skb) >= MT_TXQ_PSD) { } else if (qid >= MT_TXQ_PSD) {
p_fmt = is_mmio ? MT_TX_TYPE_CT : MT_TX_TYPE_SF; p_fmt = is_mmio ? MT_TX_TYPE_CT : MT_TX_TYPE_SF;
q_idx = ext_phy ? MT_LMAC_ALTX1 : MT_LMAC_ALTX0; q_idx = phy_idx ? MT_LMAC_ALTX1 : MT_LMAC_ALTX0;
} else { } else {
p_fmt = is_mmio ? MT_TX_TYPE_CT : MT_TX_TYPE_SF; p_fmt = is_mmio ? MT_TX_TYPE_CT : MT_TX_TYPE_SF;
q_idx = wmm_idx * MT7615_MAX_WMM_SETS + q_idx = wmm_idx * MT7615_MAX_WMM_SETS +
...@@ -876,60 +880,6 @@ int mt7615_mac_write_txwi(struct mt7615_dev *dev, __le32 *txwi, ...@@ -876,60 +880,6 @@ int mt7615_mac_write_txwi(struct mt7615_dev *dev, __le32 *txwi,
} }
EXPORT_SYMBOL_GPL(mt7615_mac_write_txwi); EXPORT_SYMBOL_GPL(mt7615_mac_write_txwi);
static void
mt7615_txp_skb_unmap_fw(struct mt76_dev *dev, struct mt7615_fw_txp *txp)
{
int i;
for (i = 0; i < txp->nbuf; i++)
dma_unmap_single(dev->dev, le32_to_cpu(txp->buf[i]),
le16_to_cpu(txp->len[i]), DMA_TO_DEVICE);
}
static void
mt7615_txp_skb_unmap_hw(struct mt76_dev *dev, struct mt7615_hw_txp *txp)
{
u32 last_mask;
int i;
last_mask = is_mt7663(dev) ? MT_TXD_LEN_LAST : MT_TXD_LEN_MSDU_LAST;
for (i = 0; i < ARRAY_SIZE(txp->ptr); i++) {
struct mt7615_txp_ptr *ptr = &txp->ptr[i];
bool last;
u16 len;
len = le16_to_cpu(ptr->len0);
last = len & last_mask;
len &= MT_TXD_LEN_MASK;
dma_unmap_single(dev->dev, le32_to_cpu(ptr->buf0), len,
DMA_TO_DEVICE);
if (last)
break;
len = le16_to_cpu(ptr->len1);
last = len & last_mask;
len &= MT_TXD_LEN_MASK;
dma_unmap_single(dev->dev, le32_to_cpu(ptr->buf1), len,
DMA_TO_DEVICE);
if (last)
break;
}
}
void mt7615_txp_skb_unmap(struct mt76_dev *dev,
struct mt76_txwi_cache *t)
{
struct mt7615_txp_common *txp;
txp = mt7615_txwi_to_txp(dev, t);
if (is_mt7615(dev))
mt7615_txp_skb_unmap_fw(dev, &txp->fw);
else
mt7615_txp_skb_unmap_hw(dev, &txp->hw);
}
EXPORT_SYMBOL_GPL(mt7615_txp_skb_unmap);
bool mt7615_mac_wtbl_update(struct mt7615_dev *dev, int idx, u32 mask) bool mt7615_mac_wtbl_update(struct mt7615_dev *dev, int idx, u32 mask)
{ {
mt76_rmw(dev, MT_WTBL_UPDATE, MT_WTBL_UPDATE_WLAN_IDX, mt76_rmw(dev, MT_WTBL_UPDATE, MT_WTBL_UPDATE_WLAN_IDX,
...@@ -1439,8 +1389,8 @@ static bool mt7615_fill_txs(struct mt7615_dev *dev, struct mt7615_sta *sta, ...@@ -1439,8 +1389,8 @@ static bool mt7615_fill_txs(struct mt7615_dev *dev, struct mt7615_sta *sta,
if (sta->rate_probe) { if (sta->rate_probe) {
struct mt7615_phy *phy = &dev->phy; struct mt7615_phy *phy = &dev->phy;
if (sta->wcid.ext_phy && dev->mt76.phy2) if (sta->wcid.phy_idx && dev->mt76.phys[MT_BAND1])
phy = dev->mt76.phy2->priv; phy = dev->mt76.phys[MT_BAND1]->priv;
mt7615_mac_set_rates(phy, sta, NULL, sta->rates); mt7615_mac_set_rates(phy, sta, NULL, sta->rates);
} }
...@@ -1482,8 +1432,8 @@ static bool mt7615_fill_txs(struct mt7615_dev *dev, struct mt7615_sta *sta, ...@@ -1482,8 +1432,8 @@ static bool mt7615_fill_txs(struct mt7615_dev *dev, struct mt7615_sta *sta,
fallthrough; fallthrough;
case MT_PHY_TYPE_OFDM: case MT_PHY_TYPE_OFDM:
mphy = &dev->mphy; mphy = &dev->mphy;
if (sta->wcid.ext_phy && dev->mt76.phy2) if (sta->wcid.phy_idx && dev->mt76.phys[MT_BAND1])
mphy = dev->mt76.phy2; mphy = dev->mt76.phys[MT_BAND1];
if (mphy->chandef.chan->band == NL80211_BAND_5GHZ) if (mphy->chandef.chan->band == NL80211_BAND_5GHZ)
sband = &mphy->sband_5g.sband; sband = &mphy->sband_5g.sband;
...@@ -1590,8 +1540,8 @@ static void mt7615_mac_add_txs(struct mt7615_dev *dev, void *data) ...@@ -1590,8 +1540,8 @@ static void mt7615_mac_add_txs(struct mt7615_dev *dev, void *data)
if (wcidx >= MT7615_WTBL_STA || !sta) if (wcidx >= MT7615_WTBL_STA || !sta)
goto out; goto out;
if (wcid->ext_phy && dev->mt76.phy2) if (wcid->phy_idx && dev->mt76.phys[MT_BAND1])
mphy = dev->mt76.phy2; mphy = dev->mt76.phys[MT_BAND1];
if (mt7615_fill_txs(dev, msta, &info, txs_data)) if (mt7615_fill_txs(dev, msta, &info, txs_data))
ieee80211_tx_status_noskb(mphy->hw, sta, &info); ieee80211_tx_status_noskb(mphy->hw, sta, &info);
...@@ -1608,7 +1558,7 @@ mt7615_txwi_free(struct mt7615_dev *dev, struct mt76_txwi_cache *txwi) ...@@ -1608,7 +1558,7 @@ mt7615_txwi_free(struct mt7615_dev *dev, struct mt76_txwi_cache *txwi)
u32 val; u32 val;
u8 wcid; u8 wcid;
mt7615_txp_skb_unmap(mdev, txwi); mt76_connac_txp_skb_unmap(mdev, txwi);
if (!txwi->skb) if (!txwi->skb)
goto out; goto out;
...@@ -1638,7 +1588,8 @@ mt7615_mac_tx_free_token(struct mt7615_dev *dev, u16 token) ...@@ -1638,7 +1588,8 @@ mt7615_mac_tx_free_token(struct mt7615_dev *dev, u16 token)
static void mt7615_mac_tx_free(struct mt7615_dev *dev, void *data, int len) static void mt7615_mac_tx_free(struct mt7615_dev *dev, void *data, int len)
{ {
struct mt7615_tx_free *free = (struct mt7615_tx_free *)data; struct mt76_connac_tx_free *free = data;
void *tx_token = data + sizeof(*free);
void *end = data + len; void *end = data + len;
u8 i, count; u8 i, count;
...@@ -1652,7 +1603,7 @@ static void mt7615_mac_tx_free(struct mt7615_dev *dev, void *data, int len) ...@@ -1652,7 +1603,7 @@ static void mt7615_mac_tx_free(struct mt7615_dev *dev, void *data, int len)
count = le16_get_bits(free->ctrl, MT_TX_FREE_MSDU_ID_CNT); count = le16_get_bits(free->ctrl, MT_TX_FREE_MSDU_ID_CNT);
if (is_mt7615(&dev->mt76)) { if (is_mt7615(&dev->mt76)) {
__le16 *token = &free->token[0]; __le16 *token = tx_token;
if (WARN_ON_ONCE((void *)&token[count] > end)) if (WARN_ON_ONCE((void *)&token[count] > end))
return; return;
...@@ -1660,7 +1611,7 @@ static void mt7615_mac_tx_free(struct mt7615_dev *dev, void *data, int len) ...@@ -1660,7 +1611,7 @@ static void mt7615_mac_tx_free(struct mt7615_dev *dev, void *data, int len)
for (i = 0; i < count; i++) for (i = 0; i < count; i++)
mt7615_mac_tx_free_token(dev, le16_to_cpu(token[i])); mt7615_mac_tx_free_token(dev, le16_to_cpu(token[i]));
} else { } else {
__le32 *token = (__le32 *)&free->token[0]; __le32 *token = tx_token;
if (WARN_ON_ONCE((void *)&token[count] > end)) if (WARN_ON_ONCE((void *)&token[count] > end))
return; return;
...@@ -2007,6 +1958,7 @@ mt7615_phy_update_channel(struct mt76_phy *mphy, int idx) ...@@ -2007,6 +1958,7 @@ mt7615_phy_update_channel(struct mt76_phy *mphy, int idx)
static void mt7615_update_survey(struct mt7615_dev *dev) static void mt7615_update_survey(struct mt7615_dev *dev)
{ {
struct mt76_dev *mdev = &dev->mt76; struct mt76_dev *mdev = &dev->mt76;
struct mt76_phy *mphy_ext = mdev->phys[MT_BAND1];
ktime_t cur_time; ktime_t cur_time;
/* MT7615 can only update both phys simultaneously /* MT7615 can only update both phys simultaneously
...@@ -2014,14 +1966,14 @@ static void mt7615_update_survey(struct mt7615_dev *dev) ...@@ -2014,14 +1966,14 @@ static void mt7615_update_survey(struct mt7615_dev *dev)
*/ */
mt7615_phy_update_channel(&mdev->phy, 0); mt7615_phy_update_channel(&mdev->phy, 0);
if (mdev->phy2) if (mphy_ext)
mt7615_phy_update_channel(mdev->phy2, 1); mt7615_phy_update_channel(mphy_ext, 1);
cur_time = ktime_get_boottime(); cur_time = ktime_get_boottime();
mt76_update_survey_active_time(&mdev->phy, cur_time); mt76_update_survey_active_time(&mdev->phy, cur_time);
if (mdev->phy2) if (mphy_ext)
mt76_update_survey_active_time(mdev->phy2, cur_time); mt76_update_survey_active_time(mphy_ext, cur_time);
/* reset obss airtime */ /* reset obss airtime */
mt76_set(dev, MT_WF_RMAC_MIB_TIME0, MT_WF_RMAC_MIB_RXTIME_CLR); mt76_set(dev, MT_WF_RMAC_MIB_TIME0, MT_WF_RMAC_MIB_RXTIME_CLR);
...@@ -2094,8 +2046,10 @@ void mt7615_pm_wake_work(struct work_struct *work) ...@@ -2094,8 +2046,10 @@ void mt7615_pm_wake_work(struct work_struct *work)
mt76_connac_pm_dequeue_skbs(mphy, &dev->pm); mt76_connac_pm_dequeue_skbs(mphy, &dev->pm);
mt76_worker_schedule(&mdev->sdio.txrx_worker); mt76_worker_schedule(&mdev->sdio.txrx_worker);
} else { } else {
local_bh_disable();
mt76_for_each_q_rx(mdev, i) mt76_for_each_q_rx(mdev, i)
napi_schedule(&mdev->napi[i]); napi_schedule(&mdev->napi[i]);
local_bh_enable();
mt76_connac_pm_dequeue_skbs(mphy, &dev->pm); mt76_connac_pm_dequeue_skbs(mphy, &dev->pm);
mt76_queue_tx_cleanup(dev, mdev->q_mcu[MT_MCUQ_WM], mt76_queue_tx_cleanup(dev, mdev->q_mcu[MT_MCUQ_WM],
false); false);
...@@ -2282,6 +2236,7 @@ mt7615_dfs_init_radar_specs(struct mt7615_phy *phy) ...@@ -2282,6 +2236,7 @@ mt7615_dfs_init_radar_specs(struct mt7615_phy *phy)
int mt7615_dfs_init_radar_detector(struct mt7615_phy *phy) int mt7615_dfs_init_radar_detector(struct mt7615_phy *phy)
{ {
struct cfg80211_chan_def *chandef = &phy->mt76->chandef;
struct mt7615_dev *dev = phy->dev; struct mt7615_dev *dev = phy->dev;
bool ext_phy = phy != &dev->phy; bool ext_phy = phy != &dev->phy;
enum mt76_dfs_state dfs_state, prev_state; enum mt76_dfs_state dfs_state, prev_state;
...@@ -2292,13 +2247,13 @@ int mt7615_dfs_init_radar_detector(struct mt7615_phy *phy) ...@@ -2292,13 +2247,13 @@ int mt7615_dfs_init_radar_detector(struct mt7615_phy *phy)
prev_state = phy->mt76->dfs_state; prev_state = phy->mt76->dfs_state;
dfs_state = mt76_phy_dfs_state(phy->mt76); dfs_state = mt76_phy_dfs_state(phy->mt76);
if ((chandef->chan->flags & IEEE80211_CHAN_RADAR) &&
dfs_state < MT_DFS_STATE_CAC)
dfs_state = MT_DFS_STATE_ACTIVE;
if (prev_state == dfs_state) if (prev_state == dfs_state)
return 0; return 0;
if (prev_state == MT_DFS_STATE_UNKNOWN)
mt7615_dfs_stop_radar_detector(phy);
if (dfs_state == MT_DFS_STATE_DISABLED) if (dfs_state == MT_DFS_STATE_DISABLED)
goto stop; goto stop;
......
...@@ -165,12 +165,6 @@ enum tx_phy_bandwidth { ...@@ -165,12 +165,6 @@ enum tx_phy_bandwidth {
#define MT_CT_INFO_NONE_CIPHER_FRAME BIT(3) #define MT_CT_INFO_NONE_CIPHER_FRAME BIT(3)
#define MT_CT_INFO_HSR2_TX BIT(4) #define MT_CT_INFO_HSR2_TX BIT(4)
#define MT_TXD_SIZE (8 * 4)
#define MT_USB_TXD_SIZE (MT_TXD_SIZE + 8 * 4)
#define MT_USB_HDR_SIZE 4
#define MT_USB_TAIL_SIZE 4
#define MT_TXD0_P_IDX BIT(31) #define MT_TXD0_P_IDX BIT(31)
#define MT_TXD0_Q_IDX GENMASK(30, 26) #define MT_TXD0_Q_IDX GENMASK(30, 26)
#define MT_TXD0_UDP_TCP_SUM BIT(24) #define MT_TXD0_UDP_TCP_SUM BIT(24)
...@@ -250,56 +244,6 @@ enum tx_phy_bandwidth { ...@@ -250,56 +244,6 @@ enum tx_phy_bandwidth {
#define MT_TX_RATE_MODE GENMASK(8, 6) #define MT_TX_RATE_MODE GENMASK(8, 6)
#define MT_TX_RATE_IDX GENMASK(5, 0) #define MT_TX_RATE_IDX GENMASK(5, 0)
#define MT_TXP_MAX_BUF_NUM 6
#define MT_HW_TXP_MAX_MSDU_NUM 4
#define MT_HW_TXP_MAX_BUF_NUM 4
#define MT_MSDU_ID_VALID BIT(15)
#define MT_TXD_LEN_MASK GENMASK(11, 0)
#define MT_TXD_LEN_MSDU_LAST BIT(14)
#define MT_TXD_LEN_AMSDU_LAST BIT(15)
/* mt7663 */
#define MT_TXD_LEN_LAST BIT(15)
struct mt7615_txp_ptr {
__le32 buf0;
__le16 len0;
__le16 len1;
__le32 buf1;
} __packed __aligned(4);
struct mt7615_hw_txp {
__le16 msdu_id[MT_HW_TXP_MAX_MSDU_NUM];
struct mt7615_txp_ptr ptr[MT_HW_TXP_MAX_BUF_NUM / 2];
} __packed __aligned(4);
struct mt7615_fw_txp {
__le16 flags;
__le16 token;
u8 bss_idx;
u8 rept_wds_wcid;
u8 rsv;
u8 nbuf;
__le32 buf[MT_TXP_MAX_BUF_NUM];
__le16 len[MT_TXP_MAX_BUF_NUM];
} __packed __aligned(4);
struct mt7615_txp_common {
union {
struct mt7615_fw_txp fw;
struct mt7615_hw_txp hw;
};
};
struct mt7615_tx_free {
__le16 rx_byte_cnt;
__le16 ctrl;
u8 txd_cnt;
u8 rsv[3];
__le16 token[];
} __packed __aligned(4);
#define MT_TX_FREE_MSDU_ID_CNT GENMASK(6, 0) #define MT_TX_FREE_MSDU_ID_CNT GENMASK(6, 0)
#define MT_TXS0_PID GENMASK(31, 24) #define MT_TXS0_PID GENMASK(31, 24)
...@@ -385,19 +329,6 @@ struct mt7615_dfs_radar_spec { ...@@ -385,19 +329,6 @@ struct mt7615_dfs_radar_spec {
struct mt7615_dfs_pattern radar_pattern[16]; struct mt7615_dfs_pattern radar_pattern[16];
}; };
static inline struct mt7615_txp_common *
mt7615_txwi_to_txp(struct mt76_dev *dev, struct mt76_txwi_cache *t)
{
u8 *txwi;
if (!t)
return NULL;
txwi = mt76_get_txwi_ptr(dev, t);
return (struct mt7615_txp_common *)(txwi + MT_TXD_SIZE);
}
static inline u32 mt7615_mac_wtbl_addr(struct mt7615_dev *dev, int wcid) static inline u32 mt7615_mac_wtbl_addr(struct mt7615_dev *dev, int wcid)
{ {
return MT_WTBL_BASE(dev) + wcid * MT_WTBL_ENTRY_SIZE; return MT_WTBL_BASE(dev) + wcid * MT_WTBL_ENTRY_SIZE;
......
...@@ -224,7 +224,7 @@ static int mt7615_add_interface(struct ieee80211_hw *hw, ...@@ -224,7 +224,7 @@ static int mt7615_add_interface(struct ieee80211_hw *hw,
INIT_LIST_HEAD(&mvif->sta.poll_list); INIT_LIST_HEAD(&mvif->sta.poll_list);
mvif->sta.wcid.idx = idx; mvif->sta.wcid.idx = idx;
mvif->sta.wcid.ext_phy = mvif->mt76.band_idx; mvif->sta.wcid.phy_idx = mvif->mt76.band_idx;
mvif->sta.wcid.hw_key_idx = -1; mvif->sta.wcid.hw_key_idx = -1;
mt76_packet_id_init(&mvif->sta.wcid); mt76_packet_id_init(&mvif->sta.wcid);
...@@ -282,26 +282,6 @@ static void mt7615_remove_interface(struct ieee80211_hw *hw, ...@@ -282,26 +282,6 @@ static void mt7615_remove_interface(struct ieee80211_hw *hw,
mt76_packet_id_flush(&dev->mt76, &mvif->sta.wcid); mt76_packet_id_flush(&dev->mt76, &mvif->sta.wcid);
} }
static void mt7615_init_dfs_state(struct mt7615_phy *phy)
{
struct mt76_phy *mphy = phy->mt76;
struct ieee80211_hw *hw = mphy->hw;
struct cfg80211_chan_def *chandef = &hw->conf.chandef;
if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
return;
if (!(chandef->chan->flags & IEEE80211_CHAN_RADAR) &&
!(mphy->chandef.chan->flags & IEEE80211_CHAN_RADAR))
return;
if (mphy->chandef.chan->center_freq == chandef->chan->center_freq &&
mphy->chandef.width == chandef->width)
return;
phy->dfs_state = -1;
}
int mt7615_set_channel(struct mt7615_phy *phy) int mt7615_set_channel(struct mt7615_phy *phy)
{ {
struct mt7615_dev *dev = phy->dev; struct mt7615_dev *dev = phy->dev;
...@@ -314,7 +294,6 @@ int mt7615_set_channel(struct mt7615_phy *phy) ...@@ -314,7 +294,6 @@ int mt7615_set_channel(struct mt7615_phy *phy)
set_bit(MT76_RESET, &phy->mt76->state); set_bit(MT76_RESET, &phy->mt76->state);
mt7615_init_dfs_state(phy);
mt76_set_channel(phy->mt76); mt76_set_channel(phy->mt76);
if (is_mt7615(&dev->mt76) && dev->flash_eeprom) { if (is_mt7615(&dev->mt76) && dev->flash_eeprom) {
...@@ -651,7 +630,7 @@ int mt7615_mac_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif, ...@@ -651,7 +630,7 @@ int mt7615_mac_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif,
msta->vif = mvif; msta->vif = mvif;
msta->wcid.sta = 1; msta->wcid.sta = 1;
msta->wcid.idx = idx; msta->wcid.idx = idx;
msta->wcid.ext_phy = mvif->mt76.band_idx; msta->wcid.phy_idx = mvif->mt76.band_idx;
phy = mvif->mt76.band_idx ? mt7615_ext_phy(dev) : &dev->phy; phy = mvif->mt76.band_idx ? mt7615_ext_phy(dev) : &dev->phy;
err = mt76_connac_pm_wake(phy->mt76, &dev->pm); err = mt76_connac_pm_wake(phy->mt76, &dev->pm);
......
...@@ -40,18 +40,6 @@ struct mt7615_fw_trailer { ...@@ -40,18 +40,6 @@ struct mt7615_fw_trailer {
#define FW_START_DLYCAL BIT(1) #define FW_START_DLYCAL BIT(1)
#define FW_START_WORKING_PDA_CR4 BIT(2) #define FW_START_WORKING_PDA_CR4 BIT(2)
struct mt7663_fw_trailer {
u8 chip_id;
u8 eco_code;
u8 n_region;
u8 format_ver;
u8 format_flag;
u8 reserv[2];
char fw_ver[10];
char build_date[15];
__le32 crc;
} __packed;
struct mt7663_fw_buf { struct mt7663_fw_buf {
__le32 crc; __le32 crc;
__le32 d_img_size; __le32 d_img_size;
...@@ -350,10 +338,11 @@ static int mt7615_mcu_fw_pmctrl(struct mt7615_dev *dev) ...@@ -350,10 +338,11 @@ static int mt7615_mcu_fw_pmctrl(struct mt7615_dev *dev)
} }
mt7622_trigger_hif_int(dev, false); mt7622_trigger_hif_int(dev, false);
if (!err) {
pm->stats.last_doze_event = jiffies; pm->stats.last_doze_event = jiffies;
pm->stats.awake_time += pm->stats.last_doze_event - pm->stats.awake_time += pm->stats.last_doze_event -
pm->stats.last_wake_event; pm->stats.last_wake_event;
}
out: out:
mutex_unlock(&pm->mutex); mutex_unlock(&pm->mutex);
...@@ -380,7 +369,7 @@ mt7615_mcu_rx_csa_notify(struct mt7615_dev *dev, struct sk_buff *skb) ...@@ -380,7 +369,7 @@ mt7615_mcu_rx_csa_notify(struct mt7615_dev *dev, struct sk_buff *skb)
return; return;
if (ext_phy && ext_phy->omac_mask & BIT_ULL(c->omac_idx)) if (ext_phy && ext_phy->omac_mask & BIT_ULL(c->omac_idx))
mphy = dev->mt76.phy2; mphy = dev->mt76.phys[MT_BAND1];
ieee80211_iterate_active_interfaces_atomic(mphy->hw, ieee80211_iterate_active_interfaces_atomic(mphy->hw,
IEEE80211_IFACE_ITER_RESUME_ALL, IEEE80211_IFACE_ITER_RESUME_ALL,
...@@ -399,8 +388,11 @@ mt7615_mcu_rx_radar_detected(struct mt7615_dev *dev, struct sk_buff *skb) ...@@ -399,8 +388,11 @@ mt7615_mcu_rx_radar_detected(struct mt7615_dev *dev, struct sk_buff *skb)
!r->constant_prf_detected && !r->staggered_prf_detected) !r->constant_prf_detected && !r->staggered_prf_detected)
return; return;
if (r->band_idx && dev->mt76.phy2) if (r->band_idx && dev->mt76.phys[MT_BAND1])
mphy = dev->mt76.phy2; mphy = dev->mt76.phys[MT_BAND1];
if (mt76_phy_dfs_state(mphy) < MT_DFS_STATE_CAC)
return;
ieee80211_radar_detected(mphy->hw); ieee80211_radar_detected(mphy->hw);
dev->hw_pattern++; dev->hw_pattern++;
...@@ -456,8 +448,8 @@ mt7615_mcu_scan_event(struct mt7615_dev *dev, struct sk_buff *skb) ...@@ -456,8 +448,8 @@ mt7615_mcu_scan_event(struct mt7615_dev *dev, struct sk_buff *skb)
struct mt7615_phy *phy; struct mt7615_phy *phy;
struct mt76_phy *mphy; struct mt76_phy *mphy;
if (*seq_num & BIT(7) && dev->mt76.phy2) if (*seq_num & BIT(7) && dev->mt76.phys[MT_BAND1])
mphy = dev->mt76.phy2; mphy = dev->mt76.phys[MT_BAND1];
else else
mphy = &dev->mt76.phy; mphy = &dev->mt76.phy;
...@@ -482,8 +474,8 @@ mt7615_mcu_roc_event(struct mt7615_dev *dev, struct sk_buff *skb) ...@@ -482,8 +474,8 @@ mt7615_mcu_roc_event(struct mt7615_dev *dev, struct sk_buff *skb)
skb_pull(skb, sizeof(struct mt7615_mcu_rxd)); skb_pull(skb, sizeof(struct mt7615_mcu_rxd));
event = (struct mt7615_roc_tlv *)skb->data; event = (struct mt7615_roc_tlv *)skb->data;
if (event->dbdc_band && dev->mt76.phy2) if (event->dbdc_band && dev->mt76.phys[MT_BAND1])
mphy = dev->mt76.phy2; mphy = dev->mt76.phys[MT_BAND1];
else else
mphy = &dev->mt76.phy; mphy = &dev->mt76.phy;
...@@ -507,8 +499,8 @@ mt7615_mcu_beacon_loss_event(struct mt7615_dev *dev, struct sk_buff *skb) ...@@ -507,8 +499,8 @@ mt7615_mcu_beacon_loss_event(struct mt7615_dev *dev, struct sk_buff *skb)
skb_pull(skb, sizeof(struct mt7615_mcu_rxd)); skb_pull(skb, sizeof(struct mt7615_mcu_rxd));
event = (struct mt76_connac_beacon_loss_event *)skb->data; event = (struct mt76_connac_beacon_loss_event *)skb->data;
if (band_idx && dev->mt76.phy2) if (band_idx && dev->mt76.phys[MT_BAND1])
mphy = dev->mt76.phy2; mphy = dev->mt76.phys[MT_BAND1];
else else
mphy = &dev->mt76.phy; mphy = &dev->mt76.phy;
...@@ -528,8 +520,8 @@ mt7615_mcu_bss_event(struct mt7615_dev *dev, struct sk_buff *skb) ...@@ -528,8 +520,8 @@ mt7615_mcu_bss_event(struct mt7615_dev *dev, struct sk_buff *skb)
skb_pull(skb, sizeof(struct mt7615_mcu_rxd)); skb_pull(skb, sizeof(struct mt7615_mcu_rxd));
event = (struct mt76_connac_mcu_bss_event *)skb->data; event = (struct mt76_connac_mcu_bss_event *)skb->data;
if (band_idx && dev->mt76.phy2) if (band_idx && dev->mt76.phys[MT_BAND1])
mphy = dev->mt76.phy2; mphy = dev->mt76.phys[MT_BAND1];
else else
mphy = &dev->mt76.phy; mphy = &dev->mt76.phy;
...@@ -716,13 +708,11 @@ mt7615_mcu_add_beacon_offload(struct mt7615_dev *dev, ...@@ -716,13 +708,11 @@ mt7615_mcu_add_beacon_offload(struct mt7615_dev *dev,
return -EINVAL; return -EINVAL;
} }
if (mvif->mt76.band_idx) { info = IEEE80211_SKB_CB(skb);
info = IEEE80211_SKB_CB(skb); info->hw_queue |= FIELD_PREP(MT_TX_HW_QUEUE_PHY, mvif->mt76.band_idx);
info->hw_queue |= MT_TX_HW_QUEUE_EXT_PHY;
}
mt7615_mac_write_txwi(dev, (__le32 *)(req.pkt), skb, wcid, NULL, mt7615_mac_write_txwi(dev, (__le32 *)(req.pkt), skb, wcid, NULL,
0, NULL, true); 0, NULL, 0, true);
memcpy(req.pkt + MT_TXD_SIZE, skb->data, skb->len); memcpy(req.pkt + MT_TXD_SIZE, skb->data, skb->len);
req.pkt_len = cpu_to_le16(MT_TXD_SIZE + skb->len); req.pkt_len = cpu_to_le16(MT_TXD_SIZE + skb->len);
req.tim_ie_pos = cpu_to_le16(MT_TXD_SIZE + offs.tim_offset); req.tim_ie_pos = cpu_to_le16(MT_TXD_SIZE + offs.tim_offset);
...@@ -855,6 +845,7 @@ mt7615_mcu_wtbl_sta_add(struct mt7615_phy *phy, struct ieee80211_vif *vif, ...@@ -855,6 +845,7 @@ mt7615_mcu_wtbl_sta_add(struct mt7615_phy *phy, struct ieee80211_vif *vif,
struct mt7615_dev *dev = phy->dev; struct mt7615_dev *dev = phy->dev;
struct wtbl_req_hdr *wtbl_hdr; struct wtbl_req_hdr *wtbl_hdr;
struct mt7615_sta *msta; struct mt7615_sta *msta;
bool new_entry = true;
int cmd, err; int cmd, err;
msta = sta ? (struct mt7615_sta *)sta->drv_priv : &mvif->sta; msta = sta ? (struct mt7615_sta *)sta->drv_priv : &mvif->sta;
...@@ -864,7 +855,13 @@ mt7615_mcu_wtbl_sta_add(struct mt7615_phy *phy, struct ieee80211_vif *vif, ...@@ -864,7 +855,13 @@ mt7615_mcu_wtbl_sta_add(struct mt7615_phy *phy, struct ieee80211_vif *vif,
if (IS_ERR(sskb)) if (IS_ERR(sskb))
return PTR_ERR(sskb); return PTR_ERR(sskb);
mt76_connac_mcu_sta_basic_tlv(sskb, vif, sta, enable, true); if (!sta) {
if (mvif->sta_added)
new_entry = false;
else
mvif->sta_added = true;
}
mt76_connac_mcu_sta_basic_tlv(sskb, vif, sta, enable, new_entry);
if (enable && sta) if (enable && sta)
mt76_connac_mcu_sta_tlv(phy->mt76, sskb, sta, vif, 0, mt76_connac_mcu_sta_tlv(phy->mt76, sskb, sta, vif, 0,
MT76_STA_INFO_STATE_ASSOC); MT76_STA_INFO_STATE_ASSOC);
...@@ -1087,7 +1084,7 @@ mt7615_mcu_uni_add_beacon_offload(struct mt7615_dev *dev, ...@@ -1087,7 +1084,7 @@ mt7615_mcu_uni_add_beacon_offload(struct mt7615_dev *dev,
} }
mt7615_mac_write_txwi(dev, (__le32 *)(req.beacon_tlv.pkt), skb, mt7615_mac_write_txwi(dev, (__le32 *)(req.beacon_tlv.pkt), skb,
wcid, NULL, 0, NULL, true); wcid, NULL, 0, NULL, 0, true);
memcpy(req.beacon_tlv.pkt + MT_TXD_SIZE, skb->data, skb->len); memcpy(req.beacon_tlv.pkt + MT_TXD_SIZE, skb->data, skb->len);
req.beacon_tlv.pkt_len = cpu_to_le16(MT_TXD_SIZE + skb->len); req.beacon_tlv.pkt_len = cpu_to_le16(MT_TXD_SIZE + skb->len);
req.beacon_tlv.tim_ie_pos = cpu_to_le16(MT_TXD_SIZE + offs.tim_offset); req.beacon_tlv.tim_ie_pos = cpu_to_le16(MT_TXD_SIZE + offs.tim_offset);
...@@ -1518,7 +1515,7 @@ static int mt7615_mcu_cal_cache_apply(struct mt7615_dev *dev) ...@@ -1518,7 +1515,7 @@ static int mt7615_mcu_cal_cache_apply(struct mt7615_dev *dev)
static int mt7663_load_n9(struct mt7615_dev *dev, const char *name) static int mt7663_load_n9(struct mt7615_dev *dev, const char *name)
{ {
u32 offset = 0, override_addr = 0, flag = FW_START_DLYCAL; u32 offset = 0, override_addr = 0, flag = FW_START_DLYCAL;
const struct mt7663_fw_trailer *hdr; const struct mt76_connac2_fw_trailer *hdr;
const struct mt7663_fw_buf *buf; const struct mt7663_fw_buf *buf;
const struct firmware *fw; const struct firmware *fw;
const u8 *base_addr; const u8 *base_addr;
...@@ -1534,9 +1531,7 @@ static int mt7663_load_n9(struct mt7615_dev *dev, const char *name) ...@@ -1534,9 +1531,7 @@ static int mt7663_load_n9(struct mt7615_dev *dev, const char *name)
goto out; goto out;
} }
hdr = (const struct mt7663_fw_trailer *)(fw->data + fw->size - hdr = (const void *)(fw->data + fw->size - FW_V3_COMMON_TAILER_SIZE);
FW_V3_COMMON_TAILER_SIZE);
dev_info(dev->mt76.dev, "N9 Firmware Version: %.10s, Build Time: %.15s\n", dev_info(dev->mt76.dev, "N9 Firmware Version: %.10s, Build Time: %.15s\n",
hdr->fw_ver, hdr->build_date); hdr->fw_ver, hdr->build_date);
dev_info(dev->mt76.dev, "Region number: 0x%x\n", hdr->n_region); dev_info(dev->mt76.dev, "Region number: 0x%x\n", hdr->n_region);
...@@ -2333,7 +2328,7 @@ int mt7615_mcu_apply_rx_dcoc(struct mt7615_phy *phy) ...@@ -2333,7 +2328,7 @@ int mt7615_mcu_apply_rx_dcoc(struct mt7615_phy *phy)
.bw = mt7615_mcu_chan_bw(chandef), .bw = mt7615_mcu_chan_bw(chandef),
.band = chandef->center_freq1 > 4000, .band = chandef->center_freq1 > 4000,
.dbdc_en = !!dev->mt76.phy2, .dbdc_en = !!dev->mt76.phys[MT_BAND1],
}; };
u16 center_freq = chandef->center_freq1; u16 center_freq = chandef->center_freq1;
int freq_idx; int freq_idx;
...@@ -2454,7 +2449,7 @@ int mt7615_mcu_apply_tx_dpd(struct mt7615_phy *phy) ...@@ -2454,7 +2449,7 @@ int mt7615_mcu_apply_tx_dpd(struct mt7615_phy *phy)
.bw = mt7615_mcu_chan_bw(chandef), .bw = mt7615_mcu_chan_bw(chandef),
.band = chandef->center_freq1 > 4000, .band = chandef->center_freq1 > 4000,
.dbdc_en = !!dev->mt76.phy2, .dbdc_en = !!dev->mt76.phys[MT_BAND1],
}; };
u16 center_freq = chandef->center_freq1; u16 center_freq = chandef->center_freq1;
int freq_idx; int freq_idx;
......
...@@ -201,9 +201,6 @@ struct mt7615_mcu_rdd_report { ...@@ -201,9 +201,6 @@ struct mt7615_mcu_rdd_report {
} hw_pulse[32]; } hw_pulse[32];
}; };
#define MCU_PQ_ID(p, q) (((p) << 15) | ((q) << 10))
#define MCU_PKT_ID 0xa0
enum { enum {
MCU_ATE_SET_FREQ_OFFSET = 0xa, MCU_ATE_SET_FREQ_OFFSET = 0xa,
MCU_ATE_SET_TX_POWER_CONTROL = 0x15, MCU_ATE_SET_TX_POWER_CONTROL = 0x15,
......
...@@ -186,14 +186,14 @@ int mt7615_mmio_probe(struct device *pdev, void __iomem *mem_base, ...@@ -186,14 +186,14 @@ int mt7615_mmio_probe(struct device *pdev, void __iomem *mem_base,
{ {
static const struct mt76_driver_ops drv_ops = { static const struct mt76_driver_ops drv_ops = {
/* txwi_size = txd size + txp size */ /* txwi_size = txd size + txp size */
.txwi_size = MT_TXD_SIZE + sizeof(struct mt7615_txp_common), .txwi_size = MT_TXD_SIZE + sizeof(struct mt76_connac_txp_common),
.drv_flags = MT_DRV_TXWI_NO_FREE | MT_DRV_HW_MGMT_TXQ, .drv_flags = MT_DRV_TXWI_NO_FREE | MT_DRV_HW_MGMT_TXQ,
.survey_flags = SURVEY_INFO_TIME_TX | .survey_flags = SURVEY_INFO_TIME_TX |
SURVEY_INFO_TIME_RX | SURVEY_INFO_TIME_RX |
SURVEY_INFO_TIME_BSS_RX, SURVEY_INFO_TIME_BSS_RX,
.token_size = MT7615_TOKEN_SIZE, .token_size = MT7615_TOKEN_SIZE,
.tx_prepare_skb = mt7615_tx_prepare_skb, .tx_prepare_skb = mt7615_tx_prepare_skb,
.tx_complete_skb = mt7615_tx_complete_skb, .tx_complete_skb = mt76_connac_tx_complete_skb,
.rx_check = mt7615_rx_check, .rx_check = mt7615_rx_check,
.rx_skb = mt7615_queue_rx_skb, .rx_skb = mt7615_queue_rx_skb,
.rx_poll_complete = mt7615_rx_poll_complete, .rx_poll_complete = mt7615_rx_poll_complete,
......
...@@ -141,6 +141,7 @@ struct mt7615_sta { ...@@ -141,6 +141,7 @@ struct mt7615_sta {
struct mt7615_vif { struct mt7615_vif {
struct mt76_vif mt76; /* must be first */ struct mt76_vif mt76; /* must be first */
struct mt7615_sta sta; struct mt7615_sta sta;
bool sta_added;
}; };
struct mib_stats { struct mib_stats {
...@@ -177,7 +178,6 @@ struct mt7615_phy { ...@@ -177,7 +178,6 @@ struct mt7615_phy {
u8 chfreq; u8 chfreq;
u8 rdd_state; u8 rdd_state;
int dfs_state;
u32 rx_ampdu_ts; u32 rx_ampdu_ts;
u32 ampdu_ref; u32 ampdu_ref;
...@@ -345,7 +345,7 @@ mt7615_hw_dev(struct ieee80211_hw *hw) ...@@ -345,7 +345,7 @@ mt7615_hw_dev(struct ieee80211_hw *hw)
static inline struct mt7615_phy * static inline struct mt7615_phy *
mt7615_ext_phy(struct mt7615_dev *dev) mt7615_ext_phy(struct mt7615_dev *dev)
{ {
struct mt76_phy *phy = dev->mt76.phy2; struct mt76_phy *phy = dev->mt76.phys[MT_BAND1];
if (!phy) if (!phy)
return NULL; return NULL;
...@@ -477,7 +477,8 @@ void mt7615_mac_sta_poll(struct mt7615_dev *dev); ...@@ -477,7 +477,8 @@ void mt7615_mac_sta_poll(struct mt7615_dev *dev);
int mt7615_mac_write_txwi(struct mt7615_dev *dev, __le32 *txwi, int mt7615_mac_write_txwi(struct mt7615_dev *dev, __le32 *txwi,
struct sk_buff *skb, struct mt76_wcid *wcid, struct sk_buff *skb, struct mt76_wcid *wcid,
struct ieee80211_sta *sta, int pid, struct ieee80211_sta *sta, int pid,
struct ieee80211_key_conf *key, bool beacon); struct ieee80211_key_conf *key,
enum mt76_txq_id qid, bool beacon);
void mt7615_mac_set_timing(struct mt7615_phy *phy); void mt7615_mac_set_timing(struct mt7615_phy *phy);
int __mt7615_mac_wtbl_set_key(struct mt7615_dev *dev, int __mt7615_mac_wtbl_set_key(struct mt7615_dev *dev,
struct mt76_wcid *wcid, struct mt76_wcid *wcid,
...@@ -507,7 +508,6 @@ int mt7615_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr, ...@@ -507,7 +508,6 @@ int mt7615_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
struct mt76_tx_info *tx_info); struct mt76_tx_info *tx_info);
void mt7615_tx_worker(struct mt76_worker *w); void mt7615_tx_worker(struct mt76_worker *w);
void mt7615_tx_complete_skb(struct mt76_dev *mdev, struct mt76_queue_entry *e);
void mt7615_tx_token_put(struct mt7615_dev *dev); void mt7615_tx_token_put(struct mt7615_dev *dev);
bool mt7615_rx_check(struct mt76_dev *mdev, void *data, int len); bool mt7615_rx_check(struct mt76_dev *mdev, void *data, int len);
void mt7615_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q, void mt7615_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q,
...@@ -518,8 +518,6 @@ int mt7615_mac_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif, ...@@ -518,8 +518,6 @@ int mt7615_mac_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif,
void mt7615_mac_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif, void mt7615_mac_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif,
struct ieee80211_sta *sta); struct ieee80211_sta *sta);
void mt7615_mac_work(struct work_struct *work); void mt7615_mac_work(struct work_struct *work);
void mt7615_txp_skb_unmap(struct mt76_dev *dev,
struct mt76_txwi_cache *txwi);
int mt7615_mcu_set_rx_hdr_trans_blacklist(struct mt7615_dev *dev); int mt7615_mcu_set_rx_hdr_trans_blacklist(struct mt7615_dev *dev);
int mt7615_mcu_set_fcc5_lpn(struct mt7615_dev *dev, int val); int mt7615_mcu_set_fcc5_lpn(struct mt7615_dev *dev, int val);
int mt7615_mcu_set_pulse_th(struct mt7615_dev *dev, int mt7615_mcu_set_pulse_th(struct mt7615_dev *dev,
......
...@@ -14,75 +14,6 @@ ...@@ -14,75 +14,6 @@
#include "../dma.h" #include "../dma.h"
#include "mac.h" #include "mac.h"
void mt7615_tx_complete_skb(struct mt76_dev *mdev, struct mt76_queue_entry *e)
{
if (!e->txwi) {
dev_kfree_skb_any(e->skb);
return;
}
/* error path */
if (e->skb == DMA_DUMMY_DATA) {
struct mt76_txwi_cache *t;
struct mt7615_dev *dev;
struct mt7615_txp_common *txp;
u16 token;
dev = container_of(mdev, struct mt7615_dev, mt76);
txp = mt7615_txwi_to_txp(mdev, e->txwi);
if (is_mt7615(&dev->mt76))
token = le16_to_cpu(txp->fw.token);
else
token = le16_to_cpu(txp->hw.msdu_id[0]) &
~MT_MSDU_ID_VALID;
t = mt76_token_put(mdev, token);
e->skb = t ? t->skb : NULL;
}
if (e->skb)
mt76_tx_complete_skb(mdev, e->wcid, e->skb);
}
static void
mt7615_write_hw_txp(struct mt7615_dev *dev, struct mt76_tx_info *tx_info,
void *txp_ptr, u32 id)
{
struct mt7615_hw_txp *txp = txp_ptr;
struct mt7615_txp_ptr *ptr = &txp->ptr[0];
int i, nbuf = tx_info->nbuf - 1;
u32 last_mask;
tx_info->buf[0].len = MT_TXD_SIZE + sizeof(*txp);
tx_info->nbuf = 1;
txp->msdu_id[0] = cpu_to_le16(id | MT_MSDU_ID_VALID);
if (is_mt7663(&dev->mt76))
last_mask = MT_TXD_LEN_LAST;
else
last_mask = MT_TXD_LEN_AMSDU_LAST |
MT_TXD_LEN_MSDU_LAST;
for (i = 0; i < nbuf; i++) {
u16 len = tx_info->buf[i + 1].len & MT_TXD_LEN_MASK;
u32 addr = tx_info->buf[i + 1].addr;
if (i == nbuf - 1)
len |= last_mask;
if (i & 1) {
ptr->buf1 = cpu_to_le32(addr);
ptr->len1 = cpu_to_le16(len);
ptr++;
} else {
ptr->buf0 = cpu_to_le32(addr);
ptr->len0 = cpu_to_le16(len);
}
}
}
static void static void
mt7615_write_fw_txp(struct mt7615_dev *dev, struct mt76_tx_info *tx_info, mt7615_write_fw_txp(struct mt7615_dev *dev, struct mt76_tx_info *tx_info,
void *txp_ptr, u32 id) void *txp_ptr, u32 id)
...@@ -91,7 +22,8 @@ mt7615_write_fw_txp(struct mt7615_dev *dev, struct mt76_tx_info *tx_info, ...@@ -91,7 +22,8 @@ mt7615_write_fw_txp(struct mt7615_dev *dev, struct mt76_tx_info *tx_info,
struct ieee80211_tx_info *info = IEEE80211_SKB_CB(tx_info->skb); struct ieee80211_tx_info *info = IEEE80211_SKB_CB(tx_info->skb);
struct ieee80211_key_conf *key = info->control.hw_key; struct ieee80211_key_conf *key = info->control.hw_key;
struct ieee80211_vif *vif = info->control.vif; struct ieee80211_vif *vif = info->control.vif;
struct mt7615_fw_txp *txp = txp_ptr; struct mt76_connac_fw_txp *txp = txp_ptr;
u8 *rept_wds_wcid = (u8 *)&txp->rept_wds_wcid;
int nbuf = tx_info->nbuf - 1; int nbuf = tx_info->nbuf - 1;
int i; int i;
...@@ -122,7 +54,7 @@ mt7615_write_fw_txp(struct mt7615_dev *dev, struct mt76_tx_info *tx_info, ...@@ -122,7 +54,7 @@ mt7615_write_fw_txp(struct mt7615_dev *dev, struct mt76_tx_info *tx_info,
} }
txp->token = cpu_to_le16(id); txp->token = cpu_to_le16(id);
txp->rept_wds_wcid = 0xff; *rept_wds_wcid = 0xff;
} }
int mt7615_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr, int mt7615_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
...@@ -145,9 +77,10 @@ int mt7615_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr, ...@@ -145,9 +77,10 @@ int mt7615_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
if ((info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE) && msta) { if ((info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE) && msta) {
struct mt7615_phy *phy = &dev->phy; struct mt7615_phy *phy = &dev->phy;
u8 phy_idx = (info->hw_queue & MT_TX_HW_QUEUE_PHY) >> 2;
if ((info->hw_queue & MT_TX_HW_QUEUE_EXT_PHY) && mdev->phy2) if (phy_idx && mdev->phys[MT_BAND1])
phy = mdev->phy2->priv; phy = mdev->phys[MT_BAND1]->priv;
spin_lock_bh(&dev->mt76.lock); spin_lock_bh(&dev->mt76.lock);
mt7615_mac_set_rates(phy, msta, &info->control.rates[0], mt7615_mac_set_rates(phy, msta, &info->control.rates[0],
...@@ -164,14 +97,14 @@ int mt7615_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr, ...@@ -164,14 +97,14 @@ int mt7615_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
pid = mt76_tx_status_skb_add(mdev, wcid, tx_info->skb); pid = mt76_tx_status_skb_add(mdev, wcid, tx_info->skb);
mt7615_mac_write_txwi(dev, txwi_ptr, tx_info->skb, wcid, sta, mt7615_mac_write_txwi(dev, txwi_ptr, tx_info->skb, wcid, sta,
pid, key, false); pid, key, qid, false);
txp = txwi + MT_TXD_SIZE; txp = txwi + MT_TXD_SIZE;
memset(txp, 0, sizeof(struct mt7615_txp_common)); memset(txp, 0, sizeof(struct mt76_connac_txp_common));
if (is_mt7615(&dev->mt76)) if (is_mt7615(&dev->mt76))
mt7615_write_fw_txp(dev, tx_info, txp, id); mt7615_write_fw_txp(dev, tx_info, txp, id);
else else
mt7615_write_hw_txp(dev, tx_info, txp, id); mt76_connac_write_hw_txp(mdev, tx_info, txp, id);
tx_info->skb = DMA_DUMMY_DATA; tx_info->skb = DMA_DUMMY_DATA;
...@@ -250,16 +183,18 @@ mt7615_update_vif_beacon(void *priv, u8 *mac, struct ieee80211_vif *vif) ...@@ -250,16 +183,18 @@ mt7615_update_vif_beacon(void *priv, u8 *mac, struct ieee80211_vif *vif)
static void static void
mt7615_update_beacons(struct mt7615_dev *dev) mt7615_update_beacons(struct mt7615_dev *dev)
{ {
struct mt76_phy *mphy_ext = dev->mt76.phys[MT_BAND1];
ieee80211_iterate_active_interfaces(dev->mt76.hw, ieee80211_iterate_active_interfaces(dev->mt76.hw,
IEEE80211_IFACE_ITER_RESUME_ALL, IEEE80211_IFACE_ITER_RESUME_ALL,
mt7615_update_vif_beacon, dev->mt76.hw); mt7615_update_vif_beacon, dev->mt76.hw);
if (!dev->mt76.phy2) if (!mphy_ext)
return; return;
ieee80211_iterate_active_interfaces(dev->mt76.phy2->hw, ieee80211_iterate_active_interfaces(mphy_ext->hw,
IEEE80211_IFACE_ITER_RESUME_ALL, IEEE80211_IFACE_ITER_RESUME_ALL,
mt7615_update_vif_beacon, dev->mt76.phy2->hw); mt7615_update_vif_beacon, mphy_ext->hw);
} }
void mt7615_mac_reset_work(struct work_struct *work) void mt7615_mac_reset_work(struct work_struct *work)
...@@ -268,9 +203,10 @@ void mt7615_mac_reset_work(struct work_struct *work) ...@@ -268,9 +203,10 @@ void mt7615_mac_reset_work(struct work_struct *work)
struct mt76_phy *ext_phy; struct mt76_phy *ext_phy;
struct mt7615_dev *dev; struct mt7615_dev *dev;
unsigned long timeout; unsigned long timeout;
int i;
dev = container_of(work, struct mt7615_dev, reset_work); dev = container_of(work, struct mt7615_dev, reset_work);
ext_phy = dev->mt76.phy2; ext_phy = dev->mt76.phys[MT_BAND1];
phy2 = ext_phy ? ext_phy->priv : NULL; phy2 = ext_phy ? ext_phy->priv : NULL;
if (!(READ_ONCE(dev->reset_state) & MT_MCU_CMD_STOP_PDMA)) if (!(READ_ONCE(dev->reset_state) & MT_MCU_CMD_STOP_PDMA))
...@@ -299,8 +235,8 @@ void mt7615_mac_reset_work(struct work_struct *work) ...@@ -299,8 +235,8 @@ void mt7615_mac_reset_work(struct work_struct *work)
mt76_txq_schedule_all(ext_phy); mt76_txq_schedule_all(ext_phy);
mt76_worker_disable(&dev->mt76.tx_worker); mt76_worker_disable(&dev->mt76.tx_worker);
napi_disable(&dev->mt76.napi[0]); mt76_for_each_q_rx(&dev->mt76, i)
napi_disable(&dev->mt76.napi[1]); napi_disable(&dev->mt76.napi[i]);
napi_disable(&dev->mt76.tx_napi); napi_disable(&dev->mt76.tx_napi);
mt7615_mutex_acquire(dev); mt7615_mutex_acquire(dev);
...@@ -330,11 +266,10 @@ void mt7615_mac_reset_work(struct work_struct *work) ...@@ -330,11 +266,10 @@ void mt7615_mac_reset_work(struct work_struct *work)
napi_enable(&dev->mt76.tx_napi); napi_enable(&dev->mt76.tx_napi);
napi_schedule(&dev->mt76.tx_napi); napi_schedule(&dev->mt76.tx_napi);
napi_enable(&dev->mt76.napi[0]); mt76_for_each_q_rx(&dev->mt76, i) {
napi_schedule(&dev->mt76.napi[0]); napi_enable(&dev->mt76.napi[i]);
napi_schedule(&dev->mt76.napi[i]);
napi_enable(&dev->mt76.napi[1]); }
napi_schedule(&dev->mt76.napi[1]);
local_bh_enable(); local_bh_enable();
ieee80211_wake_queues(mt76_hw(dev)); ieee80211_wake_queues(mt76_hw(dev));
......
...@@ -49,7 +49,7 @@ mt7663_usb_sdio_write_txwi(struct mt7615_dev *dev, struct mt76_wcid *wcid, ...@@ -49,7 +49,7 @@ mt7663_usb_sdio_write_txwi(struct mt7615_dev *dev, struct mt76_wcid *wcid,
__le32 *txwi = (__le32 *)(skb->data - MT_USB_TXD_SIZE); __le32 *txwi = (__le32 *)(skb->data - MT_USB_TXD_SIZE);
memset(txwi, 0, MT_USB_TXD_SIZE); memset(txwi, 0, MT_USB_TXD_SIZE);
mt7615_mac_write_txwi(dev, txwi, skb, wcid, sta, pid, key, false); mt7615_mac_write_txwi(dev, txwi, skb, wcid, sta, pid, key, qid, false);
skb_push(skb, MT_USB_TXD_SIZE); skb_push(skb, MT_USB_TXD_SIZE);
} }
......
...@@ -12,9 +12,28 @@ ...@@ -12,9 +12,28 @@
#define MT76_CONNAC_MAX_SCHED_SCAN_SSID 10 #define MT76_CONNAC_MAX_SCHED_SCAN_SSID 10
#define MT76_CONNAC_MAX_SCAN_MATCH 16 #define MT76_CONNAC_MAX_SCAN_MATCH 16
#define MT76_CONNAC_MAX_WMM_SETS 4
#define MT76_CONNAC_COREDUMP_TIMEOUT (HZ / 20) #define MT76_CONNAC_COREDUMP_TIMEOUT (HZ / 20)
#define MT76_CONNAC_COREDUMP_SZ (1300 * 1024) #define MT76_CONNAC_COREDUMP_SZ (1300 * 1024)
#define MT_TXD_SIZE (8 * 4)
#define MT_USB_TXD_SIZE (MT_TXD_SIZE + 8 * 4)
#define MT_USB_HDR_SIZE 4
#define MT_USB_TAIL_SIZE 4
#define MT_SDIO_TXD_SIZE (MT_TXD_SIZE + 8 * 4)
#define MT_SDIO_TAIL_SIZE 8
#define MT_SDIO_HDR_SIZE 4
#define MT_MSDU_ID_VALID BIT(15)
#define MT_TXD_LEN_LAST BIT(15)
#define MT_TXD_LEN_MASK GENMASK(11, 0)
#define MT_TXD_LEN_MSDU_LAST BIT(14)
#define MT_TXD_LEN_AMSDU_LAST BIT(15)
enum { enum {
CMD_CBW_20MHZ = IEEE80211_STA_RX_BW_20, CMD_CBW_20MHZ = IEEE80211_STA_RX_BW_20,
CMD_CBW_40MHZ = IEEE80211_STA_RX_BW_40, CMD_CBW_40MHZ = IEEE80211_STA_RX_BW_40,
...@@ -90,6 +109,46 @@ struct mt76_connac_sta_key_conf { ...@@ -90,6 +109,46 @@ struct mt76_connac_sta_key_conf {
u8 key[16]; u8 key[16];
}; };
#define MT_TXP_MAX_BUF_NUM 6
struct mt76_connac_fw_txp {
__le16 flags;
__le16 token;
u8 bss_idx;
__le16 rept_wds_wcid;
u8 nbuf;
__le32 buf[MT_TXP_MAX_BUF_NUM];
__le16 len[MT_TXP_MAX_BUF_NUM];
} __packed __aligned(4);
#define MT_HW_TXP_MAX_MSDU_NUM 4
#define MT_HW_TXP_MAX_BUF_NUM 4
struct mt76_connac_txp_ptr {
__le32 buf0;
__le16 len0;
__le16 len1;
__le32 buf1;
} __packed __aligned(4);
struct mt76_connac_hw_txp {
__le16 msdu_id[MT_HW_TXP_MAX_MSDU_NUM];
struct mt76_connac_txp_ptr ptr[MT_HW_TXP_MAX_BUF_NUM / 2];
} __packed __aligned(4);
struct mt76_connac_txp_common {
union {
struct mt76_connac_fw_txp fw;
struct mt76_connac_hw_txp hw;
};
};
struct mt76_connac_tx_free {
__le16 rx_byte_cnt;
__le16 ctrl;
__le32 txd;
} __packed __aligned(4);
extern const struct wiphy_wowlan_support mt76_connac_wowlan_support; extern const struct wiphy_wowlan_support mt76_connac_wowlan_support;
static inline bool is_mt7922(struct mt76_dev *dev) static inline bool is_mt7922(struct mt76_dev *dev)
...@@ -145,6 +204,19 @@ static inline bool is_connac_v1(struct mt76_dev *dev) ...@@ -145,6 +204,19 @@ static inline bool is_connac_v1(struct mt76_dev *dev)
return is_mt7615(dev) || is_mt7663(dev) || is_mt7622(dev); return is_mt7615(dev) || is_mt7663(dev) || is_mt7622(dev);
} }
static inline bool is_mt76_fw_txp(struct mt76_dev *dev)
{
switch (mt76_chip(dev)) {
case 0x7961:
case 0x7922:
case 0x7663:
case 0x7622:
return false;
default:
return true;
}
}
static inline u8 mt76_connac_chan_bw(struct cfg80211_chan_def *chandef) static inline u8 mt76_connac_chan_bw(struct cfg80211_chan_def *chandef)
{ {
static const u8 width_to_bw[] = { static const u8 width_to_bw[] = {
...@@ -170,12 +242,31 @@ static inline u8 mt76_connac_lmac_mapping(u8 ac) ...@@ -170,12 +242,31 @@ static inline u8 mt76_connac_lmac_mapping(u8 ac)
return 3 - ac; return 3 - ac;
} }
static inline void *
mt76_connac_txwi_to_txp(struct mt76_dev *dev, struct mt76_txwi_cache *t)
{
u8 *txwi;
if (!t)
return NULL;
txwi = mt76_get_txwi_ptr(dev, t);
return (void *)(txwi + MT_TXD_SIZE);
}
int mt76_connac_pm_wake(struct mt76_phy *phy, struct mt76_connac_pm *pm); int mt76_connac_pm_wake(struct mt76_phy *phy, struct mt76_connac_pm *pm);
void mt76_connac_power_save_sched(struct mt76_phy *phy, void mt76_connac_power_save_sched(struct mt76_phy *phy,
struct mt76_connac_pm *pm); struct mt76_connac_pm *pm);
void mt76_connac_free_pending_tx_skbs(struct mt76_connac_pm *pm, void mt76_connac_free_pending_tx_skbs(struct mt76_connac_pm *pm,
struct mt76_wcid *wcid); struct mt76_wcid *wcid);
static inline void mt76_connac_tx_cleanup(struct mt76_dev *dev)
{
dev->queue_ops->tx_cleanup(dev, dev->q_mcu[MT_MCUQ_WM], false);
dev->queue_ops->tx_cleanup(dev, dev->q_mcu[MT_MCUQ_WA], false);
}
static inline bool static inline bool
mt76_connac_pm_ref(struct mt76_phy *phy, struct mt76_connac_pm *pm) mt76_connac_pm_ref(struct mt76_phy *phy, struct mt76_connac_pm *pm)
{ {
...@@ -238,11 +329,36 @@ mt76_connac_mutex_release(struct mt76_dev *dev, struct mt76_connac_pm *pm) ...@@ -238,11 +329,36 @@ mt76_connac_mutex_release(struct mt76_dev *dev, struct mt76_connac_pm *pm)
mutex_unlock(&dev->mutex); mutex_unlock(&dev->mutex);
} }
int mt76_connac_init_tx_queues(struct mt76_phy *phy, int idx, int n_desc,
int ring_base, u32 flags);
void mt76_connac_write_hw_txp(struct mt76_dev *dev,
struct mt76_tx_info *tx_info,
void *txp_ptr, u32 id);
void mt76_connac_txp_skb_unmap(struct mt76_dev *dev,
struct mt76_txwi_cache *txwi);
void mt76_connac_tx_complete_skb(struct mt76_dev *mdev,
struct mt76_queue_entry *e);
void mt76_connac_pm_queue_skb(struct ieee80211_hw *hw, void mt76_connac_pm_queue_skb(struct ieee80211_hw *hw,
struct mt76_connac_pm *pm, struct mt76_connac_pm *pm,
struct mt76_wcid *wcid, struct mt76_wcid *wcid,
struct sk_buff *skb); struct sk_buff *skb);
void mt76_connac_pm_dequeue_skbs(struct mt76_phy *phy, void mt76_connac_pm_dequeue_skbs(struct mt76_phy *phy,
struct mt76_connac_pm *pm); struct mt76_connac_pm *pm);
void mt76_connac2_mac_write_txwi(struct mt76_dev *dev, __le32 *txwi,
struct sk_buff *skb, struct mt76_wcid *wcid,
struct ieee80211_key_conf *key, int pid,
enum mt76_txq_id qid, u32 changed);
bool mt76_connac2_mac_add_txs_skb(struct mt76_dev *dev, struct mt76_wcid *wcid,
int pid, __le32 *txs_data,
struct mt76_sta_stats *stats);
void mt76_connac2_mac_decode_he_radiotap(struct mt76_dev *dev,
struct sk_buff *skb,
__le32 *rxv, u32 mode);
int mt76_connac2_reverse_frag0_hdr_trans(struct ieee80211_vif *vif,
struct sk_buff *skb, u16 hdr_offset);
int mt76_connac2_mac_fill_rx_rate(struct mt76_dev *dev,
struct mt76_rx_status *status,
struct ieee80211_supported_band *sband,
__le32 *rxv, u8 *mode);
#endif /* __MT76_CONNAC_H */ #endif /* __MT76_CONNAC_H */
This diff is collapsed.
// SPDX-License-Identifier: ISC // SPDX-License-Identifier: ISC
/* Copyright (C) 2020 MediaTek Inc. */ /* Copyright (C) 2020 MediaTek Inc. */
#include <linux/firmware.h>
#include "mt76_connac2_mac.h"
#include "mt76_connac_mcu.h" #include "mt76_connac_mcu.h"
int mt76_connac_mcu_start_firmware(struct mt76_dev *dev, u32 addr, u32 option) int mt76_connac_mcu_start_firmware(struct mt76_dev *dev, u32 addr, u32 option)
...@@ -1403,6 +1405,8 @@ int mt76_connac_mcu_uni_add_bss(struct mt76_phy *phy, ...@@ -1403,6 +1405,8 @@ int mt76_connac_mcu_uni_add_bss(struct mt76_phy *phy,
else else
conn_type = CONNECTION_INFRA_AP; conn_type = CONNECTION_INFRA_AP;
basic_req.basic.conn_type = cpu_to_le32(conn_type); basic_req.basic.conn_type = cpu_to_le32(conn_type);
/* Fully active/deactivate BSS network in AP mode only */
basic_req.basic.active = enable;
break; break;
case NL80211_IFTYPE_STATION: case NL80211_IFTYPE_STATION:
if (vif->p2p) if (vif->p2p)
...@@ -2808,5 +2812,304 @@ int mt76_connac_mcu_rdd_cmd(struct mt76_dev *dev, int cmd, u8 index, ...@@ -2808,5 +2812,304 @@ int mt76_connac_mcu_rdd_cmd(struct mt76_dev *dev, int cmd, u8 index,
} }
EXPORT_SYMBOL_GPL(mt76_connac_mcu_rdd_cmd); EXPORT_SYMBOL_GPL(mt76_connac_mcu_rdd_cmd);
static int
mt76_connac_mcu_send_ram_firmware(struct mt76_dev *dev,
const struct mt76_connac2_fw_trailer *hdr,
const u8 *data, bool is_wa)
{
int i, offset = 0, max_len = mt76_is_sdio(dev) ? 2048 : 4096;
u32 override = 0, option = 0;
for (i = 0; i < hdr->n_region; i++) {
const struct mt76_connac2_fw_region *region;
u32 len, addr, mode;
int err;
region = (const void *)((const u8 *)hdr -
(hdr->n_region - i) * sizeof(*region));
mode = mt76_connac_mcu_gen_dl_mode(dev, region->feature_set,
is_wa);
len = le32_to_cpu(region->len);
addr = le32_to_cpu(region->addr);
if (region->feature_set & FW_FEATURE_OVERRIDE_ADDR)
override = addr;
err = mt76_connac_mcu_init_download(dev, addr, len, mode);
if (err) {
dev_err(dev->dev, "Download request failed\n");
return err;
}
err = __mt76_mcu_send_firmware(dev, MCU_CMD(FW_SCATTER),
data + offset, len, max_len);
if (err) {
dev_err(dev->dev, "Failed to send firmware.\n");
return err;
}
offset += len;
}
if (override)
option |= FW_START_OVERRIDE;
if (is_wa)
option |= FW_START_WORKING_PDA_CR4;
return mt76_connac_mcu_start_firmware(dev, override, option);
}
int mt76_connac2_load_ram(struct mt76_dev *dev, const char *fw_wm,
const char *fw_wa)
{
const struct mt76_connac2_fw_trailer *hdr;
const struct firmware *fw;
int ret;
ret = request_firmware(&fw, fw_wm, dev->dev);
if (ret)
return ret;
if (!fw || !fw->data || fw->size < sizeof(*hdr)) {
dev_err(dev->dev, "Invalid firmware\n");
ret = -EINVAL;
goto out;
}
hdr = (const void *)(fw->data + fw->size - sizeof(*hdr));
dev_info(dev->dev, "WM Firmware Version: %.10s, Build Time: %.15s\n",
hdr->fw_ver, hdr->build_date);
ret = mt76_connac_mcu_send_ram_firmware(dev, hdr, fw->data, false);
if (ret) {
dev_err(dev->dev, "Failed to start WM firmware\n");
goto out;
}
release_firmware(fw);
if (!fw_wa)
return 0;
ret = request_firmware(&fw, fw_wa, dev->dev);
if (ret)
return ret;
if (!fw || !fw->data || fw->size < sizeof(*hdr)) {
dev_err(dev->dev, "Invalid firmware\n");
ret = -EINVAL;
goto out;
}
hdr = (const void *)(fw->data + fw->size - sizeof(*hdr));
dev_info(dev->dev, "WA Firmware Version: %.10s, Build Time: %.15s\n",
hdr->fw_ver, hdr->build_date);
ret = mt76_connac_mcu_send_ram_firmware(dev, hdr, fw->data, true);
if (ret) {
dev_err(dev->dev, "Failed to start WA firmware\n");
goto out;
}
snprintf(dev->hw->wiphy->fw_version,
sizeof(dev->hw->wiphy->fw_version),
"%.10s-%.15s", hdr->fw_ver, hdr->build_date);
out:
release_firmware(fw);
return ret;
}
EXPORT_SYMBOL_GPL(mt76_connac2_load_ram);
static u32 mt76_connac2_get_data_mode(struct mt76_dev *dev, u32 info)
{
u32 mode = DL_MODE_NEED_RSP;
if (!is_mt7921(dev) || info == PATCH_SEC_NOT_SUPPORT)
return mode;
switch (FIELD_GET(PATCH_SEC_ENC_TYPE_MASK, info)) {
case PATCH_SEC_ENC_TYPE_PLAIN:
break;
case PATCH_SEC_ENC_TYPE_AES:
mode |= DL_MODE_ENCRYPT;
mode |= FIELD_PREP(DL_MODE_KEY_IDX,
(info & PATCH_SEC_ENC_AES_KEY_MASK)) & DL_MODE_KEY_IDX;
mode |= DL_MODE_RESET_SEC_IV;
break;
case PATCH_SEC_ENC_TYPE_SCRAMBLE:
mode |= DL_MODE_ENCRYPT;
mode |= DL_CONFIG_ENCRY_MODE_SEL;
mode |= DL_MODE_RESET_SEC_IV;
break;
default:
dev_err(dev->dev, "Encryption type not support!\n");
}
return mode;
}
int mt76_connac2_load_patch(struct mt76_dev *dev, const char *fw_name)
{
int i, ret, sem, max_len = mt76_is_sdio(dev) ? 2048 : 4096;
const struct mt76_connac2_patch_hdr *hdr;
const struct firmware *fw = NULL;
sem = mt76_connac_mcu_patch_sem_ctrl(dev, true);
switch (sem) {
case PATCH_IS_DL:
return 0;
case PATCH_NOT_DL_SEM_SUCCESS:
break;
default:
dev_err(dev->dev, "Failed to get patch semaphore\n");
return -EAGAIN;
}
ret = request_firmware(&fw, fw_name, dev->dev);
if (ret)
goto out;
if (!fw || !fw->data || fw->size < sizeof(*hdr)) {
dev_err(dev->dev, "Invalid firmware\n");
ret = -EINVAL;
goto out;
}
hdr = (const void *)fw->data;
dev_info(dev->dev, "HW/SW Version: 0x%x, Build Time: %.16s\n",
be32_to_cpu(hdr->hw_sw_ver), hdr->build_date);
for (i = 0; i < be32_to_cpu(hdr->desc.n_region); i++) {
struct mt76_connac2_patch_sec *sec;
u32 len, addr, mode;
const u8 *dl;
u32 sec_info;
sec = (void *)(fw->data + sizeof(*hdr) + i * sizeof(*sec));
if ((be32_to_cpu(sec->type) & PATCH_SEC_TYPE_MASK) !=
PATCH_SEC_TYPE_INFO) {
ret = -EINVAL;
goto out;
}
addr = be32_to_cpu(sec->info.addr);
len = be32_to_cpu(sec->info.len);
dl = fw->data + be32_to_cpu(sec->offs);
sec_info = be32_to_cpu(sec->info.sec_key_idx);
mode = mt76_connac2_get_data_mode(dev, sec_info);
ret = mt76_connac_mcu_init_download(dev, addr, len, mode);
if (ret) {
dev_err(dev->dev, "Download request failed\n");
goto out;
}
ret = __mt76_mcu_send_firmware(dev, MCU_CMD(FW_SCATTER),
dl, len, max_len);
if (ret) {
dev_err(dev->dev, "Failed to send patch\n");
goto out;
}
}
ret = mt76_connac_mcu_start_patch(dev);
if (ret)
dev_err(dev->dev, "Failed to start patch\n");
out:
sem = mt76_connac_mcu_patch_sem_ctrl(dev, false);
switch (sem) {
case PATCH_REL_SEM_SUCCESS:
break;
default:
ret = -EAGAIN;
dev_err(dev->dev, "Failed to release patch semaphore\n");
break;
}
release_firmware(fw);
return ret;
}
EXPORT_SYMBOL_GPL(mt76_connac2_load_patch);
int mt76_connac2_mcu_fill_message(struct mt76_dev *dev, struct sk_buff *skb,
int cmd, int *wait_seq)
{
int txd_len, mcu_cmd = FIELD_GET(__MCU_CMD_FIELD_ID, cmd);
struct mt76_connac2_mcu_uni_txd *uni_txd;
struct mt76_connac2_mcu_txd *mcu_txd;
__le32 *txd;
u32 val;
u8 seq;
/* TODO: make dynamic based on msg type */
dev->mcu.timeout = 20 * HZ;
seq = ++dev->mcu.msg_seq & 0xf;
if (!seq)
seq = ++dev->mcu.msg_seq & 0xf;
if (cmd == MCU_CMD(FW_SCATTER))
goto exit;
txd_len = cmd & __MCU_CMD_FIELD_UNI ? sizeof(*uni_txd) : sizeof(*mcu_txd);
txd = (__le32 *)skb_push(skb, txd_len);
val = FIELD_PREP(MT_TXD0_TX_BYTES, skb->len) |
FIELD_PREP(MT_TXD0_PKT_FMT, MT_TX_TYPE_CMD) |
FIELD_PREP(MT_TXD0_Q_IDX, MT_TX_MCU_PORT_RX_Q0);
txd[0] = cpu_to_le32(val);
val = MT_TXD1_LONG_FORMAT |
FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_CMD);
txd[1] = cpu_to_le32(val);
if (cmd & __MCU_CMD_FIELD_UNI) {
uni_txd = (struct mt76_connac2_mcu_uni_txd *)txd;
uni_txd->len = cpu_to_le16(skb->len - sizeof(uni_txd->txd));
uni_txd->option = MCU_CMD_UNI_EXT_ACK;
uni_txd->cid = cpu_to_le16(mcu_cmd);
uni_txd->s2d_index = MCU_S2D_H2N;
uni_txd->pkt_type = MCU_PKT_ID;
uni_txd->seq = seq;
goto exit;
}
mcu_txd = (struct mt76_connac2_mcu_txd *)txd;
mcu_txd->len = cpu_to_le16(skb->len - sizeof(mcu_txd->txd));
mcu_txd->pq_id = cpu_to_le16(MCU_PQ_ID(MT_TX_PORT_IDX_MCU,
MT_TX_MCU_PORT_RX_Q0));
mcu_txd->pkt_type = MCU_PKT_ID;
mcu_txd->seq = seq;
mcu_txd->cid = mcu_cmd;
mcu_txd->ext_cid = FIELD_GET(__MCU_CMD_FIELD_EXT_ID, cmd);
if (mcu_txd->ext_cid || (cmd & __MCU_CMD_FIELD_CE)) {
if (cmd & __MCU_CMD_FIELD_QUERY)
mcu_txd->set_query = MCU_Q_QUERY;
else
mcu_txd->set_query = MCU_Q_SET;
mcu_txd->ext_cid_ack = !!mcu_txd->ext_cid;
} else {
mcu_txd->set_query = MCU_Q_NA;
}
if (cmd & __MCU_CMD_FIELD_WA)
mcu_txd->s2d_index = MCU_S2D_H2C;
else
mcu_txd->s2d_index = MCU_S2D_H2N;
exit:
if (wait_seq)
*wait_seq = seq;
return 0;
}
EXPORT_SYMBOL_GPL(mt76_connac2_mcu_fill_message);
MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>"); MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>");
MODULE_LICENSE("Dual BSD/GPL"); MODULE_LICENSE("Dual BSD/GPL");
...@@ -26,6 +26,157 @@ ...@@ -26,6 +26,157 @@
#define PATCH_SEC_TYPE_MASK GENMASK(15, 0) #define PATCH_SEC_TYPE_MASK GENMASK(15, 0)
#define PATCH_SEC_TYPE_INFO 0x2 #define PATCH_SEC_TYPE_INFO 0x2
#define PATCH_SEC_ENC_TYPE_MASK GENMASK(31, 24)
#define PATCH_SEC_ENC_TYPE_PLAIN 0x00
#define PATCH_SEC_ENC_TYPE_AES 0x01
#define PATCH_SEC_ENC_TYPE_SCRAMBLE 0x02
#define PATCH_SEC_ENC_SCRAMBLE_INFO_MASK GENMASK(15, 0)
#define PATCH_SEC_ENC_AES_KEY_MASK GENMASK(7, 0)
#define MCU_PQ_ID(p, q) (((p) << 15) | ((q) << 10))
#define MCU_PKT_ID 0xa0
struct mt76_connac2_mcu_txd {
__le32 txd[8];
__le16 len;
__le16 pq_id;
u8 cid;
u8 pkt_type;
u8 set_query; /* FW don't care */
u8 seq;
u8 uc_d2b0_rev;
u8 ext_cid;
u8 s2d_index;
u8 ext_cid_ack;
u32 rsv[5];
} __packed __aligned(4);
/**
* struct mt76_connac2_mcu_uni_txd - mcu command descriptor for firmware v3
* @txd: hardware descriptor
* @len: total length not including txd
* @cid: command identifier
* @pkt_type: must be 0xa0 (cmd packet by long format)
* @frag_n: fragment number
* @seq: sequence number
* @checksum: 0 mean there is no checksum
* @s2d_index: index for command source and destination
* Definition | value | note
* CMD_S2D_IDX_H2N | 0x00 | command from HOST to WM
* CMD_S2D_IDX_C2N | 0x01 | command from WA to WM
* CMD_S2D_IDX_H2C | 0x02 | command from HOST to WA
* CMD_S2D_IDX_H2N_AND_H2C | 0x03 | command from HOST to WA and WM
*
* @option: command option
* BIT[0]: UNI_CMD_OPT_BIT_ACK
* set to 1 to request a fw reply
* if UNI_CMD_OPT_BIT_0_ACK is set and UNI_CMD_OPT_BIT_2_SET_QUERY
* is set, mcu firmware will send response event EID = 0x01
* (UNI_EVENT_ID_CMD_RESULT) to the host.
* BIT[1]: UNI_CMD_OPT_BIT_UNI_CMD
* 0: original command
* 1: unified command
* BIT[2]: UNI_CMD_OPT_BIT_SET_QUERY
* 0: QUERY command
* 1: SET command
*/
struct mt76_connac2_mcu_uni_txd {
__le32 txd[8];
/* DW1 */
__le16 len;
__le16 cid;
/* DW2 */
u8 rsv;
u8 pkt_type;
u8 frag_n;
u8 seq;
/* DW3 */
__le16 checksum;
u8 s2d_index;
u8 option;
/* DW4 */
u8 rsv1[4];
} __packed __aligned(4);
struct mt76_connac2_mcu_rxd {
__le32 rxd[6];
__le16 len;
__le16 pkt_type_id;
u8 eid;
u8 seq;
u8 rsv[2];
u8 ext_eid;
u8 rsv1[2];
u8 s2d_index;
};
struct mt76_connac2_patch_hdr {
char build_date[16];
char platform[4];
__be32 hw_sw_ver;
__be32 patch_ver;
__be16 checksum;
u16 rsv;
struct {
__be32 patch_ver;
__be32 subsys;
__be32 feature;
__be32 n_region;
__be32 crc;
u32 rsv[11];
} desc;
} __packed;
struct mt76_connac2_patch_sec {
__be32 type;
__be32 offs;
__be32 size;
union {
__be32 spec[13];
struct {
__be32 addr;
__be32 len;
__be32 sec_key_idx;
__be32 align_len;
u32 rsv[9];
} info;
};
} __packed;
struct mt76_connac2_fw_trailer {
u8 chip_id;
u8 eco_code;
u8 n_region;
u8 format_ver;
u8 format_flag;
u8 rsv[2];
char fw_ver[10];
char build_date[15];
__le32 crc;
} __packed;
struct mt76_connac2_fw_region {
__le32 decomp_crc;
__le32 decomp_len;
__le32 decomp_blk_sz;
u8 rsv[4];
__le32 addr;
__le32 len;
u8 feature_set;
u8 rsv1[15];
} __packed;
struct tlv { struct tlv {
__le16 tag; __le16 tag;
__le16 len; __le16 len;
...@@ -1653,4 +1804,9 @@ int mt76_connac_mcu_set_pm(struct mt76_dev *dev, int band, int enter); ...@@ -1653,4 +1804,9 @@ int mt76_connac_mcu_set_pm(struct mt76_dev *dev, int band, int enter);
int mt76_connac_mcu_restart(struct mt76_dev *dev); int mt76_connac_mcu_restart(struct mt76_dev *dev);
int mt76_connac_mcu_rdd_cmd(struct mt76_dev *dev, int cmd, u8 index, int mt76_connac_mcu_rdd_cmd(struct mt76_dev *dev, int cmd, u8 index,
u8 rx_sel, u8 val); u8 rx_sel, u8 val);
int mt76_connac2_load_ram(struct mt76_dev *dev, const char *fw_wm,
const char *fw_wa);
int mt76_connac2_load_patch(struct mt76_dev *dev, const char *fw_name);
int mt76_connac2_mcu_fill_message(struct mt76_dev *mdev, struct sk_buff *skb,
int cmd, int *wait_seq);
#endif /* __MT76_CONNAC_MCU_H */ #endif /* __MT76_CONNAC_MCU_H */
...@@ -57,8 +57,11 @@ void mt76x02_mac_set_beacon(struct mt76x02_dev *dev, ...@@ -57,8 +57,11 @@ void mt76x02_mac_set_beacon(struct mt76x02_dev *dev,
int bcn_len = dev->beacon_ops->slot_size; int bcn_len = dev->beacon_ops->slot_size;
int bcn_addr = MT_BEACON_BASE + (bcn_len * dev->beacon_data_count); int bcn_addr = MT_BEACON_BASE + (bcn_len * dev->beacon_data_count);
if (!mt76x02_write_beacon(dev, bcn_addr, skb)) if (!mt76x02_write_beacon(dev, bcn_addr, skb)) {
if (!dev->beacon_data_count)
dev->beacon_hang_check++;
dev->beacon_data_count++; dev->beacon_data_count++;
}
dev_kfree_skb(skb); dev_kfree_skb(skb);
} }
EXPORT_SYMBOL_GPL(mt76x02_mac_set_beacon); EXPORT_SYMBOL_GPL(mt76x02_mac_set_beacon);
...@@ -74,6 +77,7 @@ void mt76x02_mac_set_beacon_enable(struct mt76x02_dev *dev, ...@@ -74,6 +77,7 @@ void mt76x02_mac_set_beacon_enable(struct mt76x02_dev *dev,
if (!dev->mt76.beacon_mask) if (!dev->mt76.beacon_mask)
dev->tbtt_count = 0; dev->tbtt_count = 0;
dev->beacon_hang_check = 0;
if (enable) { if (enable) {
dev->mt76.beacon_mask |= BIT(mvif->idx); dev->mt76.beacon_mask |= BIT(mvif->idx);
} else { } else {
......
...@@ -1044,10 +1044,9 @@ static void mt76x02_check_mac_err(struct mt76x02_dev *dev) ...@@ -1044,10 +1044,9 @@ static void mt76x02_check_mac_err(struct mt76x02_dev *dev)
return; return;
} }
if (++dev->beacon_hang_check < 10) if (dev->beacon_hang_check < 10)
return; return;
dev->beacon_hang_check = 0;
} else { } else {
u32 val = mt76_rr(dev, 0x10f4); u32 val = mt76_rr(dev, 0x10f4);
if (!(val & BIT(29)) || !(val & (BIT(7) | BIT(5)))) if (!(val & BIT(29)) || !(val & (BIT(7) | BIT(5))))
...@@ -1057,10 +1056,16 @@ static void mt76x02_check_mac_err(struct mt76x02_dev *dev) ...@@ -1057,10 +1056,16 @@ static void mt76x02_check_mac_err(struct mt76x02_dev *dev)
dev_err(dev->mt76.dev, "MAC error detected\n"); dev_err(dev->mt76.dev, "MAC error detected\n");
mt76_wr(dev, MT_MAC_SYS_CTRL, 0); mt76_wr(dev, MT_MAC_SYS_CTRL, 0);
mt76x02_wait_for_txrx_idle(&dev->mt76); if (!mt76x02_wait_for_txrx_idle(&dev->mt76)) {
dev_err(dev->mt76.dev, "MAC stop failed\n");
goto out;
}
dev->beacon_hang_check = 0;
mt76_set(dev, MT_MAC_SYS_CTRL, MT_MAC_SYS_CTRL_RESET_CSR); mt76_set(dev, MT_MAC_SYS_CTRL, MT_MAC_SYS_CTRL_RESET_CSR);
udelay(10); udelay(10);
out:
mt76_wr(dev, MT_MAC_SYS_CTRL, mt76_wr(dev, MT_MAC_SYS_CTRL,
MT_MAC_SYS_CTRL_ENABLE_TX | MT_MAC_SYS_CTRL_ENABLE_RX); MT_MAC_SYS_CTRL_ENABLE_TX | MT_MAC_SYS_CTRL_ENABLE_RX);
} }
......
...@@ -59,7 +59,8 @@ static void mt76x02_pre_tbtt_tasklet(struct tasklet_struct *t) ...@@ -59,7 +59,8 @@ static void mt76x02_pre_tbtt_tasklet(struct tasklet_struct *t)
struct ieee80211_vif *vif = info->control.vif; struct ieee80211_vif *vif = info->control.vif;
struct mt76x02_vif *mvif = (struct mt76x02_vif *)vif->drv_priv; struct mt76x02_vif *mvif = (struct mt76x02_vif *)vif->drv_priv;
mt76_tx_queue_skb(dev, q, skb, &mvif->group_wcid, NULL); mt76_tx_queue_skb(dev, q, MT_TXQ_PSD, skb, &mvif->group_wcid,
NULL);
} }
spin_unlock(&q->lock); spin_unlock(&q->lock);
} }
......
...@@ -108,7 +108,7 @@ __mt76x02u_mcu_send_msg(struct mt76_dev *dev, struct sk_buff *skb, ...@@ -108,7 +108,7 @@ __mt76x02u_mcu_send_msg(struct mt76_dev *dev, struct sk_buff *skb,
ret = mt76u_bulk_msg(dev, skb->data, skb->len, NULL, 500, ret = mt76u_bulk_msg(dev, skb->data, skb->len, NULL, 500,
MT_EP_OUT_INBAND_CMD); MT_EP_OUT_INBAND_CMD);
if (ret) if (ret)
return ret; goto out;
if (wait_resp) if (wait_resp)
ret = mt76x02u_mcu_wait_resp(dev, seq); ret = mt76x02u_mcu_wait_resp(dev, seq);
......
...@@ -976,7 +976,7 @@ mt7915_rf_regval_get(void *data, u64 *val) ...@@ -976,7 +976,7 @@ mt7915_rf_regval_get(void *data, u64 *val)
if (ret) if (ret)
return ret; return ret;
*val = le32_to_cpu(regval); *val = regval;
return 0; return 0;
} }
...@@ -985,8 +985,9 @@ static int ...@@ -985,8 +985,9 @@ static int
mt7915_rf_regval_set(void *data, u64 val) mt7915_rf_regval_set(void *data, u64 val)
{ {
struct mt7915_dev *dev = data; struct mt7915_dev *dev = data;
u32 val32 = val;
return mt7915_mcu_rf_regval(dev, dev->mt76.debugfs_reg, (u32 *)&val, true); return mt7915_mcu_rf_regval(dev, dev->mt76.debugfs_reg, &val32, true);
} }
DEFINE_DEBUGFS_ATTRIBUTE(fops_rf_regval, mt7915_rf_regval_get, DEFINE_DEBUGFS_ATTRIBUTE(fops_rf_regval, mt7915_rf_regval_get,
......
...@@ -9,29 +9,14 @@ static int ...@@ -9,29 +9,14 @@ static int
mt7915_init_tx_queues(struct mt7915_phy *phy, int idx, int n_desc, int ring_base) mt7915_init_tx_queues(struct mt7915_phy *phy, int idx, int n_desc, int ring_base)
{ {
struct mt7915_dev *dev = phy->dev; struct mt7915_dev *dev = phy->dev;
int i, err;
if (mtk_wed_device_active(&phy->dev->mt76.mmio.wed)) { if (mtk_wed_device_active(&phy->dev->mt76.mmio.wed)) {
ring_base = MT_WED_TX_RING_BASE; ring_base = MT_WED_TX_RING_BASE;
idx -= MT_TXQ_ID(0); idx -= MT_TXQ_ID(0);
} }
err = mt76_init_tx_queue(phy->mt76, 0, idx, n_desc, ring_base, return mt76_connac_init_tx_queues(phy->mt76, idx, n_desc, ring_base,
MT_WED_Q_TX(idx)); MT_WED_Q_TX(idx));
if (err < 0)
return err;
for (i = 0; i <= MT_TXQ_PSD; i++)
phy->mt76->q_tx[i] = phy->mt76->q_tx[0];
return 0;
}
static void
mt7915_tx_cleanup(struct mt7915_dev *dev)
{
mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[MT_MCUQ_WM], false);
mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[MT_MCUQ_WA], false);
} }
static int mt7915_poll_tx(struct napi_struct *napi, int budget) static int mt7915_poll_tx(struct napi_struct *napi, int budget)
...@@ -40,8 +25,7 @@ static int mt7915_poll_tx(struct napi_struct *napi, int budget) ...@@ -40,8 +25,7 @@ static int mt7915_poll_tx(struct napi_struct *napi, int budget)
dev = container_of(napi, struct mt7915_dev, mt76.tx_napi); dev = container_of(napi, struct mt7915_dev, mt76.tx_napi);
mt7915_tx_cleanup(dev); mt76_connac_tx_cleanup(&dev->mt76);
if (napi_complete_done(napi, 0)) if (napi_complete_done(napi, 0))
mt7915_irq_enable(dev, MT_INT_TX_DONE_MCU); mt7915_irq_enable(dev, MT_INT_TX_DONE_MCU);
...@@ -65,8 +49,8 @@ static void mt7915_dma_config(struct mt7915_dev *dev) ...@@ -65,8 +49,8 @@ static void mt7915_dma_config(struct mt7915_dev *dev)
RXQ_CONFIG(MT_RXQ_MAIN, WFDMA0, MT_INT_RX_DONE_BAND0, MT7915_RXQ_BAND0); RXQ_CONFIG(MT_RXQ_MAIN, WFDMA0, MT_INT_RX_DONE_BAND0, MT7915_RXQ_BAND0);
RXQ_CONFIG(MT_RXQ_MCU, WFDMA1, MT_INT_RX_DONE_WM, MT7915_RXQ_MCU_WM); RXQ_CONFIG(MT_RXQ_MCU, WFDMA1, MT_INT_RX_DONE_WM, MT7915_RXQ_MCU_WM);
RXQ_CONFIG(MT_RXQ_MCU_WA, WFDMA1, MT_INT_RX_DONE_WA, MT7915_RXQ_MCU_WA); RXQ_CONFIG(MT_RXQ_MCU_WA, WFDMA1, MT_INT_RX_DONE_WA, MT7915_RXQ_MCU_WA);
RXQ_CONFIG(MT_RXQ_EXT, WFDMA0, MT_INT_RX_DONE_BAND1, MT7915_RXQ_BAND1); RXQ_CONFIG(MT_RXQ_BAND1, WFDMA0, MT_INT_RX_DONE_BAND1, MT7915_RXQ_BAND1);
RXQ_CONFIG(MT_RXQ_EXT_WA, WFDMA1, MT_INT_RX_DONE_WA_EXT, MT7915_RXQ_MCU_WA_EXT); RXQ_CONFIG(MT_RXQ_BAND1_WA, WFDMA1, MT_INT_RX_DONE_WA_EXT, MT7915_RXQ_MCU_WA_EXT);
RXQ_CONFIG(MT_RXQ_MAIN_WA, WFDMA1, MT_INT_RX_DONE_WA_MAIN, MT7915_RXQ_MCU_WA); RXQ_CONFIG(MT_RXQ_MAIN_WA, WFDMA1, MT_INT_RX_DONE_WA_MAIN, MT7915_RXQ_MCU_WA);
TXQ_CONFIG(0, WFDMA1, MT_INT_TX_DONE_BAND0, MT7915_TXQ_BAND0); TXQ_CONFIG(0, WFDMA1, MT_INT_TX_DONE_BAND0, MT7915_TXQ_BAND0);
TXQ_CONFIG(1, WFDMA1, MT_INT_TX_DONE_BAND1, MT7915_TXQ_BAND1); TXQ_CONFIG(1, WFDMA1, MT_INT_TX_DONE_BAND1, MT7915_TXQ_BAND1);
...@@ -77,8 +61,8 @@ static void mt7915_dma_config(struct mt7915_dev *dev) ...@@ -77,8 +61,8 @@ static void mt7915_dma_config(struct mt7915_dev *dev)
RXQ_CONFIG(MT_RXQ_MAIN, WFDMA0, MT_INT_RX_DONE_BAND0_MT7916, MT7916_RXQ_BAND0); RXQ_CONFIG(MT_RXQ_MAIN, WFDMA0, MT_INT_RX_DONE_BAND0_MT7916, MT7916_RXQ_BAND0);
RXQ_CONFIG(MT_RXQ_MCU, WFDMA0, MT_INT_RX_DONE_WM, MT7916_RXQ_MCU_WM); RXQ_CONFIG(MT_RXQ_MCU, WFDMA0, MT_INT_RX_DONE_WM, MT7916_RXQ_MCU_WM);
RXQ_CONFIG(MT_RXQ_MCU_WA, WFDMA0, MT_INT_RX_DONE_WA, MT7916_RXQ_MCU_WA); RXQ_CONFIG(MT_RXQ_MCU_WA, WFDMA0, MT_INT_RX_DONE_WA, MT7916_RXQ_MCU_WA);
RXQ_CONFIG(MT_RXQ_EXT, WFDMA0, MT_INT_RX_DONE_BAND1_MT7916, MT7916_RXQ_BAND1); RXQ_CONFIG(MT_RXQ_BAND1, WFDMA0, MT_INT_RX_DONE_BAND1_MT7916, MT7916_RXQ_BAND1);
RXQ_CONFIG(MT_RXQ_EXT_WA, WFDMA0, MT_INT_RX_DONE_WA_EXT_MT7916, MT7916_RXQ_MCU_WA_EXT); RXQ_CONFIG(MT_RXQ_BAND1_WA, WFDMA0, MT_INT_RX_DONE_WA_EXT_MT7916, MT7916_RXQ_MCU_WA_EXT);
RXQ_CONFIG(MT_RXQ_MAIN_WA, WFDMA0, MT_INT_RX_DONE_WA_MAIN_MT7916, MT7916_RXQ_MCU_WA_MAIN); RXQ_CONFIG(MT_RXQ_MAIN_WA, WFDMA0, MT_INT_RX_DONE_WA_MAIN_MT7916, MT7916_RXQ_MCU_WA_MAIN);
TXQ_CONFIG(0, WFDMA0, MT_INT_TX_DONE_BAND0, MT7915_TXQ_BAND0); TXQ_CONFIG(0, WFDMA0, MT_INT_TX_DONE_BAND0, MT7915_TXQ_BAND0);
TXQ_CONFIG(1, WFDMA0, MT_INT_TX_DONE_BAND1, MT7915_TXQ_BAND1); TXQ_CONFIG(1, WFDMA0, MT_INT_TX_DONE_BAND1, MT7915_TXQ_BAND1);
...@@ -100,24 +84,33 @@ static void __mt7915_dma_prefetch(struct mt7915_dev *dev, u32 ofs) ...@@ -100,24 +84,33 @@ static void __mt7915_dma_prefetch(struct mt7915_dev *dev, u32 ofs)
mt76_wr(dev, MT_TXQ_EXT_CTRL(1) + ofs, PREFETCH(0xc0, 0x4)); mt76_wr(dev, MT_TXQ_EXT_CTRL(1) + ofs, PREFETCH(0xc0, 0x4));
mt76_wr(dev, MT_MCUQ_EXT_CTRL(MT_MCUQ_WA) + ofs, PREFETCH(0x100, 0x4)); mt76_wr(dev, MT_MCUQ_EXT_CTRL(MT_MCUQ_WA) + ofs, PREFETCH(0x100, 0x4));
mt76_wr(dev, MT_RXQ_EXT_CTRL(MT_RXQ_MCU) + ofs, PREFETCH(0x140, 0x4)); mt76_wr(dev, MT_RXQ_BAND1_CTRL(MT_RXQ_MCU) + ofs,
mt76_wr(dev, MT_RXQ_EXT_CTRL(MT_RXQ_MCU_WA) + ofs, PREFETCH(0x180, 0x4)); PREFETCH(0x140, 0x4));
mt76_wr(dev, MT_RXQ_BAND1_CTRL(MT_RXQ_MCU_WA) + ofs,
PREFETCH(0x180, 0x4));
if (!is_mt7915(&dev->mt76)) { if (!is_mt7915(&dev->mt76)) {
mt76_wr(dev, MT_RXQ_EXT_CTRL(MT_RXQ_MAIN_WA) + ofs, PREFETCH(0x1c0, 0x4)); mt76_wr(dev, MT_RXQ_BAND1_CTRL(MT_RXQ_MAIN_WA) + ofs,
PREFETCH(0x1c0, 0x4));
base = 0x40; base = 0x40;
} }
mt76_wr(dev, MT_RXQ_EXT_CTRL(MT_RXQ_EXT_WA) + ofs, PREFETCH(0x1c0 + base, 0x4)); mt76_wr(dev, MT_RXQ_BAND1_CTRL(MT_RXQ_BAND1_WA) + ofs,
mt76_wr(dev, MT_RXQ_EXT_CTRL(MT_RXQ_MAIN) + ofs, PREFETCH(0x200 + base, 0x4)); PREFETCH(0x1c0 + base, 0x4));
mt76_wr(dev, MT_RXQ_EXT_CTRL(MT_RXQ_EXT) + ofs, PREFETCH(0x240 + base, 0x4)); mt76_wr(dev, MT_RXQ_BAND1_CTRL(MT_RXQ_MAIN) + ofs,
PREFETCH(0x200 + base, 0x4));
mt76_wr(dev, MT_RXQ_BAND1_CTRL(MT_RXQ_BAND1) + ofs,
PREFETCH(0x240 + base, 0x4));
/* for mt7915, the ring which is next the last /* for mt7915, the ring which is next the last
* used ring must be initialized. * used ring must be initialized.
*/ */
if (is_mt7915(&dev->mt76)) { if (is_mt7915(&dev->mt76)) {
ofs += 0x4; ofs += 0x4;
mt76_wr(dev, MT_MCUQ_EXT_CTRL(MT_MCUQ_WA) + ofs, PREFETCH(0x140, 0x0)); mt76_wr(dev, MT_MCUQ_EXT_CTRL(MT_MCUQ_WA) + ofs,
mt76_wr(dev, MT_RXQ_EXT_CTRL(MT_RXQ_EXT_WA) + ofs, PREFETCH(0x200 + base, 0x0)); PREFETCH(0x140, 0x0));
mt76_wr(dev, MT_RXQ_EXT_CTRL(MT_RXQ_EXT) + ofs, PREFETCH(0x280 + base, 0x0)); mt76_wr(dev, MT_RXQ_BAND1_CTRL(MT_RXQ_BAND1_WA) + ofs,
PREFETCH(0x200 + base, 0x0));
mt76_wr(dev, MT_RXQ_BAND1_CTRL(MT_RXQ_BAND1) + ofs,
PREFETCH(0x280 + base, 0x0));
} }
} }
...@@ -455,20 +448,20 @@ int mt7915_dma_init(struct mt7915_dev *dev, struct mt7915_phy *phy2) ...@@ -455,20 +448,20 @@ int mt7915_dma_init(struct mt7915_dev *dev, struct mt7915_phy *phy2)
if (dev->dbdc_support || dev->phy.band_idx) { if (dev->dbdc_support || dev->phy.band_idx) {
/* rx data queue for band1 */ /* rx data queue for band1 */
ret = mt76_queue_alloc(dev, &dev->mt76.q_rx[MT_RXQ_EXT], ret = mt76_queue_alloc(dev, &dev->mt76.q_rx[MT_RXQ_BAND1],
MT_RXQ_ID(MT_RXQ_EXT), MT_RXQ_ID(MT_RXQ_BAND1),
MT7915_RX_RING_SIZE, MT7915_RX_RING_SIZE,
MT_RX_BUF_SIZE, MT_RX_BUF_SIZE,
MT_RXQ_RING_BASE(MT_RXQ_EXT) + hif1_ofs); MT_RXQ_RING_BASE(MT_RXQ_BAND1) + hif1_ofs);
if (ret) if (ret)
return ret; return ret;
/* tx free notify event from WA for band1 */ /* tx free notify event from WA for band1 */
ret = mt76_queue_alloc(dev, &dev->mt76.q_rx[MT_RXQ_EXT_WA], ret = mt76_queue_alloc(dev, &dev->mt76.q_rx[MT_RXQ_BAND1_WA],
MT_RXQ_ID(MT_RXQ_EXT_WA), MT_RXQ_ID(MT_RXQ_BAND1_WA),
MT7915_RX_MCU_RING_SIZE, MT7915_RX_MCU_RING_SIZE,
MT_RX_BUF_SIZE, MT_RX_BUF_SIZE,
MT_RXQ_RING_BASE(MT_RXQ_EXT_WA) + hif1_ofs); MT_RXQ_RING_BASE(MT_RXQ_BAND1_WA) + hif1_ofs);
if (ret) if (ret)
return ret; return ret;
} }
......
...@@ -365,18 +365,24 @@ mt7915_init_wiphy(struct ieee80211_hw *hw) ...@@ -365,18 +365,24 @@ mt7915_init_wiphy(struct ieee80211_hw *hw)
ieee80211_hw_set(hw, SUPPORTS_RX_DECAP_OFFLOAD); ieee80211_hw_set(hw, SUPPORTS_RX_DECAP_OFFLOAD);
ieee80211_hw_set(hw, SUPPORTS_MULTI_BSSID); ieee80211_hw_set(hw, SUPPORTS_MULTI_BSSID);
ieee80211_hw_set(hw, WANT_MONITOR_VIF); ieee80211_hw_set(hw, WANT_MONITOR_VIF);
ieee80211_hw_set(hw, SUPPORTS_VHT_EXT_NSS_BW);
hw->max_tx_fragments = 4; hw->max_tx_fragments = 4;
if (phy->mt76->cap.has_2ghz) if (phy->mt76->cap.has_2ghz) {
phy->mt76->sband_2g.sband.ht_cap.cap |= phy->mt76->sband_2g.sband.ht_cap.cap |=
IEEE80211_HT_CAP_LDPC_CODING | IEEE80211_HT_CAP_LDPC_CODING |
IEEE80211_HT_CAP_MAX_AMSDU; IEEE80211_HT_CAP_MAX_AMSDU;
phy->mt76->sband_2g.sband.ht_cap.ampdu_density =
IEEE80211_HT_MPDU_DENSITY_4;
}
if (phy->mt76->cap.has_5ghz) { if (phy->mt76->cap.has_5ghz) {
phy->mt76->sband_5g.sband.ht_cap.cap |= phy->mt76->sband_5g.sband.ht_cap.cap |=
IEEE80211_HT_CAP_LDPC_CODING | IEEE80211_HT_CAP_LDPC_CODING |
IEEE80211_HT_CAP_MAX_AMSDU; IEEE80211_HT_CAP_MAX_AMSDU;
phy->mt76->sband_5g.sband.ht_cap.ampdu_density =
IEEE80211_HT_MPDU_DENSITY_4;
if (is_mt7915(&dev->mt76)) { if (is_mt7915(&dev->mt76)) {
phy->mt76->sband_5g.sband.vht_cap.cap |= phy->mt76->sband_5g.sband.vht_cap.cap |=
...@@ -498,7 +504,7 @@ mt7915_alloc_ext_phy(struct mt7915_dev *dev) ...@@ -498,7 +504,7 @@ mt7915_alloc_ext_phy(struct mt7915_dev *dev)
if (!dev->dbdc_support) if (!dev->dbdc_support)
return NULL; return NULL;
mphy = mt76_alloc_phy(&dev->mt76, sizeof(*phy), &mt7915_ops); mphy = mt76_alloc_phy(&dev->mt76, sizeof(*phy), &mt7915_ops, MT_BAND1);
if (!mphy) if (!mphy)
return ERR_PTR(-ENOMEM); return ERR_PTR(-ENOMEM);
...@@ -752,9 +758,10 @@ mt7915_set_stream_he_txbf_caps(struct mt7915_dev *dev, ...@@ -752,9 +758,10 @@ mt7915_set_stream_he_txbf_caps(struct mt7915_dev *dev,
elem->phy_cap_info[7] &= ~IEEE80211_HE_PHY_CAP7_MAX_NC_MASK; elem->phy_cap_info[7] &= ~IEEE80211_HE_PHY_CAP7_MAX_NC_MASK;
c = IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US | c = IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US;
IEEE80211_HE_PHY_CAP2_UL_MU_FULL_MU_MIMO | if (!is_mt7915(&dev->mt76))
IEEE80211_HE_PHY_CAP2_UL_MU_PARTIAL_MU_MIMO; c |= IEEE80211_HE_PHY_CAP2_UL_MU_FULL_MU_MIMO |
IEEE80211_HE_PHY_CAP2_UL_MU_PARTIAL_MU_MIMO;
elem->phy_cap_info[2] |= c; elem->phy_cap_info[2] |= c;
c = IEEE80211_HE_PHY_CAP4_SU_BEAMFORMEE | c = IEEE80211_HE_PHY_CAP4_SU_BEAMFORMEE |
...@@ -978,7 +985,7 @@ mt7915_init_he_caps(struct mt7915_phy *phy, enum nl80211_band band, ...@@ -978,7 +985,7 @@ mt7915_init_he_caps(struct mt7915_phy *phy, enum nl80211_band band,
u16 cap = IEEE80211_HE_6GHZ_CAP_TX_ANTPAT_CONS | u16 cap = IEEE80211_HE_6GHZ_CAP_TX_ANTPAT_CONS |
IEEE80211_HE_6GHZ_CAP_RX_ANTPAT_CONS; IEEE80211_HE_6GHZ_CAP_RX_ANTPAT_CONS;
cap |= u16_encode_bits(IEEE80211_HT_MPDU_DENSITY_8, cap |= u16_encode_bits(IEEE80211_HT_MPDU_DENSITY_2,
IEEE80211_HE_6GHZ_CAP_MIN_MPDU_START) | IEEE80211_HE_6GHZ_CAP_MIN_MPDU_START) |
u16_encode_bits(IEEE80211_VHT_MAX_AMPDU_1024K, u16_encode_bits(IEEE80211_VHT_MAX_AMPDU_1024K,
IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP) | IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP) |
...@@ -1031,7 +1038,7 @@ void mt7915_set_stream_he_caps(struct mt7915_phy *phy) ...@@ -1031,7 +1038,7 @@ void mt7915_set_stream_he_caps(struct mt7915_phy *phy)
static void mt7915_unregister_ext_phy(struct mt7915_dev *dev) static void mt7915_unregister_ext_phy(struct mt7915_dev *dev)
{ {
struct mt7915_phy *phy = mt7915_ext_phy(dev); struct mt7915_phy *phy = mt7915_ext_phy(dev);
struct mt76_phy *mphy = dev->mt76.phy2; struct mt76_phy *mphy = dev->mt76.phys[MT_BAND1];
if (!phy) if (!phy)
return; return;
......
...@@ -227,7 +227,7 @@ static int mt7915_add_interface(struct ieee80211_hw *hw, ...@@ -227,7 +227,7 @@ static int mt7915_add_interface(struct ieee80211_hw *hw,
INIT_LIST_HEAD(&mvif->sta.rc_list); INIT_LIST_HEAD(&mvif->sta.rc_list);
INIT_LIST_HEAD(&mvif->sta.poll_list); INIT_LIST_HEAD(&mvif->sta.poll_list);
mvif->sta.wcid.idx = idx; mvif->sta.wcid.idx = idx;
mvif->sta.wcid.ext_phy = ext_phy; mvif->sta.wcid.phy_idx = ext_phy;
mvif->sta.wcid.hw_key_idx = -1; mvif->sta.wcid.hw_key_idx = -1;
mvif->sta.wcid.tx_info |= MT_WCID_TX_INFO_SET; mvif->sta.wcid.tx_info |= MT_WCID_TX_INFO_SET;
mt76_packet_id_init(&mvif->sta.wcid); mt76_packet_id_init(&mvif->sta.wcid);
...@@ -235,7 +235,6 @@ static int mt7915_add_interface(struct ieee80211_hw *hw, ...@@ -235,7 +235,6 @@ static int mt7915_add_interface(struct ieee80211_hw *hw,
mt7915_mac_wtbl_update(dev, idx, mt7915_mac_wtbl_update(dev, idx,
MT_WTBL_UPDATE_ADM_COUNT_CLEAR); MT_WTBL_UPDATE_ADM_COUNT_CLEAR);
rcu_assign_pointer(dev->mt76.wcid[idx], &mvif->sta.wcid);
if (vif->txq) { if (vif->txq) {
mtxq = (struct mt76_txq *)vif->txq->drv_priv; mtxq = (struct mt76_txq *)vif->txq->drv_priv;
mtxq->wcid = idx; mtxq->wcid = idx;
...@@ -251,6 +250,7 @@ static int mt7915_add_interface(struct ieee80211_hw *hw, ...@@ -251,6 +250,7 @@ static int mt7915_add_interface(struct ieee80211_hw *hw,
mt7915_mcu_add_bss_info(phy, vif, true); mt7915_mcu_add_bss_info(phy, vif, true);
mt7915_mcu_add_sta(dev, vif, NULL, true); mt7915_mcu_add_sta(dev, vif, NULL, true);
rcu_assign_pointer(dev->mt76.wcid[idx], &mvif->sta.wcid);
out: out:
mutex_unlock(&dev->mt76.mutex); mutex_unlock(&dev->mt76.mutex);
...@@ -661,7 +661,7 @@ int mt7915_mac_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif, ...@@ -661,7 +661,7 @@ int mt7915_mac_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif,
msta->vif = mvif; msta->vif = mvif;
msta->wcid.sta = 1; msta->wcid.sta = 1;
msta->wcid.idx = idx; msta->wcid.idx = idx;
msta->wcid.ext_phy = ext_phy; msta->wcid.phy_idx = ext_phy;
msta->wcid.tx_info |= MT_WCID_TX_INFO_SET; msta->wcid.tx_info |= MT_WCID_TX_INFO_SET;
msta->jiffies = jiffies; msta->jiffies = jiffies;
...@@ -1147,8 +1147,15 @@ static const char mt7915_gstrings_stats[][ETH_GSTRING_LEN] = { ...@@ -1147,8 +1147,15 @@ static const char mt7915_gstrings_stats[][ETH_GSTRING_LEN] = {
"rx_fifo_full_cnt", "rx_fifo_full_cnt",
"rx_mpdu_cnt", "rx_mpdu_cnt",
"channel_idle_cnt", "channel_idle_cnt",
"primary_cca_busy_time",
"secondary_cca_busy_time",
"primary_energy_detect_time",
"cck_mdrdy_time",
"ofdm_mdrdy_time",
"green_mdrdy_time",
"rx_vector_mismatch_cnt", "rx_vector_mismatch_cnt",
"rx_delimiter_fail_cnt", "rx_delimiter_fail_cnt",
"rx_mrdy_cnt",
"rx_len_mismatch_cnt", "rx_len_mismatch_cnt",
"rx_ampdu_cnt", "rx_ampdu_cnt",
"rx_ampdu_bytes_cnt", "rx_ampdu_bytes_cnt",
...@@ -1288,8 +1295,15 @@ void mt7915_get_et_stats(struct ieee80211_hw *hw, ...@@ -1288,8 +1295,15 @@ void mt7915_get_et_stats(struct ieee80211_hw *hw,
data[ei++] = mib->rx_fifo_full_cnt; data[ei++] = mib->rx_fifo_full_cnt;
data[ei++] = mib->rx_mpdu_cnt; data[ei++] = mib->rx_mpdu_cnt;
data[ei++] = mib->channel_idle_cnt; data[ei++] = mib->channel_idle_cnt;
data[ei++] = mib->primary_cca_busy_time;
data[ei++] = mib->secondary_cca_busy_time;
data[ei++] = mib->primary_energy_detect_time;
data[ei++] = mib->cck_mdrdy_time;
data[ei++] = mib->ofdm_mdrdy_time;
data[ei++] = mib->green_mdrdy_time;
data[ei++] = mib->rx_vector_mismatch_cnt; data[ei++] = mib->rx_vector_mismatch_cnt;
data[ei++] = mib->rx_delimiter_fail_cnt; data[ei++] = mib->rx_delimiter_fail_cnt;
data[ei++] = mib->rx_mrdy_cnt;
data[ei++] = mib->rx_len_mismatch_cnt; data[ei++] = mib->rx_len_mismatch_cnt;
data[ei++] = mib->rx_ampdu_cnt; data[ei++] = mib->rx_ampdu_cnt;
data[ei++] = mib->rx_ampdu_bytes_cnt; data[ei++] = mib->rx_ampdu_bytes_cnt;
......
...@@ -6,25 +6,6 @@ ...@@ -6,25 +6,6 @@
#include "../mt76_connac_mcu.h" #include "../mt76_connac_mcu.h"
struct mt7915_mcu_txd {
__le32 txd[8];
__le16 len;
__le16 pq_id;
u8 cid;
u8 pkt_type;
u8 set_query; /* FW don't care */
u8 seq;
u8 uc_d2b0_rev;
u8 ext_cid;
u8 s2d_index;
u8 ext_cid_ack;
u32 reserved[5];
} __packed __aligned(4);
enum { enum {
MCU_ATE_SET_TRX = 0x1, MCU_ATE_SET_TRX = 0x1,
MCU_ATE_SET_FREQ_OFFSET = 0xa, MCU_ATE_SET_FREQ_OFFSET = 0xa,
...@@ -32,21 +13,6 @@ enum { ...@@ -32,21 +13,6 @@ enum {
MCU_ATE_CLEAN_TXQUEUE = 0x1c, MCU_ATE_CLEAN_TXQUEUE = 0x1c,
}; };
struct mt7915_mcu_rxd {
__le32 rxd[6];
__le16 len;
__le16 pkt_type_id;
u8 eid;
u8 seq;
__le16 __rsv;
u8 ext_eid;
u8 __rsv1[2];
u8 s2d_index;
};
struct mt7915_mcu_thermal_ctrl { struct mt7915_mcu_thermal_ctrl {
u8 ctrl_id; u8 ctrl_id;
u8 band_idx; u8 band_idx;
...@@ -63,7 +29,7 @@ struct mt7915_mcu_thermal_ctrl { ...@@ -63,7 +29,7 @@ struct mt7915_mcu_thermal_ctrl {
} __packed; } __packed;
struct mt7915_mcu_thermal_notify { struct mt7915_mcu_thermal_notify {
struct mt7915_mcu_rxd rxd; struct mt76_connac2_mcu_rxd rxd;
struct mt7915_mcu_thermal_ctrl ctrl; struct mt7915_mcu_thermal_ctrl ctrl;
__le32 temperature; __le32 temperature;
...@@ -71,7 +37,7 @@ struct mt7915_mcu_thermal_notify { ...@@ -71,7 +37,7 @@ struct mt7915_mcu_thermal_notify {
} __packed; } __packed;
struct mt7915_mcu_csa_notify { struct mt7915_mcu_csa_notify {
struct mt7915_mcu_rxd rxd; struct mt76_connac2_mcu_rxd rxd;
u8 omac_idx; u8 omac_idx;
u8 csa_count; u8 csa_count;
...@@ -80,7 +46,7 @@ struct mt7915_mcu_csa_notify { ...@@ -80,7 +46,7 @@ struct mt7915_mcu_csa_notify {
} __packed; } __packed;
struct mt7915_mcu_bcc_notify { struct mt7915_mcu_bcc_notify {
struct mt7915_mcu_rxd rxd; struct mt76_connac2_mcu_rxd rxd;
u8 band_idx; u8 band_idx;
u8 omac_idx; u8 omac_idx;
...@@ -89,7 +55,7 @@ struct mt7915_mcu_bcc_notify { ...@@ -89,7 +55,7 @@ struct mt7915_mcu_bcc_notify {
} __packed; } __packed;
struct mt7915_mcu_rdd_report { struct mt7915_mcu_rdd_report {
struct mt7915_mcu_rxd rxd; struct mt76_connac2_mcu_rxd rxd;
u8 band_idx; u8 band_idx;
u8 long_detected; u8 long_detected;
...@@ -267,9 +233,6 @@ struct mt7915_mcu_muru_stats { ...@@ -267,9 +233,6 @@ struct mt7915_mcu_muru_stats {
#define WMM_TXOP_SET BIT(3) #define WMM_TXOP_SET BIT(3)
#define WMM_PARAM_SET GENMASK(3, 0) #define WMM_PARAM_SET GENMASK(3, 0)
#define MCU_PQ_ID(p, q) (((p) << 15) | ((q) << 10))
#define MCU_PKT_ID 0xa0
enum { enum {
MCU_FW_LOG_WM, MCU_FW_LOG_WM,
MCU_FW_LOG_WA, MCU_FW_LOG_WA,
...@@ -489,6 +452,12 @@ enum { ...@@ -489,6 +452,12 @@ enum {
SER_RECOVER SER_RECOVER
}; };
#define MT7915_MAX_BEACON_SIZE 512
#define MT7915_MAX_INBAND_FRAME_SIZE 256
#define MT7915_MAX_BSS_OFFLOAD_SIZE (MT7915_MAX_BEACON_SIZE + \
MT7915_MAX_INBAND_FRAME_SIZE + \
MT7915_BEACON_UPDATE_SIZE)
#define MT7915_BSS_UPDATE_MAX_SIZE (sizeof(struct sta_req_hdr) + \ #define MT7915_BSS_UPDATE_MAX_SIZE (sizeof(struct sta_req_hdr) + \
sizeof(struct bss_info_omac) + \ sizeof(struct bss_info_omac) + \
sizeof(struct bss_info_basic) +\ sizeof(struct bss_info_basic) +\
......
...@@ -591,8 +591,8 @@ static void mt7915_irq_tasklet(struct tasklet_struct *t) ...@@ -591,8 +591,8 @@ static void mt7915_irq_tasklet(struct tasklet_struct *t)
if (intr & MT_INT_RX(MT_RXQ_MAIN)) if (intr & MT_INT_RX(MT_RXQ_MAIN))
napi_schedule(&dev->mt76.napi[MT_RXQ_MAIN]); napi_schedule(&dev->mt76.napi[MT_RXQ_MAIN]);
if (intr & MT_INT_RX(MT_RXQ_EXT)) if (intr & MT_INT_RX(MT_RXQ_BAND1))
napi_schedule(&dev->mt76.napi[MT_RXQ_EXT]); napi_schedule(&dev->mt76.napi[MT_RXQ_BAND1]);
if (intr & MT_INT_RX(MT_RXQ_MCU)) if (intr & MT_INT_RX(MT_RXQ_MCU))
napi_schedule(&dev->mt76.napi[MT_RXQ_MCU]); napi_schedule(&dev->mt76.napi[MT_RXQ_MCU]);
...@@ -604,8 +604,8 @@ static void mt7915_irq_tasklet(struct tasklet_struct *t) ...@@ -604,8 +604,8 @@ static void mt7915_irq_tasklet(struct tasklet_struct *t)
(intr & MT_INT_RX(MT_RXQ_MAIN_WA))) (intr & MT_INT_RX(MT_RXQ_MAIN_WA)))
napi_schedule(&dev->mt76.napi[MT_RXQ_MAIN_WA]); napi_schedule(&dev->mt76.napi[MT_RXQ_MAIN_WA]);
if (intr & MT_INT_RX(MT_RXQ_EXT_WA)) if (intr & MT_INT_RX(MT_RXQ_BAND1_WA))
napi_schedule(&dev->mt76.napi[MT_RXQ_EXT_WA]); napi_schedule(&dev->mt76.napi[MT_RXQ_BAND1_WA]);
if (intr & MT_INT_MCU_CMD) { if (intr & MT_INT_MCU_CMD) {
u32 val = mt76_rr(dev, MT_MCU_CMD); u32 val = mt76_rr(dev, MT_MCU_CMD);
...@@ -645,14 +645,14 @@ struct mt7915_dev *mt7915_mmio_probe(struct device *pdev, ...@@ -645,14 +645,14 @@ struct mt7915_dev *mt7915_mmio_probe(struct device *pdev,
{ {
static const struct mt76_driver_ops drv_ops = { static const struct mt76_driver_ops drv_ops = {
/* txwi_size = txd size + txp size */ /* txwi_size = txd size + txp size */
.txwi_size = MT_TXD_SIZE + sizeof(struct mt7915_txp), .txwi_size = MT_TXD_SIZE + sizeof(struct mt76_connac_fw_txp),
.drv_flags = MT_DRV_TXWI_NO_FREE | MT_DRV_HW_MGMT_TXQ, .drv_flags = MT_DRV_TXWI_NO_FREE | MT_DRV_HW_MGMT_TXQ,
.survey_flags = SURVEY_INFO_TIME_TX | .survey_flags = SURVEY_INFO_TIME_TX |
SURVEY_INFO_TIME_RX | SURVEY_INFO_TIME_RX |
SURVEY_INFO_TIME_BSS_RX, SURVEY_INFO_TIME_BSS_RX,
.token_size = MT7915_TOKEN_SIZE, .token_size = MT7915_TOKEN_SIZE,
.tx_prepare_skb = mt7915_tx_prepare_skb, .tx_prepare_skb = mt7915_tx_prepare_skb,
.tx_complete_skb = mt7915_tx_complete_skb, .tx_complete_skb = mt76_connac_tx_complete_skb,
.rx_skb = mt7915_queue_rx_skb, .rx_skb = mt7915_queue_rx_skb,
.rx_check = mt7915_rx_check, .rx_check = mt7915_rx_check,
.rx_poll_complete = mt7915_rx_poll_complete, .rx_poll_complete = mt7915_rx_poll_complete,
...@@ -661,16 +661,11 @@ struct mt7915_dev *mt7915_mmio_probe(struct device *pdev, ...@@ -661,16 +661,11 @@ struct mt7915_dev *mt7915_mmio_probe(struct device *pdev,
.sta_remove = mt7915_mac_sta_remove, .sta_remove = mt7915_mac_sta_remove,
.update_survey = mt7915_update_channel, .update_survey = mt7915_update_channel,
}; };
struct ieee80211_ops *ops;
struct mt7915_dev *dev; struct mt7915_dev *dev;
struct mt76_dev *mdev; struct mt76_dev *mdev;
int ret; int ret;
ops = devm_kmemdup(pdev, &mt7915_ops, sizeof(mt7915_ops), GFP_KERNEL); mdev = mt76_alloc_device(pdev, sizeof(*dev), &mt7915_ops, &drv_ops);
if (!ops)
return ERR_PTR(-ENOMEM);
mdev = mt76_alloc_device(pdev, sizeof(*dev), ops, &drv_ops);
if (!mdev) if (!mdev)
return ERR_PTR(-ENOMEM); return ERR_PTR(-ENOMEM);
......
...@@ -10,7 +10,6 @@ ...@@ -10,7 +10,6 @@
#include "regs.h" #include "regs.h"
#define MT7915_MAX_INTERFACES 19 #define MT7915_MAX_INTERFACES 19
#define MT7915_MAX_WMM_SETS 4
#define MT7915_WTBL_SIZE 288 #define MT7915_WTBL_SIZE 288
#define MT7916_WTBL_SIZE 544 #define MT7916_WTBL_SIZE 544
#define MT7915_WTBL_RESERVED (mt7915_wtbl_size(dev) - 1) #define MT7915_WTBL_RESERVED (mt7915_wtbl_size(dev) - 1)
...@@ -67,7 +66,7 @@ ...@@ -67,7 +66,7 @@
#define MT7915_MAX_TWT_AGRT 16 #define MT7915_MAX_TWT_AGRT 16
#define MT7915_MAX_STA_TWT_AGRT 8 #define MT7915_MAX_STA_TWT_AGRT 8
#define MT7915_MIN_TWT_DUR 64 #define MT7915_MIN_TWT_DUR 64
#define MT7915_MAX_QUEUE (__MT_RXQ_MAX + __MT_MCUQ_MAX + 2) #define MT7915_MAX_QUEUE (MT_RXQ_BAND2 + __MT_MCUQ_MAX + 2)
struct mt7915_vif; struct mt7915_vif;
struct mt7915_sta; struct mt7915_sta;
...@@ -200,8 +199,15 @@ struct mib_stats { ...@@ -200,8 +199,15 @@ struct mib_stats {
/* rx stats */ /* rx stats */
u32 rx_fifo_full_cnt; u32 rx_fifo_full_cnt;
u32 channel_idle_cnt; u32 channel_idle_cnt;
u32 primary_cca_busy_time;
u32 secondary_cca_busy_time;
u32 primary_energy_detect_time;
u32 cck_mdrdy_time;
u32 ofdm_mdrdy_time;
u32 green_mdrdy_time;
u32 rx_vector_mismatch_cnt; u32 rx_vector_mismatch_cnt;
u32 rx_delimiter_fail_cnt; u32 rx_delimiter_fail_cnt;
u32 rx_mrdy_cnt;
u32 rx_len_mismatch_cnt; u32 rx_len_mismatch_cnt;
u32 rx_mpdu_cnt; u32 rx_mpdu_cnt;
u32 rx_ampdu_cnt; u32 rx_ampdu_cnt;
...@@ -341,20 +347,6 @@ enum { ...@@ -341,20 +347,6 @@ enum {
__MT_WFDMA_MAX, __MT_WFDMA_MAX,
}; };
enum {
MT_CTX0,
MT_HIF0 = 0x0,
MT_LMAC_AC00 = 0x0,
MT_LMAC_AC01,
MT_LMAC_AC02,
MT_LMAC_AC03,
MT_LMAC_ALTX0 = 0x10,
MT_LMAC_BMC0,
MT_LMAC_BCN0,
MT_LMAC_PSMP0,
};
enum { enum {
MT_RX_SEL0, MT_RX_SEL0,
MT_RX_SEL1, MT_RX_SEL1,
...@@ -396,7 +388,7 @@ mt7915_hw_dev(struct ieee80211_hw *hw) ...@@ -396,7 +388,7 @@ mt7915_hw_dev(struct ieee80211_hw *hw)
static inline struct mt7915_phy * static inline struct mt7915_phy *
mt7915_ext_phy(struct mt7915_dev *dev) mt7915_ext_phy(struct mt7915_dev *dev)
{ {
struct mt76_phy *phy = dev->mt76.phy2; struct mt76_phy *phy = dev->mt76.phys[MT_BAND1];
if (!phy) if (!phy)
return NULL; return NULL;
...@@ -557,9 +549,10 @@ bool mt7915_mac_wtbl_update(struct mt7915_dev *dev, int idx, u32 mask); ...@@ -557,9 +549,10 @@ bool mt7915_mac_wtbl_update(struct mt7915_dev *dev, int idx, u32 mask);
void mt7915_mac_reset_counters(struct mt7915_phy *phy); void mt7915_mac_reset_counters(struct mt7915_phy *phy);
void mt7915_mac_cca_stats_reset(struct mt7915_phy *phy); void mt7915_mac_cca_stats_reset(struct mt7915_phy *phy);
void mt7915_mac_enable_nf(struct mt7915_dev *dev, bool ext_phy); void mt7915_mac_enable_nf(struct mt7915_dev *dev, bool ext_phy);
void mt7915_mac_write_txwi(struct mt7915_dev *dev, __le32 *txwi, void mt7915_mac_write_txwi(struct mt76_dev *dev, __le32 *txwi,
struct sk_buff *skb, struct mt76_wcid *wcid, int pid, struct sk_buff *skb, struct mt76_wcid *wcid, int pid,
struct ieee80211_key_conf *key, u32 changed); struct ieee80211_key_conf *key,
enum mt76_txq_id qid, u32 changed);
void mt7915_mac_set_timing(struct mt7915_phy *phy); void mt7915_mac_set_timing(struct mt7915_phy *phy);
int mt7915_mac_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif, int mt7915_mac_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif,
struct ieee80211_sta *sta); struct ieee80211_sta *sta);
...@@ -579,7 +572,6 @@ int mt7915_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr, ...@@ -579,7 +572,6 @@ int mt7915_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
enum mt76_txq_id qid, struct mt76_wcid *wcid, enum mt76_txq_id qid, struct mt76_wcid *wcid,
struct ieee80211_sta *sta, struct ieee80211_sta *sta,
struct mt76_tx_info *tx_info); struct mt76_tx_info *tx_info);
void mt7915_tx_complete_skb(struct mt76_dev *mdev, struct mt76_queue_entry *e);
void mt7915_tx_token_put(struct mt7915_dev *dev); void mt7915_tx_token_put(struct mt7915_dev *dev);
void mt7915_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q, void mt7915_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q,
struct sk_buff *skb); struct sk_buff *skb);
......
...@@ -9,6 +9,7 @@ CFLAGS_trace.o := -I$(src) ...@@ -9,6 +9,7 @@ CFLAGS_trace.o := -I$(src)
mt7921-common-y := mac.o mcu.o main.o init.o debugfs.o trace.o mt7921-common-y := mac.o mcu.o main.o init.o debugfs.o trace.o
mt7921-common-$(CONFIG_NL80211_TESTMODE) += testmode.o mt7921-common-$(CONFIG_NL80211_TESTMODE) += testmode.o
mt7921-common-$(CONFIG_ACPI) += acpi_sar.o
mt7921e-y := pci.o pci_mac.o pci_mcu.o dma.o mt7921e-y := pci.o pci_mac.o pci_mcu.o dma.o
mt7921s-y := sdio.o sdio_mac.o sdio_mcu.o mt7921s-y := sdio.o sdio_mac.o sdio_mcu.o
mt7921u-y := usb.o usb_mac.o mt7921u-y := usb.o usb_mac.o
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...@@ -48,7 +48,7 @@ static void mt7921s_unregister_device(struct mt7921_dev *dev) ...@@ -48,7 +48,7 @@ static void mt7921s_unregister_device(struct mt7921_dev *dev)
mt76s_deinit(&dev->mt76); mt76s_deinit(&dev->mt76);
mt7921s_wfsys_reset(dev); mt7921s_wfsys_reset(dev);
mt7921_mcu_exit(dev); skb_queue_purge(&dev->mt76.mcu.res_q);
mt76_free_device(&dev->mt76); mt76_free_device(&dev->mt76);
} }
......
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